master
Add markers for 2.45 branch
sim: cris: change temp var name slightly to avoid shadowing
Remove more shifts for sign/zero extension
epiphany/disassembler: Improve alignment of output.
ubsan: fr30: left shift of negative value
Move cpu files from cgen/cpu to top level cpu directory.
sim: frv: fix -Wincompatible-function-pointer-types warnings [PR sim/29752]
Re: bfd/ELF: fold BFD_RELOC_<arch>_GOTOFF*
Fix even more -Wdiscarded-qualifers issues
update copyright dates
sim --enable-cgen-maint
ubsan: m32c: left shift of negative value
* m32c.opc (parse_signed16): Fix typo.
Fix spelling mistakes
* m32r.cpu (HASH-PREFIX): Delete. (duhpo, dshpo): New pmacros. (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo. (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX attribute, define with dshpo. (uimm24): Delete HASH-PREFIX attribute. * m32r.opc (CGEN_PRINT_NORMAL): Delete. (print_signed_with_hash_prefix): New function. (print_unsigned_with_hash_prefix): New function. * xc16x.cpu (dowh): New pmacro. (upof16): Define with dowh, specify print handler. (qbit, qlobit, qhibit): Ditto. (upag16): Ditto. * xc16x.opc (CGEN_PRINT_NORMAL): Delete. (print_with_dot_prefix): New functions. (print_with_pof_prefix, print_with_pag_prefix): New functions.
mep: ubsan: mep-ibld.c:1635,1645,1652 left shift of negative value
mep disassembler buffer overflow
opcodes cgen: remove use of PTR
or1k: Remove 64-bit support, it's not used and it breaks 32-bit hosts
or1k: Fix disassembly for little-endian binaries
or1k: Add support for numcores and coreid sprs
cpu: or1k: drop unused l.swa flag
* cpu/simplify.inc (*): One line doc strings don't need \n. (df): Invoke define-full-ifield instead of claiming it's an alias. (dno): Define. (dnop): Mark as deprecated.
ubsan: xstormy16: left shift of negative value