master
create new machine/_float.h which is namespace clean. create a new MI float.h which pulls in and defines the values that are needed from there, and repair sys/limits.h so that it defines the values it needs as well (depending on POSIX version, XPG version, etc). guenther has a more exact selection of that coming for limits.h. this also fixes a few mistakes for the vax. reviewed by kettenis and guenther.
all platforms, kernel: remove __HAVE_CLOCKINTR symbol
Normalize sentinel. Use _MACHINE_*_H_ and _<ARCH>_*_H_ properly and consitently.
flense more trailing whitespace
Add endbr64 instructions to most of the ENTRY() macros. The IDTVEC() and KIDTVEC() macros also get a endbr64, and therefore we need to change the way that vectors are aliased with a new IDTVEC_ALIAS() macro. with guenther, jsg
Fix variable name in comment
Clean up old console bootargs
Implement bounce buffering for AMD SEV in amd64 bus dma.
Add __strong_alias macros for all architectures to be able to alias another symbol without weak attribute. To be used in libc and libm soon. Agreed by kettenis@, guenther@, matthew@.
Retpolines are an anti-pattern for IBT, so we need to shift protecting userspace from cross-process BTI to the kernel. Have each CPU track the last pmap run on in userspace and the last vmm VCPU in guest-mode and use the IBPB msr to flush predictors right before running in userspace on a different pmap or entering guest-mode on a different VCPU. Codepatch-nop the userspace bits and conditionalize the vmm bits to keep working if IBPB isn't supported.
make psp attach to ccp as a different driver 'fine with me' hshoexer, ok bluhm@
vmm(4) sets minimum ASID for AMD SEV.
Oops, forgot to include a copyright year when originally added
Clear %dr6 and %dr7 on boot and on resume from suspend, in case the BIOS uses but doesn't reset them. Display their values in trap_print() if it's a trace trap.
remove prototypes with no matching function
Remove typedef of db_addr_t; mpi converted the users of it to vaddr_t already back in 2019.
Use consistant whitespace/comments for #define'ing LABELSECTOR, LABELOFFSET and MAXPARTITIONS. Easier on the eye when scanning through all these files. No functional change.
Improve the interaction between efifb(4), inteldrm(4) and radeondrm(4) when we have a serial console by introducing the notion of a "primary" graphics device. The primary graphics device is the one set up and used by firmware (BIOS, UEFI).
Implement access to EFI variables and ESRT through an ioctl(2) interface that is compatible with what FreeBSD and NetBSD have. Setting EFI variables is only allowed at securelevel 0 and below.
Add elf_aux_info(3)
drop the MD byte-swap micro-optimizations on clang architectures
In exec_elf.c: expand ELFNAME(), ELFNAME2(), and ELFNAMEEND() except leaving out the size, so that ELFNAME2(exec,makecmds) becomes exec_elf_makecmds instead of exec_elf{32,64}_makecmds and then delete the ELFNAME2() and ELFNAMEEND() macros.
Also enclose variable names with external linkage in __BEGIN_DECLS.
Implement support for AVX-512. This required some fixes to the so-far unused Skylake AVX-512 MDS handler and increases the ci_mds_tmp array to 64 bytes. With help from guenther@
Swap the r10 and rcx registers in the amd64 trapframe so that the first six entries are in the same order as syscall arguments, such that syscall() can just use the trapframe as the argument vector for mi_syscall() and not need to reorder into another buffer on the stack. This doesn't affect coredump layout or ptrace(2), but does affect kernel crash dumps.
The interrupt resume (Xdoreti) and recurse (Xspllower) paths are invoked using indirect branches and should have endbr64's.
Meltdown: implement user/kernel page table separation.
In locore0 handle #VC trap for AMD SEV-ES guest.
Save and restore retguard area during hibernate unpack. This copies the original retguard data to the piglet and bcopys it back in place immediately before resuming via the ACPI Sx trampoline.
preallocate hibernate work area during boot
_C_LABEL() is no longer useful in the "everything is ELF" world. Start eliminating it.
put opening { on same line as struct name ok claudio@
emove duplicate definitions of LAPIC_ID_MASK and LAPIC_ID_SHIFT.
Expand amd64 wbinvd_on_all_cpus() with acknowledge.
remove a bunch of orphaned prototypes and unused functions; ok miod
- replace dtoa w/ David's gdtoa, version 2008-03-15 - provide proper dtoa locks - use the real strtof implementation - add strtold, __hdtoa, __hldtoa - add %a/%A support - don't lose precision in printf, don't round to double anymore - implement extended-precision versions of libc functions: fpclassify, isnan, isinf, signbit, isnormal, isfinite, now that the ieee.h is fixed - separate vax versions of strtof, and __hdtoa - add complex math support. added functions: cacos, casin, catan, ccos, csin, ctan, cacosh, casinh, catanh, ccosh, csinh, ctanh, cexp, clog, cabs, cpow, csqrt, carg, cimag, conj, cproj, creal, cacosf, casinf, catanf, ccosf, csinf, ctanf, cacoshf, casinhf, catanhf, ccoshf, csinhf, ctanhf, cexpf, clogf, cabsf, cpowf, csqrtf, cargf, cimagf, conjf, cprojf, crealf - add fdim, fmax, fmin - add log2. (adapted implementation e_log.c. could be more acruate & faster, but it's good enough for now) - remove wrappers & cruft in libm, supposed to work-around mistakes in SVID, etc.; use ieee versions. fixes issues in python 2.6 for djm@ - make _digittoint static - proper definitions for i386, and amd64 in ieee.h - sh, powerpc don't really have extended-precision - add missing definitions for mips64 (quad), m{6,8}k (96-bit) float.h for LDBL_* - merge lead to frac for m{6,8}k, for gdtoa to work properly - add FRAC*BITS & EXT_TO_ARRAY32 definitions in ieee.h, for hdtoa&ldtoa to use - add EXT_IMPLICIT_NBIT definition, which indicates implicit normalization bit - add regression tests for libc: fpclassify and printf - arith.h & gd_qnan.h definitions - update ieee.h: hppa doesn't have quad-precision, hppa64 does - add missing prototypes to gdtoaimp - on 64-bit platforms make sure gdtoa doesn't use a long when it really wants an int - etc., what i may have forgotten... - bump libm major, due to removed&changed symbols - no libc bump, since this is riding on djm's libc major crank from a day ago
Adjust the ACPI GPIO interface to pass the IPL down to the driver level. This allows us to use the IPL_WAKEUP flag to designate GPIO interrupts as wakeup interrupts.
Implement wakeup interrupts on amd64. Provide a dummy implementation for i386 such that we can call the necessary hooks in the suspend/resume code without adding #ifdefs. Tweak the arm64 implementation such that we can call the hooks earlier as this is necessary to mask MSI and MSI-X interrupts on arm64.
remove prototypes with no matching function and externs with no var
remove a 15-year old #if 0
Remove SIZE_MAX from limits.h. It was added years ago before we had a proper stdint.h. No ports fallout. OK guenther@ miod@
Remove a 15 year old XXX comment
spelling
Split the MP trampoline into two pages, one for code and one for data/stack and then protect the code page as RX and the data/stack page as RW (NX).
Add bounds checks for access to mp_busses.
Add a machine-independent implementation for the mplock. This reduces code duplication and makes it easier to instrument lock primitives.
Move common mutex implementations to a MI place.
NKMEMPAGES_MAX_DEFAULT is no longer used. Remove it from param.h. OK miod@
Switch from lazy FPU switching to semi-eager FPU switching: track whether curproc's xstate ("extended state") is loaded in the CPU or not. - context switch, sendsig(), vmm, and doing CPU crypto in the kernel all check the flag and, if set, save the old thread's state to the PCB, clear the flag, and then load the _blank_ state - when returning to userspace, if the flag is clear then set it and restore the thread's state
Handle the case of multiple MCFG table entries for a single segment by checking that the bus number falls within the range of the MCFG entry.
Remove rdtsc macro.
Implement Multiple Message MSI support on amd64. This is experimental code to assist qwx(4) development. We may remove this code again at some point in the future.
We now following the ABI and always clear cld on function entry, so remove the extra CLD instructions from when that wasn't true
remove unused pmap_remove_all() ok kettenis@ claudio@
amd64: MCOUNT_EXIT: restore interrupts, don't unconditionally reenable them
Delete the VM86 kernel option and i386_vm86(3) API: it's required a custom kernel for over 20 years.
Prepare pmap for using the AMD SEV C-bit to encrypt guest memory.
Add ptrace commands used to read/write the XSAVE area of a traced process. Intended to give debuggers access to xmm/ymm registers.
Delete obsolete bits in a comment: mcontext is gone and struct reg is no longer required to be layout compatible with struct trapframe
Add i386 relocations. Needed for 32-bit UEFI bootloader.
We don't do compat32 so MSR_CSTAR shouldn't be set up: delete the Xsyscall32 stub and UCODE32 selector, set MSR_CSTAR to zero at CPU startup, and rezero on ACPI resume and VM exit.
Save and restore the MXCSR register and the FPU control word such that floating-point control modes are properly restored by longjmp(3).
SROP mitigation. sendsig() stores a (per-process ^ &sigcontext) cookie inside the sigcontext. sigreturn(2) checks syscall entry was from the exact PC addr in the (per-process ASLR) sigtramp, verifies the cookie, and clears it to prevent sigcontext reuse. not yet tested on landisk, sparc, *88k, socppc. ok kettenis
Configure AMD SEV-ES in vmm(4).
Move mutex, condvar, and thread-specific data routes, pthread_once, and pthread_exit from libpthread to libc, along with low-level bits to support them. Major bump to both libc and libpthread.
amd64_{get,set}_fsbase() are superfluous and unused; delete them. Delete unused/never-implemented sysarch defines and structs while here.
I was one bit off in the "is canonical" test for FS.base (TCB pointer) values, so it was still possible to fault the kernel.
use the always serializing RDTSCP instruction in tsc and usertc if available
remove unused VM_MAXUSER_ADDRESS32