master
Generate the ChangeLog from commit logs.
riscv: use unaligned vector memory access when supported
Add straight-line speculation hardening for amd64 and i386 assembly
Unify capitalization of LGPL copyright statements.
aria: reduce CTR bulk counter carry handling to 16 bits
Add straight-line speculation hardening for function ends
Add s390x/zSeries implementation of ChaCha20
ec: add zSeries/s390x accelerated scalar multiplication
Add straight-line speculation hardening for aarch64 assembly
Add stitched ChaCha20-Poly1305 SSSE3 and AVX2 implementations
Add s390x/zSeries implementation of Poly1305
bithelp: fix __riscv_zbb check for _gcry_ctz_no_zero
blake2: avoid AVX/AVX2/AVX512 when CPU has high vector inst latency
amd64-asm: move constant data to read-only section for hash/mac algos
blake2-avx512: merge some of the gather loads
blake2s-avx512: mark merged load as such
amd64-asm: align functions to 16 bytes for cipher algos
blowfish: reduce CTR bulk counter carry handling to 16 bits
bufhelp: use aligned type on all targets when alignment is known
cipher: aes: reduce CTR bulk counter carry handling to 16 bits
camellia: add AArch64 crypto-extension implementation
camellia-aarch64: do not store/load link register to/from stack
camellia: reduce CTR bulk counter carry handling to 16 bits
camellia: add x86_64 VAES/AVX2 accelerated implementation
Add clang support for ARM 32-bit assembly
Add GFNI/AVX2 implementation of Camellia
camellia: add POWER8/POWER9 vcrypto implementation
camellia-simd128: optimize round key loading and key setup
Fix 'u32' build error with Camellia
Point to gnu.org as canonical license location.
cast5: reduce CTR bulk counter carry handling to 16 bits
chacha20-aarch64: use local symbols for read-only data
amd64-asm: move constant data to read-only section for cipher algos
Use 'vmov' and 'movi' for vector register clearing in ARM assembly
Add missing abiversion tag for PowerPC assembly
Add vector register clearing for PowerPC implementations
s390x-asm: move constant data to read-only section
chacha20: avoid AVX512/AVX2/SSSE3 for single block processing with Zen5
cipher:aeswrap: Fix padding length check.
Fix ungrammatical use of "allow to"
cipher-cmac: fix CMAC block-count truncation for 64 GiB writes
Add GHASH AArch64/SIMD intrinsics implementation
Add armv8/pmull accelerated POLYVAL for GCM-SIV
gcm-aarch64-ce: clear volatile vector registers at setup function
riscv: use memory operands for inline assembly load/store
cipher: fix spurious AEAD byte-counter carry for 4 GiB adds
cipher-gcm: assert 32 KiB input cap in gcm_ctr_encrypt
cipher: remove transitional ctr_enc alias
cipher-ocb: fix split-AAD abort at L-table wrap boundary
cipher-xts: harden mask generation against branch optimization
md,cipher: allow internal users to skip fast random poll
aarch64-asm: align functions to 16 bytes
Update copyright notices to use URL.
crc-intel-pclmul: add AVX2 and AVX512 code paths
Add RISC-V Zbb+Zbc implementation of CRC
cipher:dilithium: Don't include unused freeze function.
cipher:dilithium: Have cipher/dilithium.h.
cipher:dilithium: Check the label length by caller.
fips,cipher: Add behavior not to reject but mark non-compliant.
mpi:ec: Make sure to have MPI limbs in ECC.
cipher:ecc: Add curve ietf25 with exact RFC8410 semantics.
cipher:kem:ecc: Raise an error by validating a point on curve.
mpi:ec: Use mpi_new with NBITS, instead of mpi_alloc.
doc: Fix a bunch of doubled articles
rsa, elgamal: avoid logical not operator in constant-time code
gost: add keymeshing support per RFC 4357
gost28147: add support for CryptoPro key meshing per RFC 4357
gost28147: fix out-of-bounds read in IMIT MAC verify
cipher: Use const for *_spec_t, if possible.
hash-common: avoid integer division to reduce call overhead
cipher: Return GPG_ERR_INV_KEYLEN when wrong key length.
avx512: tweak zmm16-zmm31 register clearing
keccak: Use size_t to avoid integer overflow
Add SHA3 acceleration for RISC-V Zbb extension
cipher:kem: Remove the experimental KEMs (PGP and CMS).
cipher:kyber: Accept and return a seed with gcry_pk_genkey.
cipher:kyber: Use ct_int16_select of libgcrypt .
kyber: use strong random for encapsulation coins
fips: Rejection by GCRYCTL_FIPS_REJECT_NON_FIPS, not by open flags.
Add stack burning for PQC algorithms
fips,md: Implement new FIPS service indicator for gcry_md_open API.
poly1305-p10le: use '.rodata' section for read-only data
Fix carry flag clobber for powerpc inline assembly with clang
cipher:prime: Fix long standing bug for PRIME % 2 == 0.
dilithium: use strong random for signature nonce
cipher:dilithium: Support "no-prefix" flag for Dilithium testing.
rijndael: add ECB acceleration (for benchmarking purposes)
AES-GCM: Bulk implementation of AES-GCM acceleration for ppc64le
rijndael: add VAES/AVX512 accelerated implementation
cipher: move CBC/CFB/CTR self-tests to tests/basic
ppc: add support for clang target attribute
cipher: limit table prefetch to the look-up table arrays
Add VAES/AVX2 accelerated i386 implementation for AES
Add RISC-V vector permute AES
rijndael-vp-riscv: clear upper half when moving 128-bit to 256-bit
salsa20-amd64: clear vectors registers
Change utf-8 copyright characters to '(C)'
Remove occurrences of old FSF postal address.
serpent: reduce CTR bulk counter carry handling to 16 bits
Disable instrumentation on mixed Intel SSE C/assembly implementations
md: Make SHA-1 non-FIPS internally for 1.12 API.
Add s390x/zSeries acceleration for SHA1
Require RISC-V B extension for vector intrinsics implementations
sha512: add Intel SHA512 extension implementation
Split inline assembly blocks with many memory operands
Add AES Vector Permute intrinsics implementation for AArch64
sm3-aarch64-ce: clear volatile vector registers
sm3: add Intel SM3 extension implementation
sm4: reduce CTR bulk counter carry handling to 16 bits
sm4: deduplicate AVX2 cipher mode code between AES-NI and GFNI
sm4: add Intel SM4 instructions accelerated AVX2 implementation
sm4: tail-call ARM and PPC crypt_blk1_x helpers
sntrup761: defer reduction in polynomial multiplication
cipher: Fix possible NULL dereference.
twofish: reduce CTR bulk counter carry handling to 16 bits
whirlpool-sse2-amd64: clear vectors registers