master
[fdt] Allow for the existence of multiple device trees
[riscv] Ensure coherent DMA allocations do not cross cacheline boundaries
[riscv] Add support for the RISC-V CPU architecture
[build] Mark core riscv64 files as permitted for UEFI Secure Boot
[riscv] Simplify TCP/IP checksum calculation
[sbi] Add support for running as a RISC-V SBI payload
[ioapi] Allow iounmap() to be called for port I/O addresses
[riscv] Add support for detecting T-Head vendor extensions
[riscv] Provide a DMA API implementation for RISC-V bare-metal systems
[riscv] Ignore riscv,isa property in favour of direct CSR testing