embox

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/**
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 * @file
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 * @brief Timer Counter interface realization
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 *
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 * @date
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 * @author Anton Kozlov
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 */
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#include <stdint.h>
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#include <stdbool.h>
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#include <stddef.h>
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#include <assert.h>
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#include <drivers/at91sam7s256.h>
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#include <drivers/timer_counter/at91_timer_counter.h>
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#include <hal/reg.h>
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void tc_init(uint8_t channel) {
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	assert(channel < 3);
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	REG_STORE(AT91C_PMC_PCER, (1L << (AT91C_ID_TC0 + channel)));
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}
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void tc_config_input(uint8_t channel, uint32_t clock_mode) {
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	assert(channel < 3);
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	REG_ORIN(((uint8_t *) AT91C_TC0_CMR) + channel * sizeof(AT91S_TCB),
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			clock_mode);
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}
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void tc_reset(uint8_t channel) {
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	//assert(channel < 3);
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	REG_STORE(((uint8_t *) AT91C_TC0_CCR) + channel * sizeof(AT91S_TCB),
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			AT91C_TC_CLKEN | AT91C_TC_SWTRG);
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}
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uint32_t tc_counter_value(uint8_t channel) {
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	//assert(channel < 3);
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	return REG_LOAD(((uint8_t *) AT91C_TC0_CV) + channel * sizeof(AT91S_TCB));
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}
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void tc_set_limit(uint8_t channel, uint32_t limit) {
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	REG_STORE(AT91C_TC0_RC + channel * sizeof(AT91S_TCB), limit);
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	REG_ORIN(((uint8_t *) AT91C_TC0_CMR) + channel * sizeof(AT91S_TCB),
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			AT91C_TC_CPCTRG);
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}
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void tc_limit_int_enable(uint8_t channel, irq_handler_t handler) {
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	// TODO check return code.
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	irq_attach(AT91C_ID_TC0 + channel, handler, 0, NULL, "Timer limit handler");
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	REG_STORE(((uint8_t *) AT91C_TC0_IER) + channel * sizeof(AT91S_TCB), AT91C_TC_CPCS);
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}
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void tc_limit_int_disable(uint8_t channel) {
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	REG_STORE(((uint8_t *) AT91C_TC0_IDR) + channel * sizeof(AT91S_TCB), AT91C_TC_CPCS);
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	// TODO check return code.
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	irq_detach(AT91C_ID_TC0 + channel, NULL);
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}
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bool tc_was_overflowed(uint8_t channel) {
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	//assert(channel < 3);
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	return REG_LOAD(((uint8_t *) AT91C_TC0_SR) + channel * sizeof(AT91S_TCB)) &
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		AT91C_TC_COVFS;
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}
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void tc_stop(uint8_t channel) {
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	//assert(channel < 3);
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	REG_STORE(((uint8_t *) AT91C_TC0_CCR) + channel * sizeof(AT91S_TCB),
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		AT91C_TC_CLKDIS);
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	//REG_STORE(AT91C_PMC_PCDR, (1L << (AT91C_ID_TC0 + channel)));
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}
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