embox

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/**
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 * @file
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 * @brief i.MX6 Enhanced Configurable SPI driver
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 * @author Denis Deryugin <deryugin.denis@gmail.com>
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 * @version 0.1
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 * @date 12.06.2017
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 */
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#include <embox/unit.h>
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#include <framework/mod/options.h>
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#include <util/log.h>
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#include <drivers/common/memory.h>
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#include <drivers/spi.h>
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#include <drivers/clk/ccm_imx6.h>
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#include <drivers/iomuxc.h>
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#include "imx6_ecspi.h"
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EMBOX_UNIT_INIT(imx6_ecspi2_init);
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#define BASE_ADDR    OPTION_GET(NUMBER, base_addr)
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#define PINS_GROUP   OPTION_GET(NUMBER, pins_group)
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static struct imx6_ecspi imx6_ecspi2 = {
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	.base_addr = BASE_ADDR,
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	.cs_count  = 1,
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	.cs_array  = {
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		{4, 29}
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	},
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	.cs_iomux  = {
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		IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA11,
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	}
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};
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static void imx_ecspi2_pins_init(void) {
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	int gpio_n, port;
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	int i;
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	/* SS0 (CS0) */
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	/* FIXME SPI NSS doesn't work somewhy, so we use gpio instead of:
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	 * iomuxc_write(IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA11, 0x12);
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	 * iomuxc_write(IOMUXC_ECSPI2_SS0_SELECT_INPUT, 0x2);
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	 */
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	/* Init all Chip Selects */
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	for (i = 0; i < imx6_ecspi2.cs_count; i++) {
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		/* Force GPIO mode. */
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		iomuxc_write(imx6_ecspi2.cs_iomux[i], 0x15);
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		gpio_n = imx6_ecspi2.cs_array[i][0];
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		port   = imx6_ecspi2.cs_array[i][1];
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		gpio_setup_mode(gpio_n, 1 << port, GPIO_MODE_OUT);
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		gpio_set(gpio_n, 1 << port, 1);
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	}
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	/* Init selected GPIO group. */
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#if PINS_GROUP == 1
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	/* MISO */
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	iomuxc_write(IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA10, 0x12);
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	iomuxc_write(IOMUXC_ECSPI2_MISO_SELECT_INPUT, 0x2);
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	/* MOSI */
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	iomuxc_write(IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA09, 0x12);
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	iomuxc_write(IOMUXC_ECSPI2_MOSI_SELECT_INPUT, 0x2);
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	/* CLK */
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	iomuxc_write(IOMUXC_SW_MUX_CTL_PAD_CSI0_DATA08, 0x12);
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	iomuxc_write(IOMUXC_ECSPI2_CSPI_CLK_IN_SELECT_INPUT, 0x2);
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#else
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	#error "Wrong pins group for SPI2"
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#endif
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}
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static int imx6_ecspi2_init(void) {
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	log_debug("");
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	clk_enable("ecspi2");
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	imx_ecspi2_pins_init();
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	return imx6_ecspi_init(&imx6_ecspi2);
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}
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#define SPI_DEV_NAME      ixm6_ecspi2
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PERIPH_MEMORY_DEFINE(imx6_ecspi2, BASE_ADDR, 0x44);
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SPI_DEV_DEF(SPI_DEV_NAME, &imx6_ecspi_ops, &imx6_ecspi2, 1);
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