embox

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/**
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 * @file
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 * @brief i.MX6 Enhanced Configurable SPI driver
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 * @author Denis Deryugin <deryugin.denis@gmail.com>
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 * @version 0.1
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 * @date 12.06.2017
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 */
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#include <drivers/gpio/gpio.h>
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#include <drivers/spi.h>
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#include <embox/unit.h>
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#include <errno.h>
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#include <assert.h>
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#include <hal/reg.h>
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#include <util/log.h>
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#include "imx6_ecspi.h"
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#define ECSPI_RXDATA(dev)                 ((dev)->base_addr + 0x00)
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#define ECSPI_TXDATA(dev)                 ((dev)->base_addr + 0x04)
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#define ECSPI_CONREG(dev)                 ((dev)->base_addr + 0x08)
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# define ECSPI_CONREG_EN                  (1 << 0)
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# define ECSPI_CONREG_XCH                 (1 << 2)
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# define ECSPI_CONREG_BURST_LENGTH_OFFT   20
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# define ECSPI_CONREG_BURST_LENGTH_MASK   0xFFF00000
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# define ECSPI_CONREG_CHANNEL_SELECT_OFFT 18
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# define ECSPI_CONREG_CHANNEL_SELECT_MASK 0x000C0000
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#define ECSPI_CONFIGREG(dev)              ((dev)->base_addr + 0x0C)
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#define ECSPI_INTREG(devv)                ((dev)->base_addr + 0x10)
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#define ECSPI_DMAREG(dev)                 ((dev)->base_addr + 0x14)
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#define ECSPI_STATREG(dev)                ((dev)->base_addr + 0x18)
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# define ECSPI_STATREG_RR                 (1 << 3)
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#define ECSPI_PERIODREG(dev)              ((dev)->base_addr + 0x1C)
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#define ECSPI_TESTREG(dev)                ((dev)->base_addr + 0x20)
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#define ECSPI_MSGDATA(dev)                ((dev)->base_addr + 0x40)
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#define TIMEOUT_LIMIT		100000
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#define SPI_FIFO_LEN		64
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static void imx6_ecspi_show_regs(struct imx6_ecspi *dev) {
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	log_debug("SPI Registers:");
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	log_debug("ECSPI_CONREG    = 0x%08x", REG32_LOAD(ECSPI_CONREG(dev)));
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	log_debug("ECSPI_CONFIGREG = 0x%08x", REG32_LOAD(ECSPI_CONFIGREG(dev)));
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	log_debug("ECSPI_STATREG   = 0x%08x", REG32_LOAD(ECSPI_STATREG(dev)));
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}
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int imx6_ecspi_init(struct imx6_ecspi *dev) {
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	/* Disable SPI block */
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	REG32_CLEAR(ECSPI_CONREG(dev), ECSPI_CONREG_EN);
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	/* Enable clocks */
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	/* Put SPI out of reset */
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	REG32_ORIN(ECSPI_CONREG(dev), ECSPI_CONREG_EN);
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	/* IOMUX configuration */
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	/* Configure ECSPI as a master */
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	REG32_ORIN(ECSPI_CONREG(dev), 0xF << 4);
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	/* Set burst length to 8 bits so we work with bytes */
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	REG32_CLEAR(ECSPI_CONREG(dev), ECSPI_CONREG_BURST_LENGTH_MASK);
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	REG32_ORIN(ECSPI_CONREG(dev), 7 << ECSPI_CONREG_BURST_LENGTH_OFFT);
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	/* Set default speed */
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	REG32_ORIN(ECSPI_CONREG(dev), 0x2 << 12);
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	/* SCLK_CTL */
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	REG32_ORIN(ECSPI_CONFIGREG(dev), 0xf << 20);
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	/* DATA_CTL */
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	REG32_ORIN(ECSPI_CONFIGREG(dev), 0xf << 16);
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	/* SCLK_POL */
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	REG32_ORIN(ECSPI_CONFIGREG(dev), 0xf << 4);
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	/* SCLK_PHA */
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	REG32_ORIN(ECSPI_CONFIGREG(dev), 0xf << 0);
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	imx6_ecspi_show_regs(dev);
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	return 0;
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}
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static void imx6_ecspi_set_cs(struct imx6_ecspi *dev, int state) {
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	int gpio_n = 0;
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	int port = 0;
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	assert(dev->cs < dev->cs_count);
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	REG32_CLEAR(ECSPI_CONREG(dev), ECSPI_CONREG_CHANNEL_SELECT_MASK);
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	REG32_ORIN(ECSPI_CONREG(dev), dev->cs << ECSPI_CONREG_CHANNEL_SELECT_OFFT);
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	gpio_n = dev->cs_array[dev->cs][0];
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	port   = dev->cs_array[dev->cs][1];
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	gpio_set(gpio_n, 1 << port, state);
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}
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static uint8_t imx6_ecspi_transfer_byte(struct imx6_ecspi *dev, uint8_t val) {
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	int timeout;
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	REG32_STORE(ECSPI_TXDATA(dev), val);
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	REG32_ORIN(ECSPI_CONREG(dev), ECSPI_CONREG_XCH);
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	timeout = TIMEOUT_LIMIT;
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	while ((REG32_LOAD(ECSPI_CONREG(dev)) & ECSPI_CONREG_XCH) && timeout--);
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	if (timeout == 0)
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		log_debug("transmit timeout");
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	return REG32_LOAD(ECSPI_RXDATA(dev));
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}
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static int imx6_ecspi_select(struct spi_device *dev, int cs) {
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	struct imx6_ecspi *priv = dev->priv;
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	if (cs < 0 || cs > priv->cs_count) {
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		log_error("Only cs=0..%d are available!", priv->cs_count - 1);
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		return -EINVAL;
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	}
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	priv->cs = cs;
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	return 0;
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}
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static int imx6_ecspi_transfer(struct spi_device *dev, uint8_t *inbuf,
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		uint8_t *outbuf, int count) {
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	struct imx6_ecspi *priv = dev->priv;
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	uint8_t val;
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	if (dev->flags & SPI_CS_ACTIVE) {
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		imx6_ecspi_set_cs(priv, 0);
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	}
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	while (count--) {
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		val = inbuf ? *inbuf++ : 0;
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		log_debug("tx %02x", val);
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		val = imx6_ecspi_transfer_byte(priv, val);
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		log_debug("rx %02x", val);
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		if (outbuf)
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			*outbuf++ = val;
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	}
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	if (dev->flags & SPI_CS_INACTIVE) {
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		imx6_ecspi_set_cs(priv, 1);
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	}
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	return 0;
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}
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struct spi_ops imx6_ecspi_ops = {
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	.select   = imx6_ecspi_select,
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	.transfer = imx6_ecspi_transfer
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};
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