embox

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/**
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 * @file
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 * @brief
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 * @date 20.11.2019
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 * @author: Denis Deryugin <deryugin.denis@gmail.com>
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 */
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#include <assert.h>
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#include <bsp/stm32cube_hal.h>
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#include <config/board_config.h>
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static void USART_CLK_ENABLE(void *usart_base) {
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	switch((uintptr_t)usart_base) {
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#if defined(USART1) &&  defined(CONF_USART1_ENABLED)
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	case (uintptr_t)USART1: {
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		CONF_USART1_CLK_ENABLE_UART();
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		break;
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	}
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#endif
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#if defined(USART2) &&  defined(CONF_USART2_ENABLED)
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	case (uintptr_t)USART2: {
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		CONF_USART2_CLK_ENABLE_UART();
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		break;
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	}
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#endif
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#if defined(USART3) &&  defined(CONF_USART3_ENABLED)
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	case (uintptr_t)USART3: {
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		CONF_USART3_CLK_ENABLE_UART();
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		break;
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	}
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#endif
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#if defined(UART4) &&  defined(CONF_UART4_ENABLED)
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	case (uintptr_t)UART4: {
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		CONF_UART4_CLK_ENABLE_UART();
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		break;
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	}
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#endif
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#if defined(UART5) &&  defined(CONF_UART5_ENABLED)
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	case (uintptr_t)UART5: {
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		CONF_UART5_CLK_ENABLE_UART();
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		break;
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	}
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#endif
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#if defined(USART6) &&  defined(CONF_USART6_ENABLED)
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	case (uintptr_t)USART6: {
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		CONF_USART6_CLK_ENABLE_UART();
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		break;
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	}
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#endif
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#if defined(UART7) &&  defined(CONF_UART7_ENABLED)
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	case (uintptr_t)UART7: {
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		CONF_UART7_CLK_ENABLE_UART();
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		break;
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	}
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#endif
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#if defined(UART8) &&  defined(CONF_UART8_ENABLED)
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	case (uintptr_t)UART8: {
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		CONF_UART8_CLK_ENABLE_UART();
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		break;
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	}
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#endif
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	default:
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		assert(0);
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	}
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}
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static void USART_TX_GPIO_CLK_ENABLE(void *usart_base) {
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	switch((uintptr_t)usart_base) {
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#if defined(USART1) &&  defined(CONF_USART1_ENABLED)
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	case (uintptr_t)USART1: {
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		CONF_USART1_CLK_ENABLE_TX();
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		break;
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	}
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#endif
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#if defined(USART2) &&  defined(CONF_USART2_ENABLED)
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	case (uintptr_t)USART2: {
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		CONF_USART2_CLK_ENABLE_TX();
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		break;
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	}
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#endif
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#if defined(USART3) &&  defined(CONF_USART3_ENABLED)
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	case (uintptr_t)USART3: {
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		CONF_USART3_CLK_ENABLE_TX();
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		break;
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	}
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#endif
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#if defined(UART4) &&  defined(CONF_UART4_ENABLED)
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	case (uintptr_t)UART4: {
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		CONF_UART4_CLK_ENABLE_TX();
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		break;
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	}
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#endif
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#if defined(UART5) &&  defined(CONF_UART5_ENABLED)
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	case (uintptr_t)UART5: {
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		CONF_UART5_CLK_ENABLE_TX();
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		break;
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	}
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#endif
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#if defined(USART6) &&  defined(CONF_USART6_ENABLED)
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	case (uintptr_t)USART6: {
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		CONF_USART6_CLK_ENABLE_TX();
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		break;
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	}
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#endif
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#if defined(UART7) &&  defined(CONF_UART7_ENABLED)
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	case (uintptr_t)UART7: {
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		CONF_UART7_CLK_ENABLE_TX();
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		break;
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	}
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#endif
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#if defined(UART8) &&  defined(CONF_UART8_ENABLED)
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	case (uintptr_t)UART8: {
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		CONF_UART8_CLK_ENABLE_TX();
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		break;
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	}
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#endif
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	default:
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		assert(0);
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	}
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}
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static void USART_RX_GPIO_CLK_ENABLE(void *usart_base) {
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	switch((uintptr_t)usart_base) {
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#if defined(USART1) &&  defined(CONF_USART1_ENABLED)
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	case (uintptr_t)USART1: {
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		CONF_USART1_CLK_ENABLE_RX();
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		break;
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	}
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#endif
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#if defined(USART2) &&  defined(CONF_USART2_ENABLED)
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	case (uintptr_t)USART2: {
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		CONF_USART2_CLK_ENABLE_RX();
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		break;
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	}
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#endif
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#if defined(USART3) &&  defined(CONF_USART3_ENABLED)
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	case (uintptr_t)USART3: {
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		CONF_USART3_CLK_ENABLE_RX();
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		break;
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	}
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#endif
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#if defined(UART4) &&  defined(CONF_UART4_ENABLED)
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	case (uintptr_t)UART4: {
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		CONF_UART4_CLK_ENABLE_RX();
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		break;
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	}
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#endif
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#if defined(UART5) &&  defined(CONF_UART5_ENABLED)
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	case (uintptr_t)UART5: {
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		CONF_UART5_CLK_ENABLE_RX();
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		break;
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	}
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#endif
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#if defined(USART6) &&  defined(CONF_USART6_ENABLED)
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	case (uintptr_t)USART6: {
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		CONF_USART6_CLK_ENABLE_RX();
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		break;
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	}
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#endif
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#if defined(UART7) &&  defined(CONF_UART7_ENABLED)
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	case (uintptr_t)UART7: {
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		CONF_UART7_CLK_ENABLE_RX();
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		break;
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	}
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#endif
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#if defined(UART8) &&  defined(CONF_UART8_ENABLED)
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	case (uintptr_t)UART8: {
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		CONF_UART8_CLK_ENABLE_RX();
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		break;
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	}
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#endif
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	default:
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		assert(0);
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	}
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}
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static uint16_t USART_RX_PIN(void *usart_base) {
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	switch((uintptr_t)usart_base) {
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#if defined(USART1) &&  defined(CONF_USART1_ENABLED)
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	case (uintptr_t)USART1: {
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		return CONF_USART1_PIN_RX_NR;
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	}
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#endif
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#if defined(USART2) &&  defined(CONF_USART2_ENABLED)
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	case (uintptr_t)USART2: {
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		return CONF_USART2_PIN_RX_NR;
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	}
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#endif
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#if defined(USART3) &&  defined(CONF_USART3_ENABLED)
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	case (uintptr_t)USART3: {
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		return CONF_USART3_PIN_RX_NR;
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	}
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#endif
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#if defined(UART4) &&  defined(CONF_UART4_ENABLED)
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	case (uintptr_t)UART4: {
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		return CONF_UART4_PIN_RX_NR;
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	}
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#endif
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#if defined(UART5) &&  defined(CONF_UART5_ENABLED)
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	case (uintptr_t)UART5: {
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		return CONF_UART5_PIN_RX_NR;
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	}
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#endif
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#if defined(USART6) &&  defined(CONF_USART6_ENABLED)
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	case (uintptr_t)USART6: {
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		return CONF_USART6_PIN_RX_NR;
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	}
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#endif
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#if defined(UART7) &&  defined(CONF_UART7_ENABLED)
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	case (uintptr_t)UART7: {
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		return CONF_UART7_PIN_RX_NR;
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	}
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#endif
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#if defined(UART8) &&  defined(CONF_UART8_ENABLED)
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	case (uintptr_t)UART8: {
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		return CONF_UART8_PIN_RX_NR;
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	}
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#endif
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	default:
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		assert(0);
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	}
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	return 0;
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}
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static uint16_t USART_TX_PIN(void *usart_base) {
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	switch((uintptr_t)usart_base) {
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#if defined(USART1) &&  defined(CONF_USART1_ENABLED)
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	case (uintptr_t)USART1: {
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		return CONF_USART1_PIN_TX_NR;
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	}
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#endif
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#if defined(USART2) &&  defined(CONF_USART2_ENABLED)
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	case (uintptr_t)USART2: {
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		return CONF_USART2_PIN_TX_NR;
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	}
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#endif
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#if defined(USART3) &&  defined(CONF_USART3_ENABLED)
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	case (uintptr_t)USART3: {
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		return CONF_USART3_PIN_TX_NR;
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	}
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#endif
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#if defined(UART4) &&  defined(CONF_UART4_ENABLED)
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	case (uintptr_t)UART4: {
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		return CONF_UART4_PIN_TX_NR;
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	}
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#endif
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#if defined(UART5) &&  defined(CONF_UART5_ENABLED)
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	case (uintptr_t)UART5: {
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		return CONF_UART5_PIN_TX_NR;
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	}
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#endif
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#if defined(USART6) &&  defined(CONF_USART6_ENABLED)
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	case (uintptr_t)USART6: {
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		return CONF_USART6_PIN_TX_NR;
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	}
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#endif
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#if defined(UART7) &&  defined(CONF_UART7_ENABLED)
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	case (uintptr_t)UART7: {
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		return CONF_UART7_PIN_TX_NR;
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	}
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#endif
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#if defined(UART8) &&  defined(CONF_UART8_ENABLED)
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	case (uintptr_t)UART8: {
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		return CONF_UART8_PIN_TX_NR;
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	}
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#endif
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	default:
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		assert(0);
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	}
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	return 0;
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}
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static GPIO_TypeDef *USART_RX_GPIO_PORT(void *usart_base) {
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	switch((uintptr_t)usart_base) {
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#if defined(USART1) &&  defined(CONF_USART1_ENABLED)
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	case (uintptr_t)USART1: {
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		return CONF_USART1_PIN_RX_PORT;
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	}
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#endif
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#if defined(USART2) &&  defined(CONF_USART2_ENABLED)
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	case (uintptr_t)USART2: {
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		return CONF_USART2_PIN_RX_PORT;
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	}
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#endif
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#if defined(USART3) &&  defined(CONF_USART3_ENABLED)
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	case (uintptr_t)USART3: {
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		return CONF_USART3_PIN_RX_PORT;
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	}
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#endif
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#if defined(UART4) &&  defined(CONF_UART4_ENABLED)
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	case (uintptr_t)UART4: {
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		return CONF_UART4_PIN_RX_PORT;
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	}
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#endif
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#if defined(UART5) &&  defined(CONF_UART5_ENABLED)
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	case (uintptr_t)UART5: {
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		return CONF_UART5_PIN_RX_PORT;
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	}
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#endif
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#if defined(USART6) &&  defined(CONF_USART6_ENABLED)
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	case (uintptr_t)USART6: {
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		return CONF_USART6_PIN_RX_PORT;
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	}
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#endif
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#if defined(UART7) &&  defined(CONF_UART7_ENABLED)
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	case (uintptr_t)UART7: {
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		return CONF_UART7_PIN_RX_PORT;
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	}
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#endif
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#if defined(UART8) &&  defined(CONF_UART8_ENABLED)
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	case (uintptr_t)UART8: {
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		return CONF_UART8_PIN_RX_PORT;
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	}
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#endif
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	default:
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		assert(0);
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	}
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	return 0;
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}
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static GPIO_TypeDef *USART_TX_GPIO_PORT(void *usart_base) {
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	switch((uintptr_t)usart_base) {
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#if defined(USART1) &&  defined(CONF_USART1_ENABLED)
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	case (uintptr_t)USART1: {
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		return CONF_USART1_PIN_TX_PORT;
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	}
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#endif
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#if defined(USART2) &&  defined(CONF_USART2_ENABLED)
331
	case (uintptr_t)USART2: {
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		return CONF_USART2_PIN_TX_PORT;
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	}
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#endif
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#if defined(USART3) &&  defined(CONF_USART3_ENABLED)
336
	case (uintptr_t)USART3: {
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		return CONF_USART3_PIN_TX_PORT;
338
	}
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#endif
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#if defined(UART4) &&  defined(CONF_UART4_ENABLED)
341
	case (uintptr_t)UART4: {
342
		return CONF_UART4_PIN_TX_PORT;
343
	}
344
#endif
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#if defined(UART5) &&  defined(CONF_UART5_ENABLED)
346
	case (uintptr_t)UART5: {
347
		return CONF_UART5_PIN_TX_PORT;
348
	}
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#endif
350
#if defined(USART6) &&  defined(CONF_USART6_ENABLED)
351
	case (uintptr_t)USART6: {
352
		return CONF_USART6_PIN_TX_PORT;
353
	}
354
#endif
355
#if defined(UART7) &&  defined(CONF_UART7_ENABLED)
356
	case (uintptr_t)UART7: {
357
		return CONF_UART7_PIN_TX_PORT;
358
	}
359
#endif
360
#if defined(UART8) &&  defined(CONF_UART8_ENABLED)
361
	case (uintptr_t)UART8: {
362
		return CONF_UART8_PIN_TX_PORT;
363
	}
364
#endif
365
	default:
366
		assert(0);
367
	}
368
	return 0;
369
}
370

371
#ifndef STM32F1_CUBE
372
static uint8_t USART_TX_AF(void *usart_base) {
373
	switch((uintptr_t)usart_base) {
374
#if defined(USART1) &&  defined(CONF_USART1_ENABLED)
375
	case (uintptr_t)USART1: {
376
		return CONF_USART1_PIN_TX_AF;
377
	}
378
#endif
379
#if defined(USART2) &&  defined(CONF_USART2_ENABLED)
380
	case (uintptr_t)USART2: {
381
		return CONF_USART2_PIN_TX_AF;
382
	}
383
#endif
384
#if defined(USART3) &&  defined(CONF_USART3_ENABLED)
385
	case (uintptr_t)USART3: {
386
		return CONF_USART3_PIN_TX_AF;
387
	}
388
#endif
389
#if defined(UART4) &&  defined(CONF_UART4_ENABLED)
390
	case (uintptr_t)UART4: {
391
		return CONF_UART4_PIN_TX_AF;
392
	}
393
#endif
394
#if defined(UART5) &&  defined(CONF_UART5_ENABLED)
395
	case (uintptr_t)UART5: {
396
		return CONF_UART5_PIN_TX_AF;
397
	}
398
#endif
399
#if defined(USART6) &&  defined(CONF_USART6_ENABLED)
400
	case (uintptr_t)USART6: {
401
		return CONF_USART6_PIN_TX_AF;
402
	}
403
#endif
404
#if defined(UART7) &&  defined(CONF_UART7_ENABLED)
405
	case (uintptr_t)UART7: {
406
		return CONF_UART7_PIN_TX_AF;
407
	}
408
#endif
409
#if defined(UART8) &&  defined(CONF_UART8_ENABLED)
410
	case (uintptr_t)UART8: {
411
		return CONF_UART8_PIN_TX_AF;
412
	}
413
#endif
414
	default:
415
		assert(0);
416
	}
417
	return 0;
418
}
419

420
static uint8_t USART_RX_AF(void *usart_base) {
421
	switch((uintptr_t)usart_base) {
422
#if defined(USART1) &&  defined(CONF_USART1_ENABLED)
423
	case (uintptr_t)USART1: {
424
		return CONF_USART1_PIN_RX_AF;
425
	}
426
#endif
427
#if defined(USART2) &&  defined(CONF_USART2_ENABLED)
428
	case (uintptr_t)USART2: {
429
		return CONF_USART2_PIN_RX_AF;
430
	}
431
#endif
432
#if defined(USART3) &&  defined(CONF_USART3_ENABLED)
433
	case (uintptr_t)USART3: {
434
		return CONF_USART3_PIN_RX_AF;
435
	}
436
#endif
437
#if defined(UART4) &&  defined(CONF_UART4_ENABLED)
438
	case (uintptr_t)UART4: {
439
		return CONF_UART4_PIN_RX_AF;
440
	}
441
#endif
442
#if defined(UART5) &&  defined(CONF_UART5_ENABLED)
443
	case (uintptr_t)UART5: {
444
		return CONF_UART5_PIN_RX_AF;
445
	}
446
#endif
447
#if defined(USART6) &&  defined(CONF_USART6_ENABLED)
448
	case (uintptr_t)USART6: {
449
		return CONF_USART6_PIN_RX_AF;
450
	}
451
#endif
452
#if defined(UART7) &&  defined(CONF_UART7_ENABLED)
453
	case (uintptr_t)UART7: {
454
		return CONF_UART7_PIN_RX_AF;
455
	}
456
#endif
457
#if defined(UART8) &&  defined(CONF_UART8_ENABLED)
458
	case (uintptr_t)UART8: {
459
		return CONF_UART8_PIN_RX_AF;
460
	}
461
#endif
462
	default:
463
		assert(0);
464
	}
465
	return 0;
466
}
467
#endif /* STM32F1_CUBE */
468

469
void HAL_UART_MspInit(UART_HandleTypeDef *huart) {
470
	GPIO_InitTypeDef  GPIO_InitStruct;
471
	void *uart_base = huart->Instance;
472

473
	/*##-1- Enable peripherals and GPIO Clocks #################################*/
474
	/* Enable GPIO TX/RX clock */
475
	USART_TX_GPIO_CLK_ENABLE(uart_base);
476
	USART_RX_GPIO_CLK_ENABLE(uart_base);
477
	/* Enable USART2 clock */
478
	USART_CLK_ENABLE(uart_base);
479

480
#if 0
481
	/*TODO It can be required for some STM32 series (H7 for example)
482
	 * but now all boards work without it
483
	 */
484
	RCC_PeriphCLKInitTypeDef RCC_PeriphClkInit;
485
	/* Select HSI as source of USARTx clocks */
486
	RCC_PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART3;
487
	RCC_PeriphClkInit.Usart234578ClockSelection = RCC_USART3CLKSOURCE_HSI;
488
	HAL_RCCEx_PeriphCLKConfig(&RCC_PeriphClkInit);
489
#endif
490

491
	/*##-2- Configure peripheral GPIO ##########################################*/
492
	/* UART TX GPIO pin configuration  */
493
	GPIO_InitStruct.Pin       = USART_TX_PIN(uart_base);
494
	GPIO_InitStruct.Mode      = GPIO_MODE_AF_PP;
495
	GPIO_InitStruct.Pull      = GPIO_NOPULL;
496
	GPIO_InitStruct.Speed     = GPIO_SPEED_FREQ_HIGH;
497
#ifndef STM32F1_CUBE
498
	GPIO_InitStruct.Alternate = USART_TX_AF(uart_base);
499
#else
500
	GPIO_InitStruct.Pull      = GPIO_PULLUP;
501
#endif /* STM32F1_CUBE */
502
	HAL_GPIO_Init(USART_TX_GPIO_PORT(uart_base), &GPIO_InitStruct);
503

504
	/* UART RX GPIO pin configuration  */
505
	GPIO_InitStruct.Pin = USART_RX_PIN(uart_base);
506
#ifndef STM32F1_CUBE
507
	GPIO_InitStruct.Alternate = USART_RX_AF(uart_base);
508
#else
509
	GPIO_InitStruct.Mode      = GPIO_MODE_INPUT;
510
#endif /* STM32F1_CUBE */
511
	HAL_GPIO_Init(USART_RX_GPIO_PORT(uart_base), &GPIO_InitStruct);
512
	/* TODO ##-3- Configure the NVIC for UART ########################################*/
513
}
514

515