embox

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/**
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 * @file
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 * @brief PrimeCell UART (PL011)
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 * http://infocenter.arm.com/help/topic/com.arm.doc.ddi0183g/DDI0183G_uart_pl011_r1p5_trm.pdf
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 *
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 * @date 04 aug 2015
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 * @author: Anton Bondarev
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 */
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#include <stdint.h>
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#include <drivers/serial/uart_dev.h>
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#include <framework/mod/options.h>
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#include <hal/reg.h>
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#define UARTCLK         OPTION_GET(NUMBER, uartclk)
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#define USE_BOARD_CONF  OPTION_GET(BOOLEAN, use_bconf)
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/* UART Registers */
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#define UART_DR(base)   (base + 0x00)
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#define UART_RSR(base)  (base + 0x04)
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#define UART_ECR(base)  (base + 0x04)
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#define UART_FR(base)   (base + 0x18)
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#define UART_IBRD(base) (base + 0x24)
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#define UART_FBRD(base) (base + 0x28)
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#define UART_LCRH(base) (base + 0x2c)
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#define UART_CR(base)   (base + 0x30)
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#define UART_IMSC(base) (base + 0x38)
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#define UART_MIS(base)  (base + 0x40)
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#define UART_ICR(base)  (base + 0x44)
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#define UART_FEN        (1 << 4)
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#define UART_UARTEN     (1 << 0)
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#define UART_TXE        (1 << 8)
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#define UART_RXE        (1 << 9)
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#define UART_WLEN_8BIT  0x3
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#define UART_WLEN_SHIFT 5
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/* Flag register */
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#define FR_RXFE         0x10 /* Receive FIFO empty */
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#define FR_TXFF         0x20 /* Transmit FIFO full */
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#define IMSC_RXIM       (0x1 << 4)
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#if USE_BOARD_CONF
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#include "uart_setup_hw_board_config.inc"
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#else
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static inline int uart_setup_hw(struct uart *dev) {
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	return 0;
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}
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#endif /* USE_BOARD_CONF */
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static void pl011_set_baudrate(struct uart *dev) {
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	/* FIXME Init baud rate only if UARTCLK is really used.
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	 * Currenly it is not so for the teplates which use pl011. */
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#if UARTCLK != 0
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	uint32_t baud_rate;
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	int ibrd, fbrd;
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	/* Baud Rate Divisor = UARTCLK/(16×Baud Rate) = BRDI + BRDF,
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	 * See 2.4.3 UART operation.  */
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	baud_rate = dev->params.baud_rate;
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	ibrd = (UARTCLK / (16 * baud_rate));
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	fbrd = ((UARTCLK % (16 * baud_rate)) * 64) / (16 * baud_rate);
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	REG32_STORE(UART_IBRD(dev->base_addr), ibrd);
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	REG32_STORE(UART_FBRD(dev->base_addr), fbrd);
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#endif
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}
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static int pl011_irq_enable(struct uart *dev,
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    const struct uart_params *params) {
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	if (params->uart_param_flags & UART_PARAM_FLAGS_USE_IRQ) {
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		REG32_STORE(UART_IMSC(dev->base_addr), IMSC_RXIM);
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	}
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	return 0;
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}
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static int pl011_irq_disable(struct uart *dev,
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    const struct uart_params *params) {
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	REG32_STORE(UART_IMSC(dev->base_addr), 0);
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	return 0;
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}
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static int pl011_setup(struct uart *dev, const struct uart_params *params) {
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	/* Disable uart. */
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	REG32_STORE(UART_CR(dev->base_addr), 0);
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	uart_setup_hw(dev);
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	if (params->uart_param_flags & UART_PARAM_FLAGS_USE_IRQ) {
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		REG32_STORE(UART_IMSC(dev->base_addr), IMSC_RXIM);
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	}
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	pl011_set_baudrate(dev);
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	/* Word len 8 bit. */
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	REG32_STORE(UART_LCRH(dev->base_addr), UART_WLEN_8BIT << UART_WLEN_SHIFT);
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	/* Enable uart. */
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	REG32_STORE(UART_CR(dev->base_addr), UART_UARTEN | UART_TXE | UART_RXE);
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	return 0;
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}
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static int pl011_putc(struct uart *dev, int ch) {
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	while (REG32_LOAD(UART_FR(dev->base_addr)) & FR_TXFF)
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		;
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	REG32_STORE(UART_DR(dev->base_addr), (uint32_t)ch);
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	return 0;
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}
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static int pl011_getc(struct uart *dev) {
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	return REG32_LOAD(UART_DR(dev->base_addr));
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}
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static int pl011_has_symbol(struct uart *dev) {
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	return !(REG32_LOAD(UART_FR(dev->base_addr)) & FR_RXFE);
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}
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const struct uart_ops pl011_uart_ops = {
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    .uart_getc = pl011_getc,
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    .uart_putc = pl011_putc,
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    .uart_hasrx = pl011_has_symbol,
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    .uart_setup = pl011_setup,
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    .uart_irq_en = pl011_irq_enable,
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    .uart_irq_dis = pl011_irq_disable,
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};
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