embox

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/**
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 * @file
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 * @brief
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 *
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 * @author Aleksey Zhmulin
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 * @date 29.08.23
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 */
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#include <assert.h>
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#include <drivers/irqctrl.h>
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#include <kernel/critical.h>
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#include <kernel/irq.h>
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#include <kernel/printk.h>
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#include <module/embox/driver/interrupt/vic_impl.h>
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#include "vic.h"
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#include "vic_util.h"
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static int vic_irqctrl_init(void) {
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	__irqctrl_init();
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	return 0;
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}
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IRQCTRL_DEF(vic, vic_irqctrl_init);
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void irqctrl_enable(unsigned int irq) {
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	assert(irq_nr_valid(irq));
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	__irqctrl_enable(irq);
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}
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void irqctrl_disable(unsigned int irq) {
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	assert(irq_nr_valid(irq));
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	/* Disable software interrupt. If the current interrupt is hardware, it has
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	no effect. */
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	VIC_REG_STORE(irq / VIC_IRQ_COUNT, VIC_SOFT_DISABLE,
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	    1U << (irq % VIC_IRQ_COUNT));
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	__irqctrl_disable(irq);
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}
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void irqctrl_force(unsigned int irq) {
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	assert(irq_nr_valid(irq));
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	/* Enable software interrupt. */
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	VIC_REG_STORE(irq / VIC_IRQ_COUNT, VIC_SOFT_ENABLE,
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	    1U << (irq % VIC_IRQ_COUNT));
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}
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void irqctrl_eoi(unsigned int irq) {
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	int i;
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	assert(irq_nr_valid(irq));
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	/* Writing VIC_ADDR register clears the respective interrupt in the internal
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	interrupt priority hardware. */
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	for (i = 0; i < VIC_DEVICE_COUNT; i++) {
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		VIC_REG_STORE(i, VIC_ADDR, irq);
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	}
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}
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unsigned int irqctrl_get_intid(void) {
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	/*  Reading VIC_ADDR register updates the hardware priority register of the
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	interrupt controller. */
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	return VIC_REG_LOAD(0, VIC_ADDR);
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}
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