embox

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/**
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 * @file
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 *
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 * @date 11.07.10
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 * @author Anton Kozlov
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 */
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#include <assert.h>
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#include <stdint.h>
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#include <asm/interrupts.h>
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#include <drivers/irqctrl.h>
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#include <framework/mod/options.h>
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struct epic_regs {  
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	volatile uint32_t MASK_EDGE_SET;        /* 0x00 */
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	volatile uint32_t MASK_EDGE_CLEAR;      /* 0x04 */
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	volatile uint32_t MASK_LEVEL_SET;       /* 0x08 */
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	volatile uint32_t MASK_LEVEL_CLEAR;     /* 0x0C */
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	volatile uint32_t reserved[2];
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	volatile uint32_t CLEAR;                /* 0x18 */
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	volatile uint32_t STATUS;               /* 0x1C */
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	volatile uint32_t RAW_STATUS;           /* 0x20 */
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};
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#define BASE_ADDR            OPTION_GET(NUMBER, base_addr)
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#define EPIC_REGS   ((struct epic_regs *)(uintptr_t)(BASE_ADDR))
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static int epic_init(void) {
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	enable_external_interrupts();
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	return 0;
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}
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void irqctrl_enable(unsigned int interrupt_nr) {
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	EPIC_REGS->MASK_EDGE_SET |= (1U << interrupt_nr);
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}
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void irqctrl_disable(unsigned int interrupt_nr) {
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	EPIC_REGS->MASK_EDGE_CLEAR |= (1U << interrupt_nr);
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}
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void irqctrl_eoi(unsigned int irq) {
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	EPIC_REGS->CLEAR |= (1U << irq);
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}
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unsigned int irqctrl_get_intid(void) {
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	return EPIC_REGS->RAW_STATUS;
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}
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IRQCTRL_DEF(mikron_epic, epic_init);
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