embox

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/**
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 * @file
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 *
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 * @date 05 aug 2015
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 * @author: Anton Bondarev
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 */
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#include <assert.h>
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#include <stdint.h>
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#include <sys/mman.h>
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#include <drivers/common/memory.h>
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#include <drivers/irqctrl.h>
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#include <hal/ipl.h>
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#include <hal/reg.h>
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#include <kernel/critical.h>
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#include <kernel/irq.h>
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#include <kernel/printk.h>
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#define ICU_BASE     0x14000000
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/* Registers for interrupt control unit - enable/flag/master */
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#define ICU_IRQSTS   (ICU_BASE + 0x00)
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#define ICU_IRQENSET (ICU_BASE + 0x08)
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#define ICU_IRQENCLR (ICU_BASE + 0x0C)
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/**
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 * Initialize the PIC
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 */
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static int integrator_pic_init(void) {
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	REG32_STORE(ICU_IRQENCLR, ((1 << IRQCTRL_IRQS_TOTAL) - 1));
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	return 0;
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}
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void irqctrl_enable(unsigned int irq) {
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	REG32_ORIN(ICU_IRQENSET, 1 << irq);
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}
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void irqctrl_disable(unsigned int irq) {
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	REG32_STORE(ICU_IRQENCLR, 1 << irq);
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}
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void irqctrl_force(unsigned int irq) {
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}
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int irqctrl_pending(unsigned int irq) {
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	return 0;
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}
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/* Sends an EOI (end of interrupt) signal to the PICs. */
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void irqctrl_eoi(unsigned int irq) {
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}
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unsigned int irqctrl_get_intid(void) {
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	unsigned int stat;
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	unsigned int irq;
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	stat = REG32_LOAD(ICU_IRQSTS);
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	for (irq = 0; irq < IRQCTRL_IRQS_TOTAL; irq++) {
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		if (stat & (uint32_t)(1 << irq)) {
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			return irq;
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		}
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	}
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	return -1;
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}
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IRQCTRL_DEF(integrator_pic, integrator_pic_init);
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PERIPH_MEMORY_DEFINE(icu, ICU_BASE, 0x10);
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