embox

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/**
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 * @file stm32_gpio_cube.c
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 * @brief
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 * @author Denis Deryugin <deryugin.denis@gmail.com>
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 * @version 0.1
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 * @date 2016-02-12
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 */
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#include <assert.h>
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#include <string.h>
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#include <stdint.h>
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#include <embox/unit.h>
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#include <lib/libds/bit.h>
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#include <lib/libds/array.h>
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#include <kernel/irq.h>
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#include <bsp/stm32cube_hal.h>
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#include <drivers/gpio/gpio_driver.h>
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EMBOX_UNIT_INIT(stm32_gpio_init);
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#define STM32_GPIO_CHIP_ID OPTION_GET(NUMBER,gpio_chip_id)
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#define STM32_GPIO_PORTS_COUNT \
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	sizeof(stm32_gpio_ports) / sizeof(stm32_gpio_ports[0])
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static GPIO_TypeDef *stm32_gpio_ports[] = {
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	GPIOA,
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	GPIOB,
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	GPIOC,
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#ifdef GPIOD
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	GPIOD,
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#ifdef GPIOE
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	GPIOE,
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#ifdef GPIOF
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	GPIOF,
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#ifdef GPIOG
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	GPIOG,
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#ifdef GPIOH
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	GPIOH,
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#ifdef GPIOI
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	GPIOI,
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#ifdef GPIOJ
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	GPIOJ,
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#ifdef GPIOK
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	GPIOK
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#endif /* GPIOK */
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#endif /* GPIOJ */
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#endif /* GPIOI */
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#endif /* GPIOH */
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#endif /* GPIOG */
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#endif /* GPIOF */
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#endif /* GPIOE */
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#endif /* GPIOD */
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};
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static inline void stm32_gpio_clk_enable(void *gpio_base) {
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	switch ((intptr_t) gpio_base) {
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	case (intptr_t) GPIOA: __HAL_RCC_GPIOA_CLK_ENABLE(); break;
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	case (intptr_t) GPIOB: __HAL_RCC_GPIOB_CLK_ENABLE(); break;
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	case (intptr_t) GPIOC: __HAL_RCC_GPIOC_CLK_ENABLE(); break;
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#ifdef GPIOD
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	case (intptr_t) GPIOD: __HAL_RCC_GPIOD_CLK_ENABLE(); break;
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#ifdef GPIOE
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	case (intptr_t) GPIOE: __HAL_RCC_GPIOE_CLK_ENABLE(); break;
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#ifdef GPIOF
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	case (intptr_t) GPIOF: __HAL_RCC_GPIOF_CLK_ENABLE(); break;
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#ifdef GPIOG
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	case (intptr_t) GPIOG: __HAL_RCC_GPIOG_CLK_ENABLE(); break;
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#ifdef GPIOH
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	case (intptr_t) GPIOH: __HAL_RCC_GPIOH_CLK_ENABLE(); break;
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#ifdef GPIOI
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	case (intptr_t) GPIOI: __HAL_RCC_GPIOI_CLK_ENABLE(); break;
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#ifdef GPIOJ
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	case (intptr_t) GPIOJ: __HAL_RCC_GPIOJ_CLK_ENABLE(); break;
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#ifdef GPIOK
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	case (intptr_t) GPIOK: __HAL_RCC_GPIOK_CLK_ENABLE(); break;
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#endif /* GPIOK */
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#endif /* GPIOJ */
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#endif /* GPIOI */
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#endif /* GPIOH */
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#endif /* GPIOG */
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#endif /* GPIOF */
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#endif /* GPIOE */
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#endif /* GPIOD */
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	default: break;
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	}
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}
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#define EXTI0_IRQ          OPTION_GET(NUMBER, exti0_irq)
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static_assert(EXTI0_IRQ == EXTI0_IRQn, "");
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#define EXTI1_IRQ          OPTION_GET(NUMBER, exti1_irq)
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static_assert(EXTI1_IRQ == EXTI1_IRQn, "");
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#define EXTI2_IRQ          OPTION_GET(NUMBER, exti2_irq)
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#if (EXTI2_IRQ != 0)
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#if defined(STM32F303xC)
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static_assert(EXTI2_IRQ == EXTI2_TSC_IRQn, "");
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#else
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static_assert(EXTI2_IRQ == EXTI2_IRQn, "");
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#endif
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#endif /*(EXTI2_IRQ != 0)*/
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#define EXTI3_IRQ          OPTION_GET(NUMBER, exti3_irq)
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static_assert(EXTI3_IRQ == EXTI3_IRQn, "");
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#define EXTI4_IRQ          OPTION_GET(NUMBER, exti4_irq)
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static_assert(EXTI4_IRQ == EXTI4_IRQn, "");
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#define EXTI9_5_IRQ        OPTION_GET(NUMBER, exti9_5_irq)
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static_assert(EXTI9_5_IRQ == EXTI9_5_IRQn, "");
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#define EXTI15_10_IRQ     OPTION_GET(NUMBER, exti15_10_irq)
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#if (EXTI15_10_IRQ != 0)
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static_assert(EXTI15_10_IRQ == EXTI15_10_IRQn, "");
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#endif
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static const unsigned char exti_irqs[] = {
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	EXTI0_IRQ, EXTI1_IRQ, EXTI2_IRQ, EXTI3_IRQ, EXTI4_IRQ,
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	EXTI9_5_IRQ, EXTI15_10_IRQ,
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};
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static struct gpio_chip stm32_gpio_chip;
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static int stm32_gpio_setup_mode(unsigned char port, gpio_mask_t pins,
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		int mode) {
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	GPIO_InitTypeDef GPIO_InitStruct;
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	assert(port < STM32_GPIO_PORTS_COUNT);
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	stm32_gpio_clk_enable(stm32_gpio_ports[port]);
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	memset(&GPIO_InitStruct, 0, sizeof(GPIO_InitStruct));
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	GPIO_InitStruct.Pin = pins;
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	GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_HIGH;
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	GPIO_InitStruct.Pull = GPIO_NOPULL;
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	if (mode & GPIO_MODE_OUT) {
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		GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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		if (mode & GPIO_MODE_OUT_OPEN_DRAIN) {
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			GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_OD;
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		}
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		if (mode & GPIO_MODE_OUT_PUSH_PULL) {
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			GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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		}
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	} else if (mode & GPIO_MODE_IN) {
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		GPIO_InitStruct.Mode = GPIO_MODE_INPUT;
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		if (mode & GPIO_MODE_IN_PULL_UP) {
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			GPIO_InitStruct.Pull = GPIO_PULLUP;
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		}
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		if (mode & GPIO_MODE_IN_PULL_DOWN) {
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			GPIO_InitStruct.Pull = GPIO_PULLDOWN;
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		}
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	} else if (mode & GPIO_MODE_OUT_ALTERNATE) {
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#ifndef STM32F1_CUBE /* There is no Alternate field in GPIO_InitTypeDef */
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		GPIO_InitStruct.Alternate = GPIO_GET_ALTERNATE(mode);
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#endif
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		if (mode & GPIO_MODE_OUT_OPEN_DRAIN) {
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			GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
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		}
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		if (mode & GPIO_MODE_OUT_PUSH_PULL) {
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			GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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		}
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		if (mode & GPIO_MODE_IN_PULL_UP) {
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			GPIO_InitStruct.Pull = GPIO_PULLUP;
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		}
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		if (mode & GPIO_MODE_IN_PULL_DOWN) {
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			GPIO_InitStruct.Pull = GPIO_PULLDOWN;
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		}
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	} else if (mode & GPIO_MODE_INT_MODE_RISING_FALLING) {
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		if ((mode & GPIO_MODE_INT_MODE_RISING_FALLING)
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				== GPIO_MODE_INT_MODE_RISING_FALLING) {
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			GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING_FALLING;
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		} else if (mode & GPIO_MODE_INT_MODE_RISING) {
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			GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING;
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		} else if (mode & GPIO_MODE_INT_MODE_FALLING) {
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			GPIO_InitStruct.Mode = GPIO_MODE_IT_FALLING;
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		}
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	}
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	HAL_GPIO_Init(stm32_gpio_ports[port], &GPIO_InitStruct);
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	return 0;
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}
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static void stm32_gpio_set(unsigned char port, gpio_mask_t pins, char level) {
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	assert(port < STM32_GPIO_PORTS_COUNT);
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	HAL_GPIO_WritePin(stm32_gpio_ports[port], pins,
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		level ? GPIO_PIN_SET : GPIO_PIN_RESET);
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}
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static gpio_mask_t stm32_gpio_get(unsigned char port, gpio_mask_t pins) {
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	gpio_mask_t res = 0;
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	int bit;
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	assert(port < STM32_GPIO_PORTS_COUNT);
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	bit_foreach(bit, pins) {
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		res |= HAL_GPIO_ReadPin(stm32_gpio_ports[port], 1 << bit) << bit;
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	}
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	return res;
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}
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irq_return_t stm32_gpio_irq_handler(unsigned int irq_nr, void *data) {
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	int i;
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	uint16_t pending;
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	pending = __HAL_GPIO_EXTI_GET_FLAG(0xffff);
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	__HAL_GPIO_EXTI_CLEAR_IT(pending);
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	/* Notify all GPIO ports about interrupt */
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	for (i = 0; i < STM32_GPIO_PORTS_COUNT; i++) {
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		gpio_handle_irq(&stm32_gpio_chip, i, pending);
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	}
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	return IRQ_HANDLED;
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}
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static struct gpio_chip stm32_gpio_chip = {
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	.setup_mode = stm32_gpio_setup_mode,
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	.get = stm32_gpio_get,
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	.set = stm32_gpio_set,
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	.nports = STM32_GPIO_PORTS_COUNT
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};
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static int stm32_gpio_init(void) {
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	int res, i;
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	for (i = 0; i < ARRAY_SIZE(exti_irqs); i++) {
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		if (0 == exti_irqs[i]) {
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			continue;
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		}
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		res = irq_attach(exti_irqs[i], stm32_gpio_irq_handler, 0, NULL,
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			"STM32 EXTI irq handler");
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		if (res < 0) {
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			return -1;
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		}
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	}
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	return gpio_register_chip(&stm32_gpio_chip, STM32_GPIO_CHIP_ID);
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}
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STATIC_IRQ_ATTACH(EXTI0_IRQ, stm32_gpio_irq_handler, NULL);
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STATIC_IRQ_ATTACH(EXTI1_IRQ, stm32_gpio_irq_handler, NULL);
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#if (EXTI2_IRQ != 0)
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STATIC_IRQ_ATTACH(EXTI2_IRQ, stm32_gpio_irq_handler, NULL);
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#endif /* (EXTI2_IRQ != 0) */
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STATIC_IRQ_ATTACH(EXTI3_IRQ, stm32_gpio_irq_handler, NULL);
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STATIC_IRQ_ATTACH(EXTI4_IRQ, stm32_gpio_irq_handler, NULL);
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STATIC_IRQ_ATTACH(EXTI9_5_IRQ, stm32_gpio_irq_handler, NULL);
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#if (EXTI15_10_IRQ != 0)
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STATIC_IRQ_ATTACH(EXTI15_10_IRQ, stm32_gpio_irq_handler, NULL);
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#endif
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