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/**
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 * @file
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 * @brief Programmable Interval Timer (PIT) chip driver
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 *
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 * @date 27.12.10
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 * @author Nikolay Korotky
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 */
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#include <framework/mod/options.h>
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#include <errno.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <lib/libds/array.h>
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#include <hal/clock.h>
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#include <asm/io.h>
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#include <kernel/irq.h>
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#include <kernel/panic.h>
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#include <kernel/time/clock_source.h>
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#include <kernel/time/ktime.h>
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#define INPUT_CLOCK        1193182L /* clock tick rate, Hz */
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#define IRQ_NR             OPTION_GET(NUMBER,irq_num)
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#define PIT_HZ 1000
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#define PIT_LOAD ((INPUT_CLOCK + PIT_HZ / 2) / PIT_HZ)
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static_assert(PIT_LOAD < 0x10000, "");
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/**
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 * The PIT chip uses the following I/O ports:
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 * I/O port     Usage
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 * 0x40         Channel 0 data port (read/write)
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 * 0x41         Channel 1 data port (read/write)
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 * 0x42         Channel 2 data port (read/write)
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 * 0x43         Mode/Command register (write only, a read is ignored):
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 * +---------------+------------+--------------+---------------+
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 * |7             6|5          4|3            1|              0|
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 * |Select channel |Access mode |Operating mode|BCD/Binary mode|
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 *
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 * Select channel:
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 *           00 = Channel 0
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 *           01 = Channel 1
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 *           10 = Channel 2
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 *           11 = Read-back command (8254 only)
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 * Access mode:
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 *           00 = Latch count value command
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 *           01 = Access mode: lobyte only
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 *           10 = Access mode: hibyte only
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 *           11 = Access mode: lobyte/hibyte
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 * Operating mode:
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 *           000 = Mode 0 (interrupt on terminal count)
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 *           001 = Mode 1 (hardware re-triggerable one-shot)
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 *           010 = Mode 2 (rate generator)
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 *           011 = Mode 3 (square wave generator)
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 *           100 = Mode 4 (software triggered strobe)
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 *           101 = Mode 5 (hardware triggered strobe)
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 *           110 = Mode 2 (rate generator, same as 010b)
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 *           111 = Mode 3 (square wave generator, same as 011b)
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 * BCD/Binary mode: 0 = 16-bit binary, 1 = four-digit BCD
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 */
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#define CHANNEL0 0x40
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#define CHANNEL1 0x41
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#define CHANNEL2 0x42
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#define MODE_REG 0x43
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/* Mode register bits */
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#define PIT_SEL0        0x00    /* select counter 0 */
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#define PIT_SEL1        0x40    /* select counter 1 */
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#define PIT_SEL2        0x80    /* select counter 2 */
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#define PIT_INTTC       0x00    /* mode 0, intr on terminal cnt */
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#define PIT_ONESHOT     0x02    /* mode 1, one shot */
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#define PIT_RATEGEN     0x04    /* mode 2, rate generator */
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#define PIT_SQWAVE      0x06    /* mode 3, square wave */
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#define PIT_SWSTROBE    0x08    /* mode 4, s/w triggered strobe */
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#define PIT_HWSTROBE    0x0a    /* mode 5, h/w triggered strobe */
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#define PIT_LATCH       0x00    /* latch counter for reading */
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#define PIT_LSB         0x10    /* r/w counter LSB */
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#define PIT_MSB         0x20    /* r/w counter MSB */
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#define PIT_16BIT       0x30    /* r/w counter 16 bits, LSB first */
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#define PIT_BCD         0x01    /* count in BCD */
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static inline void pit_out8(uint8_t val, int port) {
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	out8(val, port);
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}
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static inline uint8_t pit_in8(int port) {
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	return in8(port);
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}
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static cycle_t i8253_read(struct clock_source *cs) {
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	unsigned char lsb, msb;
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	irq_lock();
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	{
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		pit_out8(PIT_SEL0 | PIT_LATCH, MODE_REG);
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		lsb = pit_in8(CHANNEL0);
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		msb = pit_in8(CHANNEL0);
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	}
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	irq_unlock();
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	return PIT_LOAD - ((msb << 8) | lsb);
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}
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static irq_return_t clock_handler(unsigned int irq_nr, void *dev_id) {
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	clock_tick_handler(dev_id);
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	return IRQ_HANDLED;
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}
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static int pit_clock_setup(struct clock_source *cs) {
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	uint16_t divisor = PIT_LOAD;
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	/* Propose switch by all modes in future */
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	/* Set control byte */
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	pit_out8(PIT_SEL0 | PIT_16BIT | PIT_RATEGEN, MODE_REG);
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	/* Send divisor */
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	pit_out8(divisor & 0xFF, CHANNEL0);
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	pit_out8(divisor >> 8, CHANNEL0);
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	return ENOERR;
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}
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static struct time_event_device pit_event_device = {
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	.set_periodic = pit_clock_setup,
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	.irq_nr = IRQ_NR,
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};
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static struct time_counter_device pit_counter_device = {
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	.read = i8253_read,
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	.cycle_hz = INPUT_CLOCK,
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	.mask = 0xffff,
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};
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static int pit_clock_init(struct clock_source *cs) {
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	pit_clock_setup(NULL);
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	if (ENOERR != irq_attach(IRQ_NR, clock_handler, 0, cs, "PIT")) {
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		panic("pit timer irq_attach failed");
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	}
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	return ENOERR;
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}
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CLOCK_SOURCE_DEF(pit, pit_clock_init, NULL,
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	&pit_event_device, &pit_counter_device);
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