embox

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/**
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 * @file
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 *
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 * @brief RISC-V build-in timer
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 *
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 * @date 12.12.2019
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 * @author Anastasia Nizharadze
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 */
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#include <errno.h>
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#include <stdint.h>
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#include <asm/interrupts.h>
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#include <asm/regs.h>
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#include <framework/mod/options.h>
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#include <hal/clock.h>
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#include <hal/reg.h>
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#include <hal/system.h>
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#include <kernel/irq.h>
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#include <kernel/time/clock_source.h>
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#include <kernel/time/time.h>
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#define BASE_ADDR    OPTION_GET(NUMBER, base_addr)
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#define COUNT_OFFSET (RTC_CLOCK / JIFFIES_PERIOD)
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#define RTC_CLOCK    OPTION_GET(NUMBER, rtc_freq)
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#define SCR1_TIMER_ENABLE_S             0
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#define SCR1_TIMER_ENABLE_M             (1 << SCR1_TIMER_ENABLE_S)
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#define SCR1_TIMER_CLKSRC_S             1
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#define SCR1_TIMER_CLKSRC_M             (1 << SCR1_TIMER_CLKSRC_S)
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#define SCR1_TIMER_CLKSRC_INTERNAL_M    (0 << SCR1_TIMER_CLKSRC_S)
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#define SCR1_TIMER_CLKSRC_RTC_M         (1 << SCR1_TIMER_CLKSRC_S)
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struct mikron_clk_regs {
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	volatile uint32_t TIMER_CTRL;
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	volatile uint32_t TIMER_DIV;
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	volatile uint32_t MTIME;
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	volatile uint32_t MTIMEH;
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	volatile uint32_t MTIMECMP;
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	volatile uint32_t MTIMECMPH;
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};
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static struct mikron_clk_regs *SCR1_TIMER = (void*)(uintptr_t)BASE_ADDR;
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static int clock_handler(unsigned int irq_nr, void *dev_id) {
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	//REG64_STORE(MTIMECMP, REG64_LOAD(MTIME) + COUNT_OFFSET);
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	*(unsigned long long *) &SCR1_TIMER->MTIMECMP += COUNT_OFFSET;
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	clock_tick_handler(dev_id);
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	return IRQ_HANDLED;
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}
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static int riscv_clock_setup(struct clock_source *cs) {
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	//REG64_STORE(MTIMECMP, REG64_LOAD(MTIME) + COUNT_OFFSET);
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	*(unsigned long long *) &SCR1_TIMER->MTIME = 0;
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	*(unsigned long long *) &SCR1_TIMER->MTIMECMP = COUNT_OFFSET;
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	//SCR1_TIMER->TIMER_CTRL |= SCR1_TIMER_ENABLE_M;
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	return ENOERR;
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}
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static int mikron_clk_init(struct clock_source *cs) {
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	//REG64_STORE(MTIMECMP, REG64_LOAD(MTIME) + COUNT_OFFSET);
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	SCR1_TIMER->TIMER_DIV = 0;
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	*(unsigned long long *) &SCR1_TIMER->MTIME = 0;
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	*(unsigned long long *) &SCR1_TIMER->MTIMECMP = COUNT_OFFSET;
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	SCR1_TIMER->TIMER_CTRL |= SCR1_TIMER_ENABLE_M;
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	//SCR1_TIMER->TIMER_CTRL &= ~SCR1_TIMER_ENABLE_M;
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	enable_timer_interrupts();
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	return ENOERR;
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}
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static struct time_event_device riscv_event_device = {
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    .set_periodic = riscv_clock_setup,
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    .name = "mikron_clk",
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    .irq_nr = IRQ_TIMER,
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};
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CLOCK_SOURCE_DEF(mikron_clk, mikron_clk_init, NULL, &riscv_event_device, NULL);
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RISCV_TIMER_IRQ_DEF(clock_handler, &CLOCK_SOURCE_NAME(mikron_clk));
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