embox

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/**
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 * @file
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 * @brief
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 *
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 * @date 28.12.2012
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 * @author Anton Bulychev
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 */
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#include <embox/unit.h>
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#include <stdint.h>
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#include <errno.h>
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#include <asm/io.h>
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#include <hal/ipl.h>
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#include <hal/cpu.h>
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#include <hal/clock.h>
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#include <kernel/irq.h>
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#include <kernel/panic.h>
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#include <kernel/time/clock_source.h>
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#include <kernel/time/ktime.h>
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#include <module/embox/driver/interrupt/lapic.h>
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#define IRQ0               0x0
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#define LAPIC_HZ           1000     /* You can change it */
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static int lapic_clock_setup(struct clock_source *cs);
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static irq_return_t clock_handler(unsigned int irq_nr, void *dev_id) {
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	clock_tick_handler(dev_id);
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	return IRQ_HANDLED;
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}
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static struct time_event_device lapic_event_device = {
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	.set_periodic = lapic_clock_setup,
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	.name = "lapic clock",
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	.irq_nr = IRQ0,
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};
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static int lapic_timer_init(struct clock_source *cs) {
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	ipl_t ipl = ipl_save();
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	if (ENOERR != irq_attach(IRQ0, clock_handler, 0, cs, "lapic")) {
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		panic("lapic timer irq_attach failed");
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	}
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	lapic_clock_setup(NULL);
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	ipl_restore(ipl);
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	return ENOERR;
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}
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int lapic_clock_setup(struct clock_source *cs) {
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	static int initialized = 0;
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	uint32_t ticks, cpubusfreq, counter;
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	uint8_t tmp;
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	if (initialized & 0x1 << cpu_get_id()) {
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		return ENOERR;
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	}else
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		initialized |= 0x1 << cpu_get_id();
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	/*
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	 * Map APIC timer to an interrupt, and by that enable it in
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	 * one-shot mode.
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	 */
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	lapic_write(LAPIC_LVT_TR, 32);
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	/* Set up divide value to 16 */
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	lapic_write(LAPIC_TIMER_DCR, 0x03);
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	/*
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	 * Initialize PIT Ch 2 in one-shot mode.
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	 * Waiting 1/100 sec.
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	 */
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	outb((inb(0x61) & 0xFD) | 1, 0x61);
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	outb(0xB2, 0x43);
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	/* 1193180/100 Hz = 11931 = 2e9bh */
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	outb(0x9B, 0x42);	/* LSB */
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	inb(0x60);	/* short delay */
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	outb(0x2E, 0x42);	/* MSB */
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	/* Reset PIT one-shot counter (start counting) */
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	tmp = inb(0x61) & 0xFE;
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	outb((uint8_t) tmp, 0x61);     /* Gate low */
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	outb((uint8_t) tmp | 1, 0x61); /* Gate high */
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	/* Reset APIC timer (set counter to -1) */
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	lapic_write(LAPIC_TIMER_ICR, 0xFFFFFFFF);
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	/* Now wait until PIT counter reaches zero */
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	while(!(inb(0x61) & 0x20));
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	/* Stop APIC timer */
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	lapic_write(LAPIC_LVT_TR, 0x10000);
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	/* Now do the math... */
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	ticks = (0xFFFFFFFF - lapic_read(LAPIC_TIMER_CCR)) + 1;
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	cpubusfreq = ticks * 16 * 100;
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	counter = cpubusfreq / LAPIC_HZ / 16;
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	/* Set APIC timer counter initializer */
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	lapic_write(LAPIC_TIMER_ICR, counter < 16 ? 16 : counter);
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	/* Finally re-enable timer in periodic mode. */
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	lapic_write(LAPIC_LVT_TR, 32 | 0x20000);
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#if 0
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	/*
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	 * Setting divide value register again not needed by the manuals
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	 * although I have found buggy hardware that required it
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	 */
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	lapic_write(LAPIC_TIMER_DCR, 0x03);
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#endif
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	return ENOERR;
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}
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CLOCK_SOURCE_DEF(lapic_timer, lapic_timer_init, NULL,
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	&lapic_event_device, NULL);
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