embox

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/**
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 * @file
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 *
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 * @date 05 aug 2015
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 * @author: Anton Bondarev
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 */
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#include <sys/mman.h>
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#include <drivers/common/memory.h>
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#include <hal/clock.h>
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#include <hal/reg.h>
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#include <kernel/irq.h>
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#include <kernel/printk.h>
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#include <kernel/time/clock_source.h>
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#include <kernel/time/time.h>
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#define TIMER_BASE     OPTION_GET(NUMBER, base_addr)
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/* Interrupt vector for timer (TMR1) */
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#define CLOCK_IRQ      5
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/* The clock rate per second */
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#define CLOCK_RATE     48054841L
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/* The initial counter value */
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#define TIMER_COUNT    (CLOCK_RATE / JIFFIES_PERIOD)
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/* Timer 1 registers */
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#define TMR_LOAD       (TIMER_BASE + 0x000)
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#define TMR_VAL        (TIMER_BASE + 0x004)
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#define TMR_CTRL       (TIMER_BASE + 0x008)
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#define TMR_CLR        (TIMER_BASE + 0x00c)
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#define TMR_BGLOAD     (TIMER_BASE + 0x024)
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/* Timer control register */
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#define TCTRL_DISABLE  0x00
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#define TCTRL_ENABLE   0x80
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#define TCTRL_PERIODIC 0x40
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#define TCTRL_INTEN    0x20
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#define TCTRL_SCALE256 0x08
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#define TCTRL_SCALE16  0x04
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#define TCTRL_32BIT    0x02
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#define TCTRL_ONESHOT  0x01
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static int integratorcp_clock_setup(struct clock_source *cs) {
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	/* Setup counter value */
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	REG32_STORE(TMR_CTRL, TCTRL_DISABLE);
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	REG32_STORE(TMR_LOAD, TIMER_COUNT);
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	REG32_ORIN(TMR_CTRL, (TCTRL_ENABLE | TCTRL_PERIODIC));
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	/* Enable timer interrupt */
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	REG32_ORIN(TMR_CTRL, TCTRL_INTEN);
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	return 0;
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}
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static struct time_event_device integratorcp_event_device = {
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    .set_periodic = integratorcp_clock_setup,
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    .name = "integratorcp_clk",
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    .irq_nr = CLOCK_IRQ,
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};
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static cycle_t integratorcp_counter_read(struct clock_source *cs) {
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	return REG32_LOAD(TMR_VAL) & 0xFFFF;
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}
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static struct time_counter_device integratorcp_counter_device = {
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    .cycle_hz = CLOCK_RATE,
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    .read = integratorcp_counter_read,
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};
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static irq_return_t clock_handler(unsigned int irq_nr, void *dev_id) {
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	clock_tick_handler(dev_id);
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	REG32_STORE(TMR_CLR, 0x01); /* Clear timer interrupt */
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	return IRQ_HANDLED;
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}
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static int integratorcp_cs_init(struct clock_source *cs) {
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	return irq_attach(CLOCK_IRQ, clock_handler, 0, cs, "integratorcp_clk");
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}
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CLOCK_SOURCE_DEF(integratorcp, integratorcp_cs_init, NULL,
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    &integratorcp_event_device, &integratorcp_counter_device);
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PERIPH_MEMORY_DEFINE(integratorcp_clock, TIMER_BASE, 0x30);
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