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/**
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 * @file
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 * @brief
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 *
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 * @author  Anton Kozlov
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 * @date    30.10.2014
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 */
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#include <bsp/stm32cube_hal.h>
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/**
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  * @brief  System Clock Configuration
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  *         The system Clock is configured as follow :
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  *            System Clock source            = PLL (HSE)
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  *            SYSCLK(Hz)                     = 24000000
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  *            HCLK(Hz)                       = 24000000
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  *            AHB Prescaler                  = 1
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  *            APB1 Prescaler                 = 1
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  *            APB2 Prescaler                 = 1
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  *            HSE Frequency(Hz)              = 8000000
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  *            HSE PREDIV1                    = 2
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  *            PLLMUL                         = 6
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  *            Flash Latency(WS)              = 0
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  * @param  None
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  * @retval None
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  */
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void SystemClock_Config(void) {
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	RCC_ClkInitTypeDef clkinitstruct = {0};
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	RCC_OscInitTypeDef oscinitstruct = {0};
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	/* Enable HSE Oscillator and activate PLL with HSE as source */
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	oscinitstruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
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	oscinitstruct.HSEState = RCC_HSE_ON;
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	oscinitstruct.HSEPredivValue = RCC_HSE_PREDIV_DIV2;
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	oscinitstruct.PLL.PLLState = RCC_PLL_ON;
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	oscinitstruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
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	oscinitstruct.PLL.PLLMUL = RCC_PLL_MUL6;
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	if (HAL_RCC_OscConfig(&oscinitstruct) != HAL_OK) {
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		/* Initialization Error */
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		while (1)
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			;
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	}
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	/* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
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     clocks dividers */
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	clkinitstruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK
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	                           | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
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	clkinitstruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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	clkinitstruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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	clkinitstruct.APB2CLKDivider = RCC_HCLK_DIV1;
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	clkinitstruct.APB1CLKDivider = RCC_HCLK_DIV1;
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	if (HAL_RCC_ClockConfig(&clkinitstruct, FLASH_LATENCY_0) != HAL_OK) {
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		/* Initialization Error */
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		while (1)
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			;
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	}
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}
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