embox

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/**
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 * @file
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 *
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 * @date Jan 24, 2023
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 * @author Anton Bondarev
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 */
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#include <hal/platform.h>
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#include <hal/reg.h>
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#include "clkctr.h"
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#include "eliot1_board.h"
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#define FPU_CPACR  0xE000ED88
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#define FPU_NSACR  0xE000ED8C
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#define FPU_FPCCR  0xE000EF34
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#define CLOCK_BASE ((struct clkctr_regs *)CLKCTR_BASE)
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static void board_clocks_init(void) {
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	if (REG_LOAD(CPU_IDENTITY_REG) == 0) {
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		clkctr_set_pll(CLOCK_BASE, 0, 0);
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		clkctr_set_sys_div(CLOCK_BASE, 0,              /* FCLK == MAINCLK */
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		    (BOARD_FCLK_FREQ / BOARD_SYSCLK_FREQ) - 1, /* SYSCLK DIV */
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		    (BOARD_FCLK_FREQ / BOARD_GNSS_FREQ) - 1,   /* GNSSCLK DIV */
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		    (BOARD_FCLK_FREQ / BOARD_QSPI_FREQ) - 1);  /* QSPI DIV */
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		clkctr_set_pll(CLOCK_BASE, BOARD_XTI_FREQ,
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		    (BOARD_FCLK_FREQ / BOARD_XTI_FREQ) - 1);
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	}
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}
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void platform_init(void) {
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	board_clocks_init();
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	/* Enable FPU */
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	/* FIXME: Currently FPU is enabled permanently */
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	REG32_ORIN(FPU_CPACR, 0xf << 20);
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	/* Set CP0, CP1 Full Access in Secure mode (enable PowerQuad) */
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	REG32_ORIN(FPU_CPACR, (3UL << 0 * 2) | (3UL << 1 * 2));
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	REG32_ORIN(FPU_NSACR, 0xf << 20);
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	/* Enable CP0, CP1, CP10, CP11 Non-secure Access  */
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	REG32_ORIN(FPU_NSACR, (3UL << 0 * 2) | (3UL << 1 * 2));
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	/* Disable FPU context preservation/restoration on exception
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	 * entry and exit, because we can guarantee every irq handler
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	 * execute without using FPU */
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	REG32_CLEAR(FPU_FPCCR, 0x3 << 30);
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}
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