qemu
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1/*
2* qemu user cpu loop
3*
4* Copyright (c) 2003-2008 Fabrice Bellard
5*
6* This program is free software; you can redistribute it and/or modify
7* it under the terms of the GNU General Public License as published by
8* the Free Software Foundation; either version 2 of the License, or
9* (at your option) any later version.
10*
11* This program is distributed in the hope that it will be useful,
12* but WITHOUT ANY WARRANTY; without even the implied warranty of
13* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14* GNU General Public License for more details.
15*
16* You should have received a copy of the GNU General Public License
17* along with this program; if not, see <http://www.gnu.org/licenses/>.
18*/
19
20#include "qemu/osdep.h"
21#include "qemu.h"
22#include "user-internals.h"
23#include "cpu_loop-common.h"
24#include "signal-common.h"
25
26#define SPARC64_STACK_BIAS 2047
27
28//#define DEBUG_WIN
29
30/* WARNING: dealing with register windows _is_ complicated. More info
31can be found at http://www.sics.se/~psm/sparcstack.html */
32static inline int get_reg_index(CPUSPARCState *env, int cwp, int index)
33{
34index = (index + cwp * 16) % (16 * env->nwindows);
35/* wrap handling : if cwp is on the last window, then we use the
36registers 'after' the end */
37if (index < 8 && env->cwp == env->nwindows - 1)
38index += 16 * env->nwindows;
39return index;
40}
41
42/* save the register window 'cwp1' */
43static inline void save_window_offset(CPUSPARCState *env, int cwp1)
44{
45unsigned int i;
46abi_ulong sp_ptr;
47
48sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
49#ifdef TARGET_SPARC64
50if (sp_ptr & 3)
51sp_ptr += SPARC64_STACK_BIAS;
52#endif
53#if defined(DEBUG_WIN)
54printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n",
55sp_ptr, cwp1);
56#endif
57for(i = 0; i < 16; i++) {
58/* FIXME - what to do if put_user() fails? */
59put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
60sp_ptr += sizeof(abi_ulong);
61}
62}
63
64static void save_window(CPUSPARCState *env)
65{
66#ifndef TARGET_SPARC64
67unsigned int new_wim;
68new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) &
69((1LL << env->nwindows) - 1);
70save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
71env->wim = new_wim;
72#else
73/*
74* cansave is zero if the spill trap handler is triggered by `save` and
75* nonzero if triggered by a `flushw`
76*/
77save_window_offset(env, cpu_cwp_dec(env, env->cwp - env->cansave - 2));
78env->cansave++;
79env->canrestore--;
80#endif
81}
82
83static void restore_window(CPUSPARCState *env)
84{
85#ifndef TARGET_SPARC64
86unsigned int new_wim;
87#endif
88unsigned int i, cwp1;
89abi_ulong sp_ptr;
90
91#ifndef TARGET_SPARC64
92new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) &
93((1LL << env->nwindows) - 1);
94#endif
95
96/* restore the invalid window */
97cwp1 = cpu_cwp_inc(env, env->cwp + 1);
98sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
99#ifdef TARGET_SPARC64
100if (sp_ptr & 3)
101sp_ptr += SPARC64_STACK_BIAS;
102#endif
103#if defined(DEBUG_WIN)
104printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n",
105sp_ptr, cwp1);
106#endif
107for(i = 0; i < 16; i++) {
108/* FIXME - what to do if get_user() fails? */
109get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
110sp_ptr += sizeof(abi_ulong);
111}
112#ifdef TARGET_SPARC64
113env->canrestore++;
114if (env->cleanwin < env->nwindows - 1)
115env->cleanwin++;
116env->cansave--;
117#else
118env->wim = new_wim;
119#endif
120}
121
122static void flush_windows(CPUSPARCState *env)
123{
124int offset, cwp1;
125
126offset = 1;
127for(;;) {
128/* if restore would invoke restore_window(), then we can stop */
129cwp1 = cpu_cwp_inc(env, env->cwp + offset);
130#ifndef TARGET_SPARC64
131if (env->wim & (1 << cwp1))
132break;
133#else
134if (env->canrestore == 0)
135break;
136env->cansave++;
137env->canrestore--;
138#endif
139save_window_offset(env, cwp1);
140offset++;
141}
142cwp1 = cpu_cwp_inc(env, env->cwp + 1);
143#ifndef TARGET_SPARC64
144/* set wim so that restore will reload the registers */
145env->wim = 1 << cwp1;
146#endif
147#if defined(DEBUG_WIN)
148printf("flush_windows: nb=%d\n", offset - 1);
149#endif
150}
151
152static void next_instruction(CPUSPARCState *env)
153{
154env->pc = env->npc;
155env->npc = env->npc + 4;
156}
157
158static uint32_t do_getcc(CPUSPARCState *env)
159{
160#ifdef TARGET_SPARC64
161return cpu_get_ccr(env) & 0xf;
162#else
163return extract32(cpu_get_psr(env), 20, 4);
164#endif
165}
166
167static void do_setcc(CPUSPARCState *env, uint32_t icc)
168{
169#ifdef TARGET_SPARC64
170cpu_put_ccr(env, (cpu_get_ccr(env) & 0xf0) | (icc & 0xf));
171#else
172cpu_put_psr(env, deposit32(cpu_get_psr(env), 20, 4, icc));
173#endif
174}
175
176static uint32_t do_getpsr(CPUSPARCState *env)
177{
178#ifdef TARGET_SPARC64
179const uint64_t TSTATE_CWP = 0x1f;
180const uint64_t TSTATE_ICC = 0xfull << 32;
181const uint64_t TSTATE_XCC = 0xfull << 36;
182const uint32_t PSR_S = 0x00000080u;
183const uint32_t PSR_V8PLUS = 0xff000000u;
184uint64_t tstate = sparc64_tstate(env);
185
186/* See <asm/psrcompat.h>, tstate_to_psr. */
187return ((tstate & TSTATE_CWP) |
188PSR_S |
189((tstate & TSTATE_ICC) >> 12) |
190((tstate & TSTATE_XCC) >> 20) |
191PSR_V8PLUS);
192#else
193return (cpu_get_psr(env) & (PSR_ICC | PSR_CWP)) | PSR_S;
194#endif
195}
196
197/* Avoid ifdefs below for the abi32 and abi64 paths. */
198#ifdef TARGET_ABI32
199#define TARGET_TT_SYSCALL (TT_TRAP + 0x10) /* t_linux */
200#else
201#define TARGET_TT_SYSCALL (TT_TRAP + 0x6d) /* tl0_linux64 */
202#endif
203
204/* Avoid ifdefs below for the v9 and pre-v9 hw traps. */
205#ifdef TARGET_SPARC64
206#define TARGET_TT_SPILL TT_SPILL
207#define TARGET_TT_FILL TT_FILL
208#else
209#define TARGET_TT_SPILL TT_WIN_OVF
210#define TARGET_TT_FILL TT_WIN_UNF
211#endif
212
213void cpu_loop (CPUSPARCState *env)
214{
215CPUState *cs = env_cpu(env);
216int trapnr;
217abi_long ret;
218
219while (1) {
220cpu_exec_start(cs);
221trapnr = cpu_exec(cs);
222cpu_exec_end(cs);
223process_queued_cpu_work(cs);
224
225switch (trapnr) {
226case TARGET_TT_SYSCALL:
227ret = do_syscall (env, env->gregs[1],
228env->regwptr[0], env->regwptr[1],
229env->regwptr[2], env->regwptr[3],
230env->regwptr[4], env->regwptr[5],
2310, 0);
232if (ret == -QEMU_ERESTARTSYS || ret == -QEMU_ESIGRETURN) {
233break;
234}
235if ((abi_ulong)ret >= (abi_ulong)(-515)) {
236set_syscall_C(env, 1);
237ret = -ret;
238} else {
239set_syscall_C(env, 0);
240}
241env->regwptr[0] = ret;
242/* next instruction */
243env->pc = env->npc;
244env->npc = env->npc + 4;
245break;
246
247case TT_TRAP + 0x01: /* breakpoint */
248case EXCP_DEBUG:
249force_sig_fault(TARGET_SIGTRAP, TARGET_TRAP_BRKPT, env->pc);
250break;
251
252case TT_TRAP + 0x02: /* div0 */
253case TT_DIV_ZERO:
254force_sig_fault(TARGET_SIGFPE, TARGET_FPE_INTDIV, env->pc);
255break;
256
257case TT_TRAP + 0x03: /* flush windows */
258flush_windows(env);
259next_instruction(env);
260break;
261
262case TT_TRAP + 0x20: /* getcc */
263env->gregs[1] = do_getcc(env);
264next_instruction(env);
265break;
266case TT_TRAP + 0x21: /* setcc */
267do_setcc(env, env->gregs[1]);
268next_instruction(env);
269break;
270case TT_TRAP + 0x22: /* getpsr */
271env->gregs[1] = do_getpsr(env);
272next_instruction(env);
273break;
274
275#ifdef TARGET_SPARC64
276case TT_TRAP + 0x6e:
277flush_windows(env);
278sparc64_get_context(env);
279break;
280case TT_TRAP + 0x6f:
281flush_windows(env);
282sparc64_set_context(env);
283break;
284#endif
285
286case TARGET_TT_SPILL: /* window overflow */
287save_window(env);
288break;
289case TARGET_TT_FILL: /* window underflow */
290restore_window(env);
291break;
292
293case TT_FP_EXCP:
294{
295int code = TARGET_FPE_FLTUNK;
296target_ulong fsr = cpu_get_fsr(env);
297
298if ((fsr & FSR_FTT_MASK) == FSR_FTT_IEEE_EXCP) {
299if (fsr & FSR_NVC) {
300code = TARGET_FPE_FLTINV;
301} else if (fsr & FSR_OFC) {
302code = TARGET_FPE_FLTOVF;
303} else if (fsr & FSR_UFC) {
304code = TARGET_FPE_FLTUND;
305} else if (fsr & FSR_DZC) {
306code = TARGET_FPE_FLTDIV;
307} else if (fsr & FSR_NXC) {
308code = TARGET_FPE_FLTRES;
309}
310}
311force_sig_fault(TARGET_SIGFPE, code, env->pc);
312}
313break;
314
315case EXCP_INTERRUPT:
316/* just indicate that signals should be handled asap */
317break;
318case TT_ILL_INSN:
319force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC, env->pc);
320break;
321case TT_PRIV_INSN:
322force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVOPC, env->pc);
323break;
324case TT_TOVF:
325force_sig_fault(TARGET_SIGEMT, TARGET_EMT_TAGOVF, env->pc);
326break;
327#ifdef TARGET_SPARC64
328case TT_PRIV_ACT:
329/* Note do_privact defers to do_privop. */
330force_sig_fault(TARGET_SIGILL, TARGET_ILL_PRVOPC, env->pc);
331break;
332#else
333case TT_NCP_INSN:
334force_sig_fault(TARGET_SIGILL, TARGET_ILL_COPROC, env->pc);
335break;
336case TT_UNIMP_FLUSH:
337next_instruction(env);
338break;
339#endif
340case EXCP_ATOMIC:
341cpu_exec_step_atomic(cs);
342break;
343default:
344/*
345* Most software trap numbers vector to BAD_TRAP.
346* Handle anything not explicitly matched above.
347*/
348if (trapnr >= TT_TRAP && trapnr <= TT_TRAP + 0x7f) {
349force_sig_fault(TARGET_SIGILL, ILL_ILLTRP, env->pc);
350break;
351}
352fprintf(stderr, "Unhandled trap: 0x%x\n", trapnr);
353cpu_dump_state(cs, stderr, 0);
354exit(EXIT_FAILURE);
355}
356process_pending_signals (env);
357}
358}
359
360void target_cpu_copy_regs(CPUArchState *env, struct target_pt_regs *regs)
361{
362int i;
363env->pc = regs->pc;
364env->npc = regs->npc;
365env->y = regs->y;
366for(i = 0; i < 8; i++)
367env->gregs[i] = regs->u_regs[i];
368for(i = 0; i < 8; i++)
369env->regwptr[i] = regs->u_regs[i + 8];
370}
371