qemu

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/*
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 * pcie_host.c
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 * utility functions for pci express host bridge.
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 *
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 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
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 *                    VA Linux Systems Japan K.K.
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 * You should have received a copy of the GNU General Public License along
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 * with this program; if not, see <http://www.gnu.org/licenses/>.
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 */
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#include "qemu/osdep.h"
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#include "hw/pci/pci_device.h"
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#include "hw/pci/pcie_host.h"
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#include "qemu/module.h"
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/* a helper function to get a PCIDevice for a given mmconfig address */
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static inline PCIDevice *pcie_dev_find_by_mmcfg_addr(PCIBus *s,
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                                                     uint32_t mmcfg_addr)
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{
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    return pci_find_device(s, PCIE_MMCFG_BUS(mmcfg_addr),
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                           PCIE_MMCFG_DEVFN(mmcfg_addr));
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}
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static void pcie_mmcfg_data_write(void *opaque, hwaddr mmcfg_addr,
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                                  uint64_t val, unsigned len)
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{
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    PCIExpressHost *e = opaque;
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    PCIBus *s = e->pci.bus;
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    PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr);
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    uint32_t addr;
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    uint32_t limit;
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    if (!pci_dev) {
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        return;
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    }
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    addr = PCIE_MMCFG_CONFOFFSET(mmcfg_addr);
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    limit = pci_config_size(pci_dev);
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    pci_host_config_write_common(pci_dev, addr, limit, val, len);
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}
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static uint64_t pcie_mmcfg_data_read(void *opaque,
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                                     hwaddr mmcfg_addr,
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                                     unsigned len)
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{
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    PCIExpressHost *e = opaque;
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    PCIBus *s = e->pci.bus;
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    PCIDevice *pci_dev = pcie_dev_find_by_mmcfg_addr(s, mmcfg_addr);
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    uint32_t addr;
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    uint32_t limit;
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    if (!pci_dev) {
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        return ~0x0;
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    }
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    addr = PCIE_MMCFG_CONFOFFSET(mmcfg_addr);
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    limit = pci_config_size(pci_dev);
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    return pci_host_config_read_common(pci_dev, addr, limit, len);
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}
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static const MemoryRegionOps pcie_mmcfg_ops = {
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    .read = pcie_mmcfg_data_read,
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    .write = pcie_mmcfg_data_write,
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    .endianness = DEVICE_LITTLE_ENDIAN,
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};
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static void pcie_host_init(Object *obj)
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{
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    PCIExpressHost *e = PCIE_HOST_BRIDGE(obj);
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    e->base_addr = PCIE_BASE_ADDR_UNMAPPED;
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    memory_region_init_io(&e->mmio, OBJECT(e), &pcie_mmcfg_ops, e, "pcie-mmcfg-mmio",
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                          PCIE_MMCFG_SIZE_MAX);
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}
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void pcie_host_mmcfg_unmap(PCIExpressHost *e)
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{
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    if (e->base_addr != PCIE_BASE_ADDR_UNMAPPED) {
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        memory_region_del_subregion(get_system_memory(), &e->mmio);
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        e->base_addr = PCIE_BASE_ADDR_UNMAPPED;
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    }
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}
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void pcie_host_mmcfg_init(PCIExpressHost *e, uint32_t size)
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{
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    assert(!(size & (size - 1)));       /* power of 2 */
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    assert(size >= PCIE_MMCFG_SIZE_MIN);
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    assert(size <= PCIE_MMCFG_SIZE_MAX);
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    e->size = size;
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    memory_region_set_size(&e->mmio, e->size);
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}
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void pcie_host_mmcfg_map(PCIExpressHost *e, hwaddr addr,
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                         uint32_t size)
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{
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    pcie_host_mmcfg_init(e, size);
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    e->base_addr = addr;
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    memory_region_add_subregion(get_system_memory(), e->base_addr, &e->mmio);
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}
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void pcie_host_mmcfg_update(PCIExpressHost *e,
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                            int enable,
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                            hwaddr addr,
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                            uint32_t size)
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{
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    memory_region_transaction_begin();
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    pcie_host_mmcfg_unmap(e);
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    if (enable) {
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        pcie_host_mmcfg_map(e, addr, size);
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    }
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    memory_region_transaction_commit();
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}
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static const TypeInfo pcie_host_type_info = {
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    .name = TYPE_PCIE_HOST_BRIDGE,
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    .parent = TYPE_PCI_HOST_BRIDGE,
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    .abstract = true,
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    .instance_size = sizeof(PCIExpressHost),
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    .instance_init = pcie_host_init,
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};
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static void pcie_host_register_types(void)
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{
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    type_register_static(&pcie_host_type_info);
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}
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type_init(pcie_host_register_types)
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