qemu

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/*
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 * Standard PCI Bridge Device
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 *
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 * Copyright (c) 2011 Red Hat Inc. Author: Michael S. Tsirkin <mst@redhat.com>
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 *
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 * http://www.pcisig.com/specifications/conventional/pci_to_pci_bridge_architecture/
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 *
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 * This program is free software; you can redistribute it and/or modify
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 * it under the terms of the GNU General Public License as published by
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 * the Free Software Foundation; either version 2 of the License, or
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 * (at your option) any later version.
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 *
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 * This program is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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 * GNU General Public License for more details.
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 *
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 * You should have received a copy of the GNU General Public License along
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 * with this program; if not, see <http://www.gnu.org/licenses/>.
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 */
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qemu/module.h"
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#include "hw/pci/pci_bridge.h"
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#include "hw/pci/pci_ids.h"
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#include "hw/pci/msi.h"
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#include "hw/pci/shpc.h"
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#include "hw/pci/slotid_cap.h"
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#include "hw/qdev-properties.h"
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#include "exec/memory.h"
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#include "hw/pci/pci_bus.h"
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#include "hw/hotplug.h"
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#include "qom/object.h"
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#define TYPE_PCI_BRIDGE_DEV      "pci-bridge"
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#define TYPE_PCI_BRIDGE_SEAT_DEV "pci-bridge-seat"
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OBJECT_DECLARE_SIMPLE_TYPE(PCIBridgeDev, PCI_BRIDGE_DEV)
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struct PCIBridgeDev {
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    /*< private >*/
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    PCIBridge parent_obj;
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    /*< public >*/
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    MemoryRegion bar;
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    uint8_t chassis_nr;
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#define PCI_BRIDGE_DEV_F_SHPC_REQ 0
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    uint32_t flags;
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    OnOffAuto msi;
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    /* additional resources to reserve */
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    PCIResReserve res_reserve;
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};
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static void pci_bridge_dev_realize(PCIDevice *dev, Error **errp)
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{
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    PCIBridge *br = PCI_BRIDGE(dev);
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    PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
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    int err;
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    Error *local_err = NULL;
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    pci_bridge_initfn(dev, TYPE_PCI_BUS);
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    if (bridge_dev->flags & (1 << PCI_BRIDGE_DEV_F_SHPC_REQ)) {
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        dev->config[PCI_INTERRUPT_PIN] = 0x1;
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        memory_region_init(&bridge_dev->bar, OBJECT(dev), "shpc-bar",
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                           shpc_bar_size(dev));
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        err = shpc_init(dev, &br->sec_bus, &bridge_dev->bar, 0, errp);
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        if (err) {
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            goto shpc_error;
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        }
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    } else {
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        /* MSI is not applicable without SHPC */
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        bridge_dev->msi = ON_OFF_AUTO_OFF;
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    }
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    err = slotid_cap_init(dev, 0, bridge_dev->chassis_nr, 0, errp);
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    if (err) {
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        goto slotid_error;
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    }
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    if (bridge_dev->msi != ON_OFF_AUTO_OFF) {
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        /* it means SHPC exists, because MSI is needed by SHPC */
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        err = msi_init(dev, 0, 1, true, true, &local_err);
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        /* Any error other than -ENOTSUP(board's MSI support is broken)
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         * is a programming error */
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        assert(!err || err == -ENOTSUP);
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        if (err && bridge_dev->msi == ON_OFF_AUTO_ON) {
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            /* Can't satisfy user's explicit msi=on request, fail */
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            error_append_hint(&local_err, "You have to use msi=auto (default) "
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                    "or msi=off with this machine type.\n");
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            error_propagate(errp, local_err);
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            goto msi_error;
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        }
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        assert(!local_err || bridge_dev->msi == ON_OFF_AUTO_AUTO);
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        /* With msi=auto, we fall back to MSI off silently */
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        error_free(local_err);
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    }
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    err = pci_bridge_qemu_reserve_cap_init(dev, 0,
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                                         bridge_dev->res_reserve, errp);
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    if (err) {
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        goto cap_error;
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    }
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    if (shpc_present(dev)) {
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        /* TODO: spec recommends using 64 bit prefetcheable BAR.
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         * Check whether that works well. */
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        pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_MEMORY |
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                         PCI_BASE_ADDRESS_MEM_TYPE_64, &bridge_dev->bar);
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    }
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    return;
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cap_error:
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    msi_uninit(dev);
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msi_error:
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    slotid_cap_cleanup(dev);
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slotid_error:
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    if (shpc_present(dev)) {
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        shpc_cleanup(dev, &bridge_dev->bar);
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    }
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shpc_error:
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    pci_bridge_exitfn(dev);
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}
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static void pci_bridge_dev_exitfn(PCIDevice *dev)
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{
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    PCIBridgeDev *bridge_dev = PCI_BRIDGE_DEV(dev);
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    pci_del_capability(dev, PCI_CAP_ID_VNDR, sizeof(PCIBridgeQemuCap));
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    if (msi_present(dev)) {
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        msi_uninit(dev);
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    }
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    slotid_cap_cleanup(dev);
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    if (shpc_present(dev)) {
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        shpc_cleanup(dev, &bridge_dev->bar);
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    }
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    pci_bridge_exitfn(dev);
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}
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static void pci_bridge_dev_instance_finalize(Object *obj)
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{
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    /* this function is idempotent and handles (PCIDevice.shpc == NULL) */
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    shpc_free(PCI_DEVICE(obj));
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}
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static void pci_bridge_dev_write_config(PCIDevice *d,
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                                        uint32_t address, uint32_t val, int len)
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{
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    pci_bridge_write_config(d, address, val, len);
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    if (msi_present(d)) {
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        msi_write_config(d, address, val, len);
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    }
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    if (shpc_present(d)) {
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        shpc_cap_write_config(d, address, val, len);
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    }
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}
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static void qdev_pci_bridge_dev_reset(DeviceState *qdev)
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{
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    PCIDevice *dev = PCI_DEVICE(qdev);
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    pci_bridge_reset(qdev);
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    if (shpc_present(dev)) {
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        shpc_reset(dev);
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    }
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}
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static Property pci_bridge_dev_properties[] = {
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                    /* Note: 0 is not a legal chassis number. */
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    DEFINE_PROP_UINT8(PCI_BRIDGE_DEV_PROP_CHASSIS_NR, PCIBridgeDev, chassis_nr,
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                      0),
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    DEFINE_PROP_ON_OFF_AUTO(PCI_BRIDGE_DEV_PROP_MSI, PCIBridgeDev, msi,
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                            ON_OFF_AUTO_AUTO),
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    DEFINE_PROP_BIT(PCI_BRIDGE_DEV_PROP_SHPC, PCIBridgeDev, flags,
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                    PCI_BRIDGE_DEV_F_SHPC_REQ, true),
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    DEFINE_PROP_UINT32("bus-reserve", PCIBridgeDev,
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                       res_reserve.bus, -1),
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    DEFINE_PROP_SIZE("io-reserve", PCIBridgeDev,
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                     res_reserve.io, -1),
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    DEFINE_PROP_SIZE("mem-reserve", PCIBridgeDev,
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                     res_reserve.mem_non_pref, -1),
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    DEFINE_PROP_SIZE("pref32-reserve", PCIBridgeDev,
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                     res_reserve.mem_pref_32, -1),
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    DEFINE_PROP_SIZE("pref64-reserve", PCIBridgeDev,
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                     res_reserve.mem_pref_64, -1),
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    DEFINE_PROP_END_OF_LIST(),
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};
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static bool pci_device_shpc_present(void *opaque, int version_id)
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{
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    PCIDevice *dev = opaque;
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    return shpc_present(dev);
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}
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static const VMStateDescription pci_bridge_dev_vmstate = {
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    .name = "pci_bridge",
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    .priority = MIG_PRI_PCI_BUS,
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    .fields = (const VMStateField[]) {
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        VMSTATE_PCI_DEVICE(parent_obj, PCIBridge),
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        SHPC_VMSTATE(shpc, PCIDevice, pci_device_shpc_present),
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        VMSTATE_END_OF_LIST()
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    }
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};
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void pci_bridge_dev_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
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                            Error **errp)
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{
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    PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
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    if (!shpc_present(pci_hotplug_dev)) {
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        error_setg(errp, "standard hotplug controller has been disabled for "
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                   "this %s", object_get_typename(OBJECT(hotplug_dev)));
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        return;
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    }
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    shpc_device_plug_cb(hotplug_dev, dev, errp);
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}
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void pci_bridge_dev_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
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                              Error **errp)
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{
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    PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
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    g_assert(shpc_present(pci_hotplug_dev));
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    shpc_device_unplug_cb(hotplug_dev, dev, errp);
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}
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void pci_bridge_dev_unplug_request_cb(HotplugHandler *hotplug_dev,
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                                      DeviceState *dev, Error **errp)
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{
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    PCIDevice *pci_hotplug_dev = PCI_DEVICE(hotplug_dev);
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    if (!shpc_present(pci_hotplug_dev)) {
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        error_setg(errp, "standard hotplug controller has been disabled for "
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                   "this %s", object_get_typename(OBJECT(hotplug_dev)));
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        return;
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    }
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    shpc_device_unplug_request_cb(hotplug_dev, dev, errp);
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}
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static void pci_bridge_dev_class_init(ObjectClass *klass, void *data)
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{
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    DeviceClass *dc = DEVICE_CLASS(klass);
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    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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    HotplugHandlerClass *hc = HOTPLUG_HANDLER_CLASS(klass);
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    k->realize = pci_bridge_dev_realize;
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    k->exit = pci_bridge_dev_exitfn;
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    k->config_write = pci_bridge_dev_write_config;
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    k->vendor_id = PCI_VENDOR_ID_REDHAT;
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    k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE;
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    k->class_id = PCI_CLASS_BRIDGE_PCI;
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    dc->desc = "Standard PCI Bridge";
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    dc->reset = qdev_pci_bridge_dev_reset;
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    device_class_set_props(dc, pci_bridge_dev_properties);
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    dc->vmsd = &pci_bridge_dev_vmstate;
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    set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
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    hc->plug = pci_bridge_dev_plug_cb;
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    hc->unplug = pci_bridge_dev_unplug_cb;
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    hc->unplug_request = pci_bridge_dev_unplug_request_cb;
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}
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static const TypeInfo pci_bridge_dev_info = {
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    .name              = TYPE_PCI_BRIDGE_DEV,
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    .parent            = TYPE_PCI_BRIDGE,
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    .instance_size     = sizeof(PCIBridgeDev),
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    .class_init        = pci_bridge_dev_class_init,
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    .instance_finalize = pci_bridge_dev_instance_finalize,
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    .interfaces = (InterfaceInfo[]) {
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        { TYPE_HOTPLUG_HANDLER },
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        { INTERFACE_CONVENTIONAL_PCI_DEVICE },
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        { }
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    }
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};
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/*
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 * Multiseat bridge.  Same as the standard pci bridge, only with a
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 * different pci id, so we can match it easily in the guest for
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 * automagic multiseat configuration.  See docs/multiseat.txt for more.
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 */
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static void pci_bridge_dev_seat_class_init(ObjectClass *klass, void *data)
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{
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    DeviceClass *dc = DEVICE_CLASS(klass);
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    PCIDeviceClass *k = PCI_DEVICE_CLASS(klass);
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    k->device_id = PCI_DEVICE_ID_REDHAT_BRIDGE_SEAT;
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    dc->desc = "Standard PCI Bridge (multiseat)";
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}
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static const TypeInfo pci_bridge_dev_seat_info = {
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    .name              = TYPE_PCI_BRIDGE_SEAT_DEV,
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    .parent            = TYPE_PCI_BRIDGE_DEV,
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    .instance_size     = sizeof(PCIBridgeDev),
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    .class_init        = pci_bridge_dev_seat_class_init,
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};
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static void pci_bridge_dev_register(void)
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{
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    type_register_static(&pci_bridge_dev_info);
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    type_register_static(&pci_bridge_dev_seat_info);
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}
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type_init(pci_bridge_dev_register);
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