qemu

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/*
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 * QEMU sPAPR NVRAM emulation
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 *
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 * Copyright (C) 2012 David Gibson, IBM Corporation.
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a copy
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 * of this software and associated documentation files (the "Software"), to deal
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 * in the Software without restriction, including without limitation the rights
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 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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 * copies of the Software, and to permit persons to whom the Software is
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 * furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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 * THE SOFTWARE.
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 */
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#include "qemu/osdep.h"
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#include "qemu/module.h"
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#include "qemu/units.h"
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#include "qapi/error.h"
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#include <libfdt.h>
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#include "sysemu/block-backend.h"
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#include "sysemu/device_tree.h"
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#include "sysemu/sysemu.h"
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#include "sysemu/runstate.h"
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#include "migration/vmstate.h"
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#include "hw/nvram/chrp_nvram.h"
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr_vio.h"
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#include "hw/qdev-properties.h"
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#include "hw/qdev-properties-system.h"
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#include "qom/object.h"
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struct SpaprNvram {
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    SpaprVioDevice sdev;
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    uint32_t size;
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    uint8_t *buf;
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    BlockBackend *blk;
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    VMChangeStateEntry *vmstate;
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};
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#define TYPE_VIO_SPAPR_NVRAM "spapr-nvram"
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OBJECT_DECLARE_SIMPLE_TYPE(SpaprNvram, VIO_SPAPR_NVRAM)
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#define MIN_NVRAM_SIZE      (8 * KiB)
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#define DEFAULT_NVRAM_SIZE  (64 * KiB)
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#define MAX_NVRAM_SIZE      (1 * MiB)
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static void rtas_nvram_fetch(PowerPCCPU *cpu, SpaprMachineState *spapr,
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                             uint32_t token, uint32_t nargs,
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                             target_ulong args,
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                             uint32_t nret, target_ulong rets)
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{
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    SpaprNvram *nvram = spapr->nvram;
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    hwaddr offset, buffer, len;
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    void *membuf;
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    if ((nargs != 3) || (nret != 2)) {
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        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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        return;
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    }
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    if (!nvram) {
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        rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
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        rtas_st(rets, 1, 0);
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        return;
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    }
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    offset = rtas_ld(args, 0);
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    buffer = rtas_ld(args, 1);
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    len = rtas_ld(args, 2);
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    if (((offset + len) < offset)
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        || ((offset + len) > nvram->size)) {
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        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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        rtas_st(rets, 1, 0);
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        return;
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    }
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    assert(nvram->buf);
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    membuf = cpu_physical_memory_map(buffer, &len, true);
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    memcpy(membuf, nvram->buf + offset, len);
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    cpu_physical_memory_unmap(membuf, len, 1, len);
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    rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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    rtas_st(rets, 1, len);
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}
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static void rtas_nvram_store(PowerPCCPU *cpu, SpaprMachineState *spapr,
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                             uint32_t token, uint32_t nargs,
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                             target_ulong args,
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                             uint32_t nret, target_ulong rets)
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{
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    SpaprNvram *nvram = spapr->nvram;
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    hwaddr offset, buffer, len;
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    int ret;
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    void *membuf;
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    if ((nargs != 3) || (nret != 2)) {
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        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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        return;
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    }
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    if (!nvram) {
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        rtas_st(rets, 0, RTAS_OUT_HW_ERROR);
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        return;
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    }
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    offset = rtas_ld(args, 0);
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    buffer = rtas_ld(args, 1);
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    len = rtas_ld(args, 2);
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    if (((offset + len) < offset)
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        || ((offset + len) > nvram->size)) {
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        rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR);
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        return;
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    }
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    membuf = cpu_physical_memory_map(buffer, &len, false);
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    ret = 0;
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    if (nvram->blk) {
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        ret = blk_pwrite(nvram->blk, offset, len, membuf, 0);
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    }
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    assert(nvram->buf);
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    memcpy(nvram->buf + offset, membuf, len);
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    cpu_physical_memory_unmap(membuf, len, 0, len);
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    rtas_st(rets, 0, (ret < 0) ? RTAS_OUT_HW_ERROR : RTAS_OUT_SUCCESS);
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    rtas_st(rets, 1, (ret < 0) ? 0 : len);
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}
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static void spapr_nvram_realize(SpaprVioDevice *dev, Error **errp)
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{
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    SpaprNvram *nvram = VIO_SPAPR_NVRAM(dev);
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    int ret;
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    if (nvram->blk) {
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        int64_t len = blk_getlength(nvram->blk);
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        if (len < 0) {
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            error_setg_errno(errp, -len,
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                             "could not get length of backing image");
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            return;
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        }
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        nvram->size = len;
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        ret = blk_set_perm(nvram->blk,
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                           BLK_PERM_CONSISTENT_READ | BLK_PERM_WRITE,
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                           BLK_PERM_ALL, errp);
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        if (ret < 0) {
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            return;
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        }
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    } else {
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        nvram->size = DEFAULT_NVRAM_SIZE;
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    }
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    nvram->buf = g_malloc0(nvram->size);
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    if ((nvram->size < MIN_NVRAM_SIZE) || (nvram->size > MAX_NVRAM_SIZE)) {
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        error_setg(errp,
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                   "spapr-nvram must be between %" PRId64
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                   " and %" PRId64 " bytes in size",
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                   MIN_NVRAM_SIZE, MAX_NVRAM_SIZE);
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        return;
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    }
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    if (nvram->blk) {
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        ret = blk_pread(nvram->blk, 0, nvram->size, nvram->buf, 0);
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        if (ret < 0) {
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            error_setg(errp, "can't read spapr-nvram contents");
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            return;
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        }
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    } else if (nb_prom_envs > 0) {
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        /* Create a system partition to pass the -prom-env variables */
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        chrp_nvram_create_system_partition(nvram->buf, MIN_NVRAM_SIZE / 4,
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                                           nvram->size);
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        chrp_nvram_create_free_partition(&nvram->buf[MIN_NVRAM_SIZE / 4],
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                                         nvram->size - MIN_NVRAM_SIZE / 4);
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    }
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    spapr_rtas_register(RTAS_NVRAM_FETCH, "nvram-fetch", rtas_nvram_fetch);
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    spapr_rtas_register(RTAS_NVRAM_STORE, "nvram-store", rtas_nvram_store);
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}
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static int spapr_nvram_devnode(SpaprVioDevice *dev, void *fdt, int node_off)
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{
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    SpaprNvram *nvram = VIO_SPAPR_NVRAM(dev);
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    return fdt_setprop_cell(fdt, node_off, "#bytes", nvram->size);
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}
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static int spapr_nvram_pre_load(void *opaque)
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{
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    SpaprNvram *nvram = VIO_SPAPR_NVRAM(opaque);
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    g_free(nvram->buf);
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    nvram->buf = NULL;
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    nvram->size = 0;
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    return 0;
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}
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static void postload_update_cb(void *opaque, bool running, RunState state)
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{
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    SpaprNvram *nvram = opaque;
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    /* This is called after bdrv_activate_all.  */
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    qemu_del_vm_change_state_handler(nvram->vmstate);
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    nvram->vmstate = NULL;
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    blk_pwrite(nvram->blk, 0, nvram->size, nvram->buf, 0);
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}
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static int spapr_nvram_post_load(void *opaque, int version_id)
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{
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    SpaprNvram *nvram = VIO_SPAPR_NVRAM(opaque);
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    if (nvram->blk) {
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        nvram->vmstate = qemu_add_vm_change_state_handler(postload_update_cb,
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                                                          nvram);
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    }
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    return 0;
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}
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static const VMStateDescription vmstate_spapr_nvram = {
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    .name = "spapr_nvram",
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    .version_id = 1,
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    .minimum_version_id = 1,
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    .pre_load = spapr_nvram_pre_load,
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    .post_load = spapr_nvram_post_load,
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    .fields = (const VMStateField[]) {
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        VMSTATE_UINT32(size, SpaprNvram),
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        VMSTATE_VBUFFER_ALLOC_UINT32(buf, SpaprNvram, 1, NULL, size),
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        VMSTATE_END_OF_LIST()
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    },
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};
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static Property spapr_nvram_properties[] = {
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    DEFINE_SPAPR_PROPERTIES(SpaprNvram, sdev),
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    DEFINE_PROP_DRIVE("drive", SpaprNvram, blk),
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    DEFINE_PROP_END_OF_LIST(),
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};
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static void spapr_nvram_class_init(ObjectClass *klass, void *data)
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{
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    DeviceClass *dc = DEVICE_CLASS(klass);
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    SpaprVioDeviceClass *k = VIO_SPAPR_DEVICE_CLASS(klass);
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    k->realize = spapr_nvram_realize;
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    k->devnode = spapr_nvram_devnode;
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    k->dt_name = "nvram";
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    k->dt_type = "nvram";
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    k->dt_compatible = "qemu,spapr-nvram";
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    set_bit(DEVICE_CATEGORY_MISC, dc->categories);
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    device_class_set_props(dc, spapr_nvram_properties);
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    dc->vmsd = &vmstate_spapr_nvram;
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    /* Reason: Internal device only, uses spapr_rtas_register() in realize() */
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    dc->user_creatable = false;
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}
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static const TypeInfo spapr_nvram_type_info = {
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    .name          = TYPE_VIO_SPAPR_NVRAM,
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    .parent        = TYPE_VIO_SPAPR_DEVICE,
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    .instance_size = sizeof(SpaprNvram),
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    .class_init    = spapr_nvram_class_init,
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};
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static void spapr_nvram_register_types(void)
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{
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    type_register_static(&spapr_nvram_type_info);
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}
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type_init(spapr_nvram_register_types)
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