qemu

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/*
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 * QEMU SiFive Test Finisher
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 *
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 * Copyright (c) 2018 SiFive, Inc.
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 *
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 * Test finisher memory mapped device used to exit simulation
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 *
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 * This program is free software; you can redistribute it and/or modify it
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 * under the terms and conditions of the GNU General Public License,
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 * version 2 or later, as published by the Free Software Foundation.
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 *
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 * This program is distributed in the hope it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
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 * more details.
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 *
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 * You should have received a copy of the GNU General Public License along with
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 * this program.  If not, see <http://www.gnu.org/licenses/>.
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 */
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#include "qemu/osdep.h"
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#include "hw/sysbus.h"
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#include "qapi/error.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#include "sysemu/runstate.h"
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#include "hw/misc/sifive_test.h"
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#include "sysemu/sysemu.h"
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static uint64_t sifive_test_read(void *opaque, hwaddr addr, unsigned int size)
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{
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    return 0;
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}
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static void sifive_test_write(void *opaque, hwaddr addr,
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           uint64_t val64, unsigned int size)
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{
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    if (addr == 0) {
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        int status = val64 & 0xffff;
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        int code = (val64 >> 16) & 0xffff;
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        switch (status) {
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        case FINISHER_FAIL:
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            qemu_system_shutdown_request_with_code(
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                SHUTDOWN_CAUSE_GUEST_PANIC, code);
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            return;
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        case FINISHER_PASS:
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            qemu_system_shutdown_request_with_code(
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                SHUTDOWN_CAUSE_GUEST_SHUTDOWN, code);
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            return;
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        case FINISHER_RESET:
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            qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
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            return;
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        default:
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            break;
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        }
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    }
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    qemu_log_mask(LOG_GUEST_ERROR, "%s: write: addr=0x%x val=0x%016" PRIx64 "\n",
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                  __func__, (int)addr, val64);
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}
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static const MemoryRegionOps sifive_test_ops = {
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    .read = sifive_test_read,
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    .write = sifive_test_write,
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    .endianness = DEVICE_NATIVE_ENDIAN,
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    .valid = {
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        .min_access_size = 2,
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        .max_access_size = 4
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    }
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};
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static void sifive_test_init(Object *obj)
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{
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    SiFiveTestState *s = SIFIVE_TEST(obj);
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    memory_region_init_io(&s->mmio, obj, &sifive_test_ops, s,
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                          TYPE_SIFIVE_TEST, 0x1000);
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    sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio);
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}
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static const TypeInfo sifive_test_info = {
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    .name          = TYPE_SIFIVE_TEST,
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    .parent        = TYPE_SYS_BUS_DEVICE,
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    .instance_size = sizeof(SiFiveTestState),
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    .instance_init = sifive_test_init,
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};
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static void sifive_test_register_types(void)
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{
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    type_register_static(&sifive_test_info);
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}
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type_init(sifive_test_register_types)
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/*
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 * Create Test device.
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 */
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DeviceState *sifive_test_create(hwaddr addr)
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{
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    DeviceState *dev = qdev_new(TYPE_SIFIVE_TEST);
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    sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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    sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr);
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    return dev;
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}
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