qemu

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/*
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 * AXP-2XX PMU Emulation, supported lists:
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 *   AXP209
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 *   AXP221
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 *
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 * Copyright (C) 2022 Strahinja Jankovic <strahinja.p.jankovic@gmail.com>
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 * Copyright (C) 2023 qianfan Zhao <qianfanguijin@163.com>
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice shall be included in
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 * all copies or substantial portions of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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 * DEALINGS IN THE SOFTWARE.
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 *
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 * SPDX-License-Identifier: MIT
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 */
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qom/object.h"
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#include "trace.h"
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#include "hw/i2c/i2c.h"
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#include "migration/vmstate.h"
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#define TYPE_AXP2XX     "axp2xx_pmu"
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#define TYPE_AXP209_PMU "axp209_pmu"
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#define TYPE_AXP221_PMU "axp221_pmu"
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OBJECT_DECLARE_TYPE(AXP2xxI2CState, AXP2xxClass, AXP2XX)
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#define NR_REGS                            (0xff)
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/* A simple I2C slave which returns values of ID or CNT register. */
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typedef struct AXP2xxI2CState {
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    /*< private >*/
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    I2CSlave i2c;
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    /*< public >*/
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    uint8_t regs[NR_REGS];  /* peripheral registers */
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    uint8_t ptr;            /* current register index */
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    uint8_t count;          /* counter used for tx/rx */
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} AXP2xxI2CState;
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typedef struct AXP2xxClass {
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    /*< private >*/
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    I2CSlaveClass parent_class;
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    /*< public >*/
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    void (*reset_enter)(AXP2xxI2CState *s, ResetType type);
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} AXP2xxClass;
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#define AXP209_CHIP_VERSION_ID             (0x01)
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#define AXP209_DC_DC2_OUT_V_CTRL_RESET     (0x16)
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/* Reset all counters and load ID register */
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static void axp209_reset_enter(AXP2xxI2CState *s, ResetType type)
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{
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    memset(s->regs, 0, NR_REGS);
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    s->ptr = 0;
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    s->count = 0;
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    s->regs[0x03] = AXP209_CHIP_VERSION_ID;
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    s->regs[0x23] = AXP209_DC_DC2_OUT_V_CTRL_RESET;
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    s->regs[0x30] = 0x60;
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    s->regs[0x32] = 0x46;
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    s->regs[0x34] = 0x41;
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    s->regs[0x35] = 0x22;
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    s->regs[0x36] = 0x5d;
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    s->regs[0x37] = 0x08;
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    s->regs[0x38] = 0xa5;
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    s->regs[0x39] = 0x1f;
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    s->regs[0x3a] = 0x68;
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    s->regs[0x3b] = 0x5f;
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    s->regs[0x3c] = 0xfc;
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    s->regs[0x3d] = 0x16;
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    s->regs[0x40] = 0xd8;
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    s->regs[0x42] = 0xff;
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    s->regs[0x43] = 0x3b;
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    s->regs[0x80] = 0xe0;
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    s->regs[0x82] = 0x83;
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    s->regs[0x83] = 0x80;
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    s->regs[0x84] = 0x32;
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    s->regs[0x86] = 0xff;
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    s->regs[0x90] = 0x07;
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    s->regs[0x91] = 0xa0;
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    s->regs[0x92] = 0x07;
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    s->regs[0x93] = 0x07;
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}
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#define AXP221_PWR_STATUS_ACIN_PRESENT          BIT(7)
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#define AXP221_PWR_STATUS_ACIN_AVAIL            BIT(6)
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#define AXP221_PWR_STATUS_VBUS_PRESENT          BIT(5)
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#define AXP221_PWR_STATUS_VBUS_USED             BIT(4)
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#define AXP221_PWR_STATUS_BAT_CHARGING          BIT(2)
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#define AXP221_PWR_STATUS_ACIN_VBUS_POWERED     BIT(1)
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/* Reset all counters and load ID register */
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static void axp221_reset_enter(AXP2xxI2CState *s, ResetType type)
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{
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    memset(s->regs, 0, NR_REGS);
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    s->ptr = 0;
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    s->count = 0;
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    /* input power status register */
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    s->regs[0x00] = AXP221_PWR_STATUS_ACIN_PRESENT
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                    | AXP221_PWR_STATUS_ACIN_AVAIL
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                    | AXP221_PWR_STATUS_ACIN_VBUS_POWERED;
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    s->regs[0x01] = 0x00; /* no battery is connected */
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    /*
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     * CHIPID register, no documented on datasheet, but it is checked in
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     * u-boot spl. I had read it from AXP221s and got 0x06 value.
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     * So leave 06h here.
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     */
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    s->regs[0x03] = 0x06;
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    s->regs[0x10] = 0xbf;
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    s->regs[0x13] = 0x01;
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    s->regs[0x30] = 0x60;
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    s->regs[0x31] = 0x03;
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    s->regs[0x32] = 0x43;
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    s->regs[0x33] = 0xc6;
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    s->regs[0x34] = 0x45;
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    s->regs[0x35] = 0x0e;
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    s->regs[0x36] = 0x5d;
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    s->regs[0x37] = 0x08;
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    s->regs[0x38] = 0xa5;
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    s->regs[0x39] = 0x1f;
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    s->regs[0x3c] = 0xfc;
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    s->regs[0x3d] = 0x16;
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    s->regs[0x80] = 0x80;
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    s->regs[0x82] = 0xe0;
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    s->regs[0x84] = 0x32;
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    s->regs[0x8f] = 0x01;
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    s->regs[0x90] = 0x07;
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    s->regs[0x91] = 0x1f;
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    s->regs[0x92] = 0x07;
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    s->regs[0x93] = 0x1f;
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    s->regs[0x40] = 0xd8;
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    s->regs[0x41] = 0xff;
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    s->regs[0x42] = 0x03;
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    s->regs[0x43] = 0x03;
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    s->regs[0xb8] = 0xc0;
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    s->regs[0xb9] = 0x64;
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    s->regs[0xe6] = 0xa0;
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}
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static void axp2xx_reset_enter(Object *obj, ResetType type)
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{
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    AXP2xxI2CState *s = AXP2XX(obj);
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    AXP2xxClass *sc = AXP2XX_GET_CLASS(s);
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    sc->reset_enter(s, type);
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}
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/* Handle events from master. */
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static int axp2xx_event(I2CSlave *i2c, enum i2c_event event)
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{
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    AXP2xxI2CState *s = AXP2XX(i2c);
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    s->count = 0;
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    return 0;
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}
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/* Called when master requests read */
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static uint8_t axp2xx_rx(I2CSlave *i2c)
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{
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    AXP2xxI2CState *s = AXP2XX(i2c);
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    uint8_t ret = 0xff;
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    if (s->ptr < NR_REGS) {
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        ret = s->regs[s->ptr++];
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    }
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    trace_axp2xx_rx(s->ptr - 1, ret);
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    return ret;
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}
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/*
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 * Called when master sends write.
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 * Update ptr with byte 0, then perform write with second byte.
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 */
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static int axp2xx_tx(I2CSlave *i2c, uint8_t data)
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{
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    AXP2xxI2CState *s = AXP2XX(i2c);
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    if (s->count == 0) {
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        /* Store register address */
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        s->ptr = data;
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        s->count++;
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        trace_axp2xx_select(data);
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    } else {
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        trace_axp2xx_tx(s->ptr, data);
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        s->regs[s->ptr++] = data;
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    }
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    return 0;
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}
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static const VMStateDescription vmstate_axp2xx = {
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    .name = TYPE_AXP2XX,
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    .version_id = 1,
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    .fields = (const VMStateField[]) {
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        VMSTATE_UINT8_ARRAY(regs, AXP2xxI2CState, NR_REGS),
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        VMSTATE_UINT8(ptr, AXP2xxI2CState),
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        VMSTATE_UINT8(count, AXP2xxI2CState),
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        VMSTATE_END_OF_LIST()
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    }
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};
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static void axp2xx_class_init(ObjectClass *oc, void *data)
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{
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    DeviceClass *dc = DEVICE_CLASS(oc);
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    I2CSlaveClass *isc = I2C_SLAVE_CLASS(oc);
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    ResettableClass *rc = RESETTABLE_CLASS(oc);
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    rc->phases.enter = axp2xx_reset_enter;
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    dc->vmsd = &vmstate_axp2xx;
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    isc->event = axp2xx_event;
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    isc->recv = axp2xx_rx;
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    isc->send = axp2xx_tx;
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}
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static const TypeInfo axp2xx_info = {
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    .name = TYPE_AXP2XX,
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    .parent = TYPE_I2C_SLAVE,
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    .instance_size = sizeof(AXP2xxI2CState),
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    .class_size = sizeof(AXP2xxClass),
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    .class_init = axp2xx_class_init,
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    .abstract = true,
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};
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static void axp209_class_init(ObjectClass *oc, void *data)
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{
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    AXP2xxClass *sc = AXP2XX_CLASS(oc);
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    sc->reset_enter = axp209_reset_enter;
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}
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static const TypeInfo axp209_info = {
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    .name = TYPE_AXP209_PMU,
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    .parent = TYPE_AXP2XX,
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    .class_init = axp209_class_init
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};
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static void axp221_class_init(ObjectClass *oc, void *data)
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{
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    AXP2xxClass *sc = AXP2XX_CLASS(oc);
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    sc->reset_enter = axp221_reset_enter;
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}
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static const TypeInfo axp221_info = {
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    .name = TYPE_AXP221_PMU,
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    .parent = TYPE_AXP2XX,
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    .class_init = axp221_class_init,
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};
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static void axp2xx_register_devices(void)
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{
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    type_register_static(&axp2xx_info);
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    type_register_static(&axp209_info);
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    type_register_static(&axp221_info);
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}
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type_init(axp2xx_register_devices);
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