qemu

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/*
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 * Raspberry Pi (BCM2838) GPIO Controller
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 * This implementation is based on bcm2835_gpio (hw/gpio/bcm2835_gpio.c)
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 *
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 * Copyright (c) 2022 Auriga LLC
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 *
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 * Authors:
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 *  Lotosh, Aleksey <aleksey.lotosh@auriga.com>
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 *
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 * SPDX-License-Identifier: GPL-2.0-or-later
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 */
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#include "qemu/osdep.h"
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#include "qemu/log.h"
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#include "qemu/module.h"
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#include "qemu/timer.h"
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#include "qapi/error.h"
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#include "hw/sysbus.h"
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#include "migration/vmstate.h"
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#include "hw/sd/sd.h"
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#include "hw/gpio/bcm2838_gpio.h"
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#include "hw/irq.h"
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#define GPFSEL0   0x00
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#define GPFSEL1   0x04
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#define GPFSEL2   0x08
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#define GPFSEL3   0x0C
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#define GPFSEL4   0x10
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#define GPFSEL5   0x14
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#define GPSET0    0x1C
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#define GPSET1    0x20
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#define GPCLR0    0x28
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#define GPCLR1    0x2C
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#define GPLEV0    0x34
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#define GPLEV1    0x38
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#define GPEDS0    0x40
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#define GPEDS1    0x44
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#define GPREN0    0x4C
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#define GPREN1    0x50
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#define GPFEN0    0x58
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#define GPFEN1    0x5C
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#define GPHEN0    0x64
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#define GPHEN1    0x68
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#define GPLEN0    0x70
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#define GPLEN1    0x74
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#define GPAREN0   0x7C
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#define GPAREN1   0x80
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#define GPAFEN0   0x88
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#define GPAFEN1   0x8C
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#define GPIO_PUP_PDN_CNTRL_REG0 0xE4
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#define GPIO_PUP_PDN_CNTRL_REG1 0xE8
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#define GPIO_PUP_PDN_CNTRL_REG2 0xEC
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#define GPIO_PUP_PDN_CNTRL_REG3 0xF0
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#define RESET_VAL_CNTRL_REG0 0xAAA95555
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#define RESET_VAL_CNTRL_REG1 0xA0AAAAAA
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#define RESET_VAL_CNTRL_REG2 0x50AAA95A
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#define RESET_VAL_CNTRL_REG3 0x00055555
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#define NUM_FSELN_IN_GPFSELN 10
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#define NUM_BITS_FSELN       3
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#define MASK_FSELN           0x7
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#define BYTES_IN_WORD        4
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/* bcm,function property */
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#define BCM2838_FSEL_GPIO_IN    0
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#define BCM2838_FSEL_GPIO_OUT   1
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#define BCM2838_FSEL_ALT5       2
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#define BCM2838_FSEL_ALT4       3
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#define BCM2838_FSEL_ALT0       4
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#define BCM2838_FSEL_ALT1       5
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#define BCM2838_FSEL_ALT2       6
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#define BCM2838_FSEL_ALT3       7
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static uint32_t gpfsel_get(BCM2838GpioState *s, uint8_t reg)
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{
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    int i;
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    uint32_t value = 0;
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    for (i = 0; i < NUM_FSELN_IN_GPFSELN; i++) {
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        uint32_t index = NUM_FSELN_IN_GPFSELN * reg + i;
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        if (index < sizeof(s->fsel)) {
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            value |= (s->fsel[index] & MASK_FSELN) << (NUM_BITS_FSELN * i);
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        }
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    }
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    return value;
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}
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static void gpfsel_set(BCM2838GpioState *s, uint8_t reg, uint32_t value)
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{
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    int i;
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    for (i = 0; i < NUM_FSELN_IN_GPFSELN; i++) {
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        uint32_t index = NUM_FSELN_IN_GPFSELN * reg + i;
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        if (index < sizeof(s->fsel)) {
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            int fsel = (value >> (NUM_BITS_FSELN * i)) & MASK_FSELN;
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            s->fsel[index] = fsel;
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        }
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    }
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    /* SD controller selection (48-53) */
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    if (s->sd_fsel != BCM2838_FSEL_GPIO_IN
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        && (s->fsel[48] == BCM2838_FSEL_GPIO_IN)
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        && (s->fsel[49] == BCM2838_FSEL_GPIO_IN)
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        && (s->fsel[50] == BCM2838_FSEL_GPIO_IN)
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        && (s->fsel[51] == BCM2838_FSEL_GPIO_IN)
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        && (s->fsel[52] == BCM2838_FSEL_GPIO_IN)
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        && (s->fsel[53] == BCM2838_FSEL_GPIO_IN)
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       ) {
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        /* SDHCI controller selected */
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        sdbus_reparent_card(s->sdbus_sdhost, s->sdbus_sdhci);
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        s->sd_fsel = BCM2838_FSEL_GPIO_IN;
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    } else if (s->sd_fsel != BCM2838_FSEL_ALT0
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               && (s->fsel[48] == BCM2838_FSEL_ALT0) /* SD_CLK_R */
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               && (s->fsel[49] == BCM2838_FSEL_ALT0) /* SD_CMD_R */
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               && (s->fsel[50] == BCM2838_FSEL_ALT0) /* SD_DATA0_R */
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               && (s->fsel[51] == BCM2838_FSEL_ALT0) /* SD_DATA1_R */
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               && (s->fsel[52] == BCM2838_FSEL_ALT0) /* SD_DATA2_R */
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               && (s->fsel[53] == BCM2838_FSEL_ALT0) /* SD_DATA3_R */
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              ) {
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        /* SDHost controller selected */
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        sdbus_reparent_card(s->sdbus_sdhci, s->sdbus_sdhost);
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        s->sd_fsel = BCM2838_FSEL_ALT0;
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    }
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}
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static int gpfsel_is_out(BCM2838GpioState *s, int index)
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{
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    if (index >= 0 && index < BCM2838_GPIO_NUM) {
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        return s->fsel[index] == 1;
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    }
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    return 0;
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}
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static void gpset(BCM2838GpioState *s, uint32_t val, uint8_t start,
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                  uint8_t count, uint32_t *lev)
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{
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    uint32_t changes = val & ~*lev;
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    uint32_t cur = 1;
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    int i;
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    for (i = 0; i < count; i++) {
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        if ((changes & cur) && (gpfsel_is_out(s, start + i))) {
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            qemu_set_irq(s->out[start + i], 1);
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        }
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        cur <<= 1;
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    }
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    *lev |= val;
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}
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static void gpclr(BCM2838GpioState *s, uint32_t val, uint8_t start,
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                  uint8_t count, uint32_t *lev)
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{
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    uint32_t changes = val & *lev;
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    uint32_t cur = 1;
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    int i;
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    for (i = 0; i < count; i++) {
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        if ((changes & cur) && (gpfsel_is_out(s, start + i))) {
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            qemu_set_irq(s->out[start + i], 0);
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        }
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        cur <<= 1;
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    }
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    *lev &= ~val;
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}
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static uint64_t bcm2838_gpio_read(void *opaque, hwaddr offset, unsigned size)
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{
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    BCM2838GpioState *s = (BCM2838GpioState *)opaque;
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    uint64_t value = 0;
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    switch (offset) {
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    case GPFSEL0:
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    case GPFSEL1:
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    case GPFSEL2:
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    case GPFSEL3:
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    case GPFSEL4:
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    case GPFSEL5:
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        value = gpfsel_get(s, offset / BYTES_IN_WORD);
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        break;
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    case GPSET0:
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    case GPSET1:
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    case GPCLR0:
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    case GPCLR1:
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        /* Write Only */
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        qemu_log_mask(LOG_GUEST_ERROR, "%s: %s: Attempt reading from write only"
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                      " register. 0x%"PRIx64" will be returned."
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                      " Address 0x%"HWADDR_PRIx", size %u\n",
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                      TYPE_BCM2838_GPIO, __func__, value, offset, size);
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        break;
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    case GPLEV0:
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        value = s->lev0;
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        break;
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    case GPLEV1:
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        value = s->lev1;
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        break;
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    case GPEDS0:
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    case GPEDS1:
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    case GPREN0:
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    case GPREN1:
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    case GPFEN0:
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    case GPFEN1:
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    case GPHEN0:
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    case GPHEN1:
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    case GPLEN0:
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    case GPLEN1:
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    case GPAREN0:
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    case GPAREN1:
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    case GPAFEN0:
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    case GPAFEN1:
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        /* Not implemented */
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        qemu_log_mask(LOG_UNIMP, "%s: %s: not implemented for %"HWADDR_PRIx"\n",
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                      TYPE_BCM2838_GPIO, __func__, offset);
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        break;
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    case GPIO_PUP_PDN_CNTRL_REG0:
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    case GPIO_PUP_PDN_CNTRL_REG1:
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    case GPIO_PUP_PDN_CNTRL_REG2:
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    case GPIO_PUP_PDN_CNTRL_REG3:
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        value = s->pup_cntrl_reg[(offset - GPIO_PUP_PDN_CNTRL_REG0)
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                                 / sizeof(s->pup_cntrl_reg[0])];
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        break;
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    default:
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        qemu_log_mask(LOG_GUEST_ERROR, "%s: %s: bad offset %"HWADDR_PRIx"\n",
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                      TYPE_BCM2838_GPIO, __func__, offset);
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        break;
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    }
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    return value;
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}
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static void bcm2838_gpio_write(void *opaque, hwaddr offset, uint64_t value,
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                               unsigned size)
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{
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    BCM2838GpioState *s = (BCM2838GpioState *)opaque;
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    switch (offset) {
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    case GPFSEL0:
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    case GPFSEL1:
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    case GPFSEL2:
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    case GPFSEL3:
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    case GPFSEL4:
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    case GPFSEL5:
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        gpfsel_set(s, offset / BYTES_IN_WORD, value);
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        break;
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    case GPSET0:
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        gpset(s, value, 0, 32, &s->lev0);
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        break;
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    case GPSET1:
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        gpset(s, value, 32, 22, &s->lev1);
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        break;
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    case GPCLR0:
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        gpclr(s, value, 0, 32, &s->lev0);
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        break;
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    case GPCLR1:
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        gpclr(s, value, 32, 22, &s->lev1);
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        break;
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    case GPLEV0:
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    case GPLEV1:
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        /* Read Only */
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        qemu_log_mask(LOG_GUEST_ERROR, "%s: %s: Attempt writing 0x%"PRIx64""
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                      " to read only register. Ignored."
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                      " Address 0x%"HWADDR_PRIx", size %u\n",
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                      TYPE_BCM2838_GPIO, __func__, value, offset, size);
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        break;
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    case GPEDS0:
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    case GPEDS1:
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    case GPREN0:
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    case GPREN1:
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    case GPFEN0:
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    case GPFEN1:
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    case GPHEN0:
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    case GPHEN1:
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    case GPLEN0:
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    case GPLEN1:
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    case GPAREN0:
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    case GPAREN1:
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    case GPAFEN0:
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    case GPAFEN1:
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        /* Not implemented */
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        qemu_log_mask(LOG_UNIMP, "%s: %s: not implemented for %"HWADDR_PRIx"\n",
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                      TYPE_BCM2838_GPIO, __func__, offset);
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        break;
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    case GPIO_PUP_PDN_CNTRL_REG0:
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    case GPIO_PUP_PDN_CNTRL_REG1:
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    case GPIO_PUP_PDN_CNTRL_REG2:
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    case GPIO_PUP_PDN_CNTRL_REG3:
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        s->pup_cntrl_reg[(offset - GPIO_PUP_PDN_CNTRL_REG0)
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                         / sizeof(s->pup_cntrl_reg[0])] = value;
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        break;
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    default:
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        qemu_log_mask(LOG_GUEST_ERROR, "%s: %s: bad offset %"HWADDR_PRIx"\n",
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                  TYPE_BCM2838_GPIO, __func__, offset);
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    }
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    return;
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}
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static void bcm2838_gpio_reset(DeviceState *dev)
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{
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    BCM2838GpioState *s = BCM2838_GPIO(dev);
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    memset(s->fsel, 0, sizeof(s->fsel));
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    s->sd_fsel = 0;
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    /* SDHCI is selected by default */
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    sdbus_reparent_card(&s->sdbus, s->sdbus_sdhci);
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    s->lev0 = 0;
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    s->lev1 = 0;
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    memset(s->fsel, 0, sizeof(s->fsel));
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    s->pup_cntrl_reg[0] = RESET_VAL_CNTRL_REG0;
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    s->pup_cntrl_reg[1] = RESET_VAL_CNTRL_REG1;
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    s->pup_cntrl_reg[2] = RESET_VAL_CNTRL_REG2;
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    s->pup_cntrl_reg[3] = RESET_VAL_CNTRL_REG3;
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}
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static const MemoryRegionOps bcm2838_gpio_ops = {
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    .read = bcm2838_gpio_read,
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    .write = bcm2838_gpio_write,
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    .endianness = DEVICE_NATIVE_ENDIAN,
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};
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static const VMStateDescription vmstate_bcm2838_gpio = {
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    .name = "bcm2838_gpio",
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    .version_id = 1,
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    .minimum_version_id = 1,
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    .fields = (VMStateField[]) {
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        VMSTATE_UINT8_ARRAY(fsel, BCM2838GpioState, BCM2838_GPIO_NUM),
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        VMSTATE_UINT32(lev0, BCM2838GpioState),
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        VMSTATE_UINT32(lev1, BCM2838GpioState),
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        VMSTATE_UINT8(sd_fsel, BCM2838GpioState),
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        VMSTATE_UINT32_ARRAY(pup_cntrl_reg, BCM2838GpioState,
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                             GPIO_PUP_PDN_CNTRL_NUM),
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        VMSTATE_END_OF_LIST()
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    }
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};
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static void bcm2838_gpio_init(Object *obj)
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{
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    BCM2838GpioState *s = BCM2838_GPIO(obj);
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    DeviceState *dev = DEVICE(obj);
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    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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    qbus_init(&s->sdbus, sizeof(s->sdbus), TYPE_SD_BUS, DEVICE(s), "sd-bus");
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    memory_region_init_io(&s->iomem, obj, &bcm2838_gpio_ops, s,
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                          "bcm2838_gpio", BCM2838_GPIO_REGS_SIZE);
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    sysbus_init_mmio(sbd, &s->iomem);
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    qdev_init_gpio_out(dev, s->out, BCM2838_GPIO_NUM);
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}
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static void bcm2838_gpio_realize(DeviceState *dev, Error **errp)
357
{
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    BCM2838GpioState *s = BCM2838_GPIO(dev);
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    Object *obj;
360

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    obj = object_property_get_link(OBJECT(dev), "sdbus-sdhci", &error_abort);
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    s->sdbus_sdhci = SD_BUS(obj);
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    obj = object_property_get_link(OBJECT(dev), "sdbus-sdhost", &error_abort);
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    s->sdbus_sdhost = SD_BUS(obj);
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}
367

368
static void bcm2838_gpio_class_init(ObjectClass *klass, void *data)
369
{
370
    DeviceClass *dc = DEVICE_CLASS(klass);
371

372
    dc->vmsd = &vmstate_bcm2838_gpio;
373
    dc->realize = &bcm2838_gpio_realize;
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    dc->reset = &bcm2838_gpio_reset;
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}
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static const TypeInfo bcm2838_gpio_info = {
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    .name          = TYPE_BCM2838_GPIO,
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    .parent        = TYPE_SYS_BUS_DEVICE,
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    .instance_size = sizeof(BCM2838GpioState),
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    .instance_init = bcm2838_gpio_init,
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    .class_init    = bcm2838_gpio_class_init,
383
};
384

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static void bcm2838_gpio_register_types(void)
386
{
387
    type_register_static(&bcm2838_gpio_info);
388
}
389

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type_init(bcm2838_gpio_register_types)
391