qemu

1
/*
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 * NVDIMM ACPI Implementation
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 *
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 * Copyright(C) 2015 Intel Corporation.
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 *
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 * Author:
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 *  Xiao Guangrong <guangrong.xiao@linux.intel.com>
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 *
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 * NFIT is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT)
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 * and the DSM specification can be found at:
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 *       http://pmem.io/documents/NVDIMM_DSM_Interface_Example.pdf
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 *
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 * Currently, it only supports PMEM Virtualization.
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 *
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 * This library is free software; you can redistribute it and/or
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 * modify it under the terms of the GNU Lesser General Public
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 * License as published by the Free Software Foundation; either
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 * version 2.1 of the License, or (at your option) any later version.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see <http://www.gnu.org/licenses/>
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 */
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#include "qemu/osdep.h"
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#include "qemu/uuid.h"
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#include "qapi/error.h"
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#include "hw/acpi/acpi.h"
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#include "hw/acpi/aml-build.h"
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#include "hw/acpi/bios-linker-loader.h"
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#include "hw/nvram/fw_cfg.h"
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#include "hw/mem/nvdimm.h"
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#include "qemu/nvdimm-utils.h"
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#include "trace.h"
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/*
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 * define Byte Addressable Persistent Memory (PM) Region according to
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 * ACPI 6.0: 5.2.25.1 System Physical Address Range Structure.
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 */
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static const uint8_t nvdimm_nfit_spa_uuid[] =
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      UUID_LE(0x66f0d379, 0xb4f3, 0x4074, 0xac, 0x43, 0x0d, 0x33,
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              0x18, 0xb7, 0x8c, 0xdb);
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/*
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 * define NFIT structures according to ACPI 6.0: 5.2.25 NVDIMM Firmware
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 * Interface Table (NFIT).
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 */
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/*
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 * System Physical Address Range Structure
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 *
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 * It describes the system physical address ranges occupied by NVDIMMs and
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 * the types of the regions.
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 */
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struct NvdimmNfitSpa {
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    uint16_t type;
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    uint16_t length;
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    uint16_t spa_index;
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    uint16_t flags;
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    uint32_t reserved;
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    uint32_t proximity_domain;
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    uint8_t type_guid[16];
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    uint64_t spa_base;
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    uint64_t spa_length;
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    uint64_t mem_attr;
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} QEMU_PACKED;
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typedef struct NvdimmNfitSpa NvdimmNfitSpa;
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/*
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 * Memory Device to System Physical Address Range Mapping Structure
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 *
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 * It enables identifying each NVDIMM region and the corresponding SPA
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 * describing the memory interleave
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 */
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struct NvdimmNfitMemDev {
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    uint16_t type;
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    uint16_t length;
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    uint32_t nfit_handle;
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    uint16_t phys_id;
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    uint16_t region_id;
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    uint16_t spa_index;
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    uint16_t dcr_index;
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    uint64_t region_len;
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    uint64_t region_offset;
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    uint64_t region_dpa;
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    uint16_t interleave_index;
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    uint16_t interleave_ways;
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    uint16_t flags;
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    uint16_t reserved;
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} QEMU_PACKED;
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typedef struct NvdimmNfitMemDev NvdimmNfitMemDev;
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#define ACPI_NFIT_MEM_NOT_ARMED     (1 << 3)
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/*
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 * NVDIMM Control Region Structure
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 *
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 * It describes the NVDIMM and if applicable, Block Control Window.
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 */
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struct NvdimmNfitControlRegion {
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    uint16_t type;
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    uint16_t length;
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    uint16_t dcr_index;
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    uint16_t vendor_id;
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    uint16_t device_id;
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    uint16_t revision_id;
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    uint16_t sub_vendor_id;
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    uint16_t sub_device_id;
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    uint16_t sub_revision_id;
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    uint8_t reserved[6];
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    uint32_t serial_number;
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    uint16_t fic;
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    uint16_t num_bcw;
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    uint64_t bcw_size;
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    uint64_t cmd_offset;
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    uint64_t cmd_size;
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    uint64_t status_offset;
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    uint64_t status_size;
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    uint16_t flags;
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    uint8_t reserved2[6];
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} QEMU_PACKED;
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typedef struct NvdimmNfitControlRegion NvdimmNfitControlRegion;
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/*
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 * NVDIMM Platform Capabilities Structure
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 *
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 * Defined in section 5.2.25.9 of ACPI 6.2 Errata A, September 2017
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 */
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struct NvdimmNfitPlatformCaps {
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    uint16_t type;
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    uint16_t length;
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    uint8_t highest_cap;
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    uint8_t reserved[3];
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    uint32_t capabilities;
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    uint8_t reserved2[4];
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} QEMU_PACKED;
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typedef struct NvdimmNfitPlatformCaps NvdimmNfitPlatformCaps;
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/*
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 * Module serial number is a unique number for each device. We use the
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 * slot id of NVDIMM device to generate this number so that each device
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 * associates with a different number.
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 *
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 * 0x123456 is a magic number we arbitrarily chose.
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 */
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static uint32_t nvdimm_slot_to_sn(int slot)
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{
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    return 0x123456 + slot;
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}
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/*
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 * handle is used to uniquely associate nfit_memdev structure with NVDIMM
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 * ACPI device - nfit_memdev.nfit_handle matches with the value returned
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 * by ACPI device _ADR method.
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 *
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 * We generate the handle with the slot id of NVDIMM device and reserve
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 * 0 for NVDIMM root device.
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 */
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static uint32_t nvdimm_slot_to_handle(int slot)
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{
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    return slot + 1;
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}
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/*
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 * index uniquely identifies the structure, 0 is reserved which indicates
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 * that the structure is not valid or the associated structure is not
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 * present.
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 *
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 * Each NVDIMM device needs two indexes, one for nfit_spa and another for
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 * nfit_dc which are generated by the slot id of NVDIMM device.
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 */
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static uint16_t nvdimm_slot_to_spa_index(int slot)
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{
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    return (slot + 1) << 1;
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}
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/* See the comments of nvdimm_slot_to_spa_index(). */
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static uint32_t nvdimm_slot_to_dcr_index(int slot)
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{
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    return nvdimm_slot_to_spa_index(slot) + 1;
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}
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static NVDIMMDevice *nvdimm_get_device_by_handle(uint32_t handle)
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{
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    NVDIMMDevice *nvdimm = NULL;
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    GSList *list, *device_list = nvdimm_get_device_list();
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    for (list = device_list; list; list = list->next) {
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        NVDIMMDevice *nvd = list->data;
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        int slot = object_property_get_int(OBJECT(nvd), PC_DIMM_SLOT_PROP,
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                                           NULL);
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        if (nvdimm_slot_to_handle(slot) == handle) {
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            nvdimm = nvd;
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            break;
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        }
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    }
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    g_slist_free(device_list);
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    return nvdimm;
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}
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/* ACPI 6.0: 5.2.25.1 System Physical Address Range Structure */
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static void
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nvdimm_build_structure_spa(GArray *structures, DeviceState *dev)
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{
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    NvdimmNfitSpa *nfit_spa;
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    uint64_t addr = object_property_get_uint(OBJECT(dev), PC_DIMM_ADDR_PROP,
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                                             NULL);
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    uint64_t size = object_property_get_uint(OBJECT(dev), PC_DIMM_SIZE_PROP,
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                                             NULL);
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    uint32_t node = object_property_get_uint(OBJECT(dev), PC_DIMM_NODE_PROP,
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                                             NULL);
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    int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
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                                       NULL);
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    nfit_spa = acpi_data_push(structures, sizeof(*nfit_spa));
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    nfit_spa->type = cpu_to_le16(0 /* System Physical Address Range
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                                      Structure */);
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    nfit_spa->length = cpu_to_le16(sizeof(*nfit_spa));
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    nfit_spa->spa_index = cpu_to_le16(nvdimm_slot_to_spa_index(slot));
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    /*
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     * Control region is strict as all the device info, such as SN, index,
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     * is associated with slot id.
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     */
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    nfit_spa->flags = cpu_to_le16(1 /* Control region is strictly for
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                                       management during hot add/online
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                                       operation */ |
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                                  2 /* Data in Proximity Domain field is
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                                       valid*/);
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    /* NUMA node. */
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    nfit_spa->proximity_domain = cpu_to_le32(node);
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    /* the region reported as PMEM. */
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    memcpy(nfit_spa->type_guid, nvdimm_nfit_spa_uuid,
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           sizeof(nvdimm_nfit_spa_uuid));
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    nfit_spa->spa_base = cpu_to_le64(addr);
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    nfit_spa->spa_length = cpu_to_le64(size);
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    /* It is the PMEM and can be cached as writeback. */
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    nfit_spa->mem_attr = cpu_to_le64(0x8ULL /* EFI_MEMORY_WB */ |
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                                     0x8000ULL /* EFI_MEMORY_NV */);
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}
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/*
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 * ACPI 6.0: 5.2.25.2 Memory Device to System Physical Address Range Mapping
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 * Structure
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 */
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static void
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nvdimm_build_structure_memdev(GArray *structures, DeviceState *dev)
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{
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    NvdimmNfitMemDev *nfit_memdev;
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    NVDIMMDevice *nvdimm = NVDIMM(OBJECT(dev));
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    uint64_t size = object_property_get_uint(OBJECT(dev), PC_DIMM_SIZE_PROP,
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                                             NULL);
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    int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
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                                            NULL);
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    uint32_t handle = nvdimm_slot_to_handle(slot);
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    nfit_memdev = acpi_data_push(structures, sizeof(*nfit_memdev));
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    nfit_memdev->type = cpu_to_le16(1 /* Memory Device to System Address
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                                         Range Map Structure*/);
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    nfit_memdev->length = cpu_to_le16(sizeof(*nfit_memdev));
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    nfit_memdev->nfit_handle = cpu_to_le32(handle);
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    /*
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     * associate memory device with System Physical Address Range
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     * Structure.
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     */
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    nfit_memdev->spa_index = cpu_to_le16(nvdimm_slot_to_spa_index(slot));
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    /* associate memory device with Control Region Structure. */
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    nfit_memdev->dcr_index = cpu_to_le16(nvdimm_slot_to_dcr_index(slot));
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    /* The memory region on the device. */
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    nfit_memdev->region_len = cpu_to_le64(size);
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    /* The device address starts from 0. */
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    nfit_memdev->region_dpa = cpu_to_le64(0);
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    /* Only one interleave for PMEM. */
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    nfit_memdev->interleave_ways = cpu_to_le16(1);
289

290
    if (nvdimm->unarmed) {
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        nfit_memdev->flags |= cpu_to_le16(ACPI_NFIT_MEM_NOT_ARMED);
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    }
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}
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/*
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 * ACPI 6.0: 5.2.25.5 NVDIMM Control Region Structure.
297
 */
298
static void nvdimm_build_structure_dcr(GArray *structures, DeviceState *dev)
299
{
300
    NvdimmNfitControlRegion *nfit_dcr;
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    int slot = object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP,
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                                       NULL);
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    uint32_t sn = nvdimm_slot_to_sn(slot);
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    nfit_dcr = acpi_data_push(structures, sizeof(*nfit_dcr));
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    nfit_dcr->type = cpu_to_le16(4 /* NVDIMM Control Region Structure */);
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    nfit_dcr->length = cpu_to_le16(sizeof(*nfit_dcr));
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    nfit_dcr->dcr_index = cpu_to_le16(nvdimm_slot_to_dcr_index(slot));
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    /* vendor: Intel. */
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    nfit_dcr->vendor_id = cpu_to_le16(0x8086);
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    nfit_dcr->device_id = cpu_to_le16(1);
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    /* The _DSM method is following Intel's DSM specification. */
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    nfit_dcr->revision_id = cpu_to_le16(1 /* Current Revision supported
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                                             in ACPI 6.0 is 1. */);
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    nfit_dcr->serial_number = cpu_to_le32(sn);
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    nfit_dcr->fic = cpu_to_le16(0x301 /* Format Interface Code:
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                                         Byte addressable, no energy backed.
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                                         See ACPI 6.2, sect 5.2.25.6 and
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                                         JEDEC Annex L Release 3. */);
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}
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325
/*
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 * ACPI 6.2 Errata A: 5.2.25.9 NVDIMM Platform Capabilities Structure
327
 */
328
static void
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nvdimm_build_structure_caps(GArray *structures, uint32_t capabilities)
330
{
331
    NvdimmNfitPlatformCaps *nfit_caps;
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333
    nfit_caps = acpi_data_push(structures, sizeof(*nfit_caps));
334

335
    nfit_caps->type = cpu_to_le16(7 /* NVDIMM Platform Capabilities */);
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    nfit_caps->length = cpu_to_le16(sizeof(*nfit_caps));
337
    nfit_caps->highest_cap = 31 - clz32(capabilities);
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    nfit_caps->capabilities = cpu_to_le32(capabilities);
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}
340

341
static GArray *nvdimm_build_device_structure(NVDIMMState *state)
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{
343
    GSList *device_list, *list = nvdimm_get_device_list();
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    GArray *structures = g_array_new(false, true /* clear */, 1);
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    for (device_list = list; device_list; device_list = device_list->next) {
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        DeviceState *dev = device_list->data;
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        /* build System Physical Address Range Structure. */
350
        nvdimm_build_structure_spa(structures, dev);
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        /*
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         * build Memory Device to System Physical Address Range Mapping
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         * Structure.
355
         */
356
        nvdimm_build_structure_memdev(structures, dev);
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358
        /* build NVDIMM Control Region Structure. */
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        nvdimm_build_structure_dcr(structures, dev);
360
    }
361
    g_slist_free(list);
362

363
    if (state->persistence) {
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        nvdimm_build_structure_caps(structures, state->persistence);
365
    }
366

367
    return structures;
368
}
369

370
static void nvdimm_init_fit_buffer(NvdimmFitBuffer *fit_buf)
371
{
372
    fit_buf->fit = g_array_new(false, true /* clear */, 1);
373
}
374

375
static void nvdimm_build_fit_buffer(NVDIMMState *state)
376
{
377
    NvdimmFitBuffer *fit_buf = &state->fit_buf;
378

379
    g_array_free(fit_buf->fit, true);
380
    fit_buf->fit = nvdimm_build_device_structure(state);
381
    fit_buf->dirty = true;
382
}
383

384
void nvdimm_plug(NVDIMMState *state)
385
{
386
    nvdimm_build_fit_buffer(state);
387
}
388

389
/*
390
 * NVDIMM Firmware Interface Table
391
 * @signature: "NFIT"
392
 *
393
 * It provides information that allows OSPM to enumerate NVDIMM present in
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 * the platform and associate system physical address ranges created by the
395
 * NVDIMMs.
396
 *
397
 * It is defined in ACPI 6.0: 5.2.25 NVDIMM Firmware Interface Table (NFIT)
398
 */
399

400
static void nvdimm_build_nfit(NVDIMMState *state, GArray *table_offsets,
401
                              GArray *table_data, BIOSLinker *linker,
402
                              const char *oem_id, const char *oem_table_id)
403
{
404
    NvdimmFitBuffer *fit_buf = &state->fit_buf;
405
    AcpiTable table = { .sig = "NFIT", .rev = 1,
406
                        .oem_id = oem_id, .oem_table_id = oem_table_id };
407

408
    acpi_add_table(table_offsets, table_data);
409

410
    acpi_table_begin(&table, table_data);
411
    /* Reserved */
412
    build_append_int_noprefix(table_data, 0, 4);
413
    /* NVDIMM device structures. */
414
    g_array_append_vals(table_data, fit_buf->fit->data, fit_buf->fit->len);
415
    acpi_table_end(linker, &table);
416
}
417

418
#define NVDIMM_DSM_MEMORY_SIZE      4096
419

420
struct NvdimmDsmIn {
421
    uint32_t handle;
422
    uint32_t revision;
423
    uint32_t function;
424
    /* the remaining size in the page is used by arg3. */
425
    union {
426
        uint8_t arg3[4084];
427
    };
428
} QEMU_PACKED;
429
typedef struct NvdimmDsmIn NvdimmDsmIn;
430
QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmIn) != NVDIMM_DSM_MEMORY_SIZE);
431

432
struct NvdimmDsmOut {
433
    /* the size of buffer filled by QEMU. */
434
    uint32_t len;
435
    uint8_t data[4092];
436
} QEMU_PACKED;
437
typedef struct NvdimmDsmOut NvdimmDsmOut;
438
QEMU_BUILD_BUG_ON(sizeof(NvdimmDsmOut) != NVDIMM_DSM_MEMORY_SIZE);
439

440
struct NvdimmDsmFunc0Out {
441
    /* the size of buffer filled by QEMU. */
442
     uint32_t len;
443
     uint32_t supported_func;
444
} QEMU_PACKED;
445
typedef struct NvdimmDsmFunc0Out NvdimmDsmFunc0Out;
446

447
struct NvdimmDsmFuncNoPayloadOut {
448
    /* the size of buffer filled by QEMU. */
449
     uint32_t len;
450
     uint32_t func_ret_status;
451
} QEMU_PACKED;
452
typedef struct NvdimmDsmFuncNoPayloadOut NvdimmDsmFuncNoPayloadOut;
453

454
struct NvdimmFuncGetLabelSizeOut {
455
    /* the size of buffer filled by QEMU. */
456
    uint32_t len;
457
    uint32_t func_ret_status; /* return status code. */
458
    uint32_t label_size; /* the size of label data area. */
459
    /*
460
     * Maximum size of the namespace label data length supported by
461
     * the platform in Get/Set Namespace Label Data functions.
462
     */
463
    uint32_t max_xfer;
464
} QEMU_PACKED;
465
typedef struct NvdimmFuncGetLabelSizeOut NvdimmFuncGetLabelSizeOut;
466
QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelSizeOut) > NVDIMM_DSM_MEMORY_SIZE);
467

468
struct NvdimmFuncGetLabelDataIn {
469
    uint32_t offset; /* the offset in the namespace label data area. */
470
    uint32_t length; /* the size of data is to be read via the function. */
471
} QEMU_PACKED;
472
typedef struct NvdimmFuncGetLabelDataIn NvdimmFuncGetLabelDataIn;
473
QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataIn) +
474
                  offsetof(NvdimmDsmIn, arg3) > NVDIMM_DSM_MEMORY_SIZE);
475

476
struct NvdimmFuncGetLabelDataOut {
477
    /* the size of buffer filled by QEMU. */
478
    uint32_t len;
479
    uint32_t func_ret_status; /* return status code. */
480
    uint8_t out_buf[]; /* the data got via Get Namespace Label function. */
481
} QEMU_PACKED;
482
typedef struct NvdimmFuncGetLabelDataOut NvdimmFuncGetLabelDataOut;
483
QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncGetLabelDataOut) > NVDIMM_DSM_MEMORY_SIZE);
484

485
struct NvdimmFuncSetLabelDataIn {
486
    uint32_t offset; /* the offset in the namespace label data area. */
487
    uint32_t length; /* the size of data is to be written via the function. */
488
    uint8_t in_buf[]; /* the data written to label data area. */
489
} QEMU_PACKED;
490
typedef struct NvdimmFuncSetLabelDataIn NvdimmFuncSetLabelDataIn;
491
QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncSetLabelDataIn) +
492
                  offsetof(NvdimmDsmIn, arg3) > NVDIMM_DSM_MEMORY_SIZE);
493

494
struct NvdimmFuncReadFITIn {
495
    uint32_t offset; /* the offset into FIT buffer. */
496
} QEMU_PACKED;
497
typedef struct NvdimmFuncReadFITIn NvdimmFuncReadFITIn;
498
QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncReadFITIn) +
499
                  offsetof(NvdimmDsmIn, arg3) > NVDIMM_DSM_MEMORY_SIZE);
500

501
struct NvdimmFuncReadFITOut {
502
    /* the size of buffer filled by QEMU. */
503
    uint32_t len;
504
    uint32_t func_ret_status; /* return status code. */
505
    uint8_t fit[]; /* the FIT data. */
506
} QEMU_PACKED;
507
typedef struct NvdimmFuncReadFITOut NvdimmFuncReadFITOut;
508
QEMU_BUILD_BUG_ON(sizeof(NvdimmFuncReadFITOut) > NVDIMM_DSM_MEMORY_SIZE);
509

510
static void
511
nvdimm_dsm_function0(uint32_t supported_func, hwaddr dsm_mem_addr)
512
{
513
    NvdimmDsmFunc0Out func0 = {
514
        .len = cpu_to_le32(sizeof(func0)),
515
        .supported_func = cpu_to_le32(supported_func),
516
    };
517
    cpu_physical_memory_write(dsm_mem_addr, &func0, sizeof(func0));
518
}
519

520
static void
521
nvdimm_dsm_no_payload(uint32_t func_ret_status, hwaddr dsm_mem_addr)
522
{
523
    NvdimmDsmFuncNoPayloadOut out = {
524
        .len = cpu_to_le32(sizeof(out)),
525
        .func_ret_status = cpu_to_le32(func_ret_status),
526
    };
527
    cpu_physical_memory_write(dsm_mem_addr, &out, sizeof(out));
528
}
529

530
#define NVDIMM_DSM_RET_STATUS_SUCCESS        0 /* Success */
531
#define NVDIMM_DSM_RET_STATUS_UNSUPPORT      1 /* Not Supported */
532
#define NVDIMM_DSM_RET_STATUS_NOMEMDEV       2 /* Non-Existing Memory Device */
533
#define NVDIMM_DSM_RET_STATUS_INVALID        3 /* Invalid Input Parameters */
534
#define NVDIMM_DSM_RET_STATUS_FIT_CHANGED    0x100 /* FIT Changed */
535

536
#define NVDIMM_QEMU_RSVD_HANDLE_ROOT         0x10000
537

538
/* Read FIT data, defined in docs/specs/acpi_nvdimm.txt. */
539
static void nvdimm_dsm_func_read_fit(NVDIMMState *state, NvdimmDsmIn *in,
540
                                     hwaddr dsm_mem_addr)
541
{
542
    NvdimmFitBuffer *fit_buf = &state->fit_buf;
543
    NvdimmFuncReadFITIn *read_fit;
544
    NvdimmFuncReadFITOut *read_fit_out;
545
    GArray *fit;
546
    uint32_t read_len = 0, func_ret_status;
547
    int size;
548

549
    read_fit = (NvdimmFuncReadFITIn *)in->arg3;
550
    read_fit->offset = le32_to_cpu(read_fit->offset);
551

552
    fit = fit_buf->fit;
553

554
    trace_acpi_nvdimm_read_fit(read_fit->offset, fit->len,
555
                               fit_buf->dirty ? "Yes" : "No");
556

557
    if (read_fit->offset > fit->len) {
558
        func_ret_status = NVDIMM_DSM_RET_STATUS_INVALID;
559
        goto exit;
560
    }
561

562
    /* It is the first time to read FIT. */
563
    if (!read_fit->offset) {
564
        fit_buf->dirty = false;
565
    } else if (fit_buf->dirty) { /* FIT has been changed during RFIT. */
566
        func_ret_status = NVDIMM_DSM_RET_STATUS_FIT_CHANGED;
567
        goto exit;
568
    }
569

570
    func_ret_status = NVDIMM_DSM_RET_STATUS_SUCCESS;
571
    read_len = MIN(fit->len - read_fit->offset,
572
                   NVDIMM_DSM_MEMORY_SIZE - sizeof(NvdimmFuncReadFITOut));
573

574
exit:
575
    size = sizeof(NvdimmFuncReadFITOut) + read_len;
576
    read_fit_out = g_malloc(size);
577

578
    read_fit_out->len = cpu_to_le32(size);
579
    read_fit_out->func_ret_status = cpu_to_le32(func_ret_status);
580
    memcpy(read_fit_out->fit, fit->data + read_fit->offset, read_len);
581

582
    cpu_physical_memory_write(dsm_mem_addr, read_fit_out, size);
583

584
    g_free(read_fit_out);
585
}
586

587
static void
588
nvdimm_dsm_handle_reserved_root_method(NVDIMMState *state,
589
                                       NvdimmDsmIn *in, hwaddr dsm_mem_addr)
590
{
591
    switch (in->function) {
592
    case 0x0:
593
        nvdimm_dsm_function0(0x1 | 1 << 1 /* Read FIT */, dsm_mem_addr);
594
        return;
595
    case 0x1 /* Read FIT */:
596
        nvdimm_dsm_func_read_fit(state, in, dsm_mem_addr);
597
        return;
598
    }
599

600
    nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT, dsm_mem_addr);
601
}
602

603
static void nvdimm_dsm_root(NvdimmDsmIn *in, hwaddr dsm_mem_addr)
604
{
605
    /*
606
     * function 0 is called to inquire which functions are supported by
607
     * OSPM
608
     */
609
    if (!in->function) {
610
        nvdimm_dsm_function0(0 /* No function supported other than
611
                                  function 0 */, dsm_mem_addr);
612
        return;
613
    }
614

615
    /* No function except function 0 is supported yet. */
616
    nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT, dsm_mem_addr);
617
}
618

619
/*
620
 * the max transfer size is the max size transferred by both a
621
 * 'Get Namespace Label Data' function and a 'Set Namespace Label Data'
622
 * function.
623
 */
624
static uint32_t nvdimm_get_max_xfer_label_size(void)
625
{
626
    uint32_t max_get_size, max_set_size, dsm_memory_size;
627

628
    dsm_memory_size = NVDIMM_DSM_MEMORY_SIZE;
629

630
    /*
631
     * the max data ACPI can read one time which is transferred by
632
     * the response of 'Get Namespace Label Data' function.
633
     */
634
    max_get_size = dsm_memory_size - sizeof(NvdimmFuncGetLabelDataOut);
635

636
    /*
637
     * the max data ACPI can write one time which is transferred by
638
     * 'Set Namespace Label Data' function.
639
     */
640
    max_set_size = dsm_memory_size - offsetof(NvdimmDsmIn, arg3) -
641
                   sizeof(NvdimmFuncSetLabelDataIn);
642

643
    return MIN(max_get_size, max_set_size);
644
}
645

646
/*
647
 * DSM Spec Rev1 4.4 Get Namespace Label Size (Function Index 4).
648
 *
649
 * It gets the size of Namespace Label data area and the max data size
650
 * that Get/Set Namespace Label Data functions can transfer.
651
 */
652
static void nvdimm_dsm_label_size(NVDIMMDevice *nvdimm, hwaddr dsm_mem_addr)
653
{
654
    NvdimmFuncGetLabelSizeOut label_size_out = {
655
        .len = cpu_to_le32(sizeof(label_size_out)),
656
    };
657
    uint32_t label_size, mxfer;
658

659
    label_size = nvdimm->label_size;
660
    mxfer = nvdimm_get_max_xfer_label_size();
661

662
    trace_acpi_nvdimm_label_info(label_size, mxfer);
663

664
    label_size_out.func_ret_status = cpu_to_le32(NVDIMM_DSM_RET_STATUS_SUCCESS);
665
    label_size_out.label_size = cpu_to_le32(label_size);
666
    label_size_out.max_xfer = cpu_to_le32(mxfer);
667

668
    cpu_physical_memory_write(dsm_mem_addr, &label_size_out,
669
                              sizeof(label_size_out));
670
}
671

672
static uint32_t nvdimm_rw_label_data_check(NVDIMMDevice *nvdimm,
673
                                           uint32_t offset, uint32_t length,
674
                                           bool is_write)
675
{
676
    uint32_t ret = NVDIMM_DSM_RET_STATUS_INVALID;
677

678
    if (offset + length < offset) {
679
        trace_acpi_nvdimm_label_overflow(offset, length);
680
        return ret;
681
    }
682

683
    if (nvdimm->label_size < offset + length) {
684
        trace_acpi_nvdimm_label_oversize(offset + length, nvdimm->label_size);
685
        return ret;
686
    }
687

688
    if (length > nvdimm_get_max_xfer_label_size()) {
689
        trace_acpi_nvdimm_label_xfer_exceed(length,
690
                                            nvdimm_get_max_xfer_label_size());
691
        return ret;
692
    }
693

694
    if (is_write && nvdimm->readonly) {
695
        return NVDIMM_DSM_RET_STATUS_UNSUPPORT;
696
    }
697

698
    return NVDIMM_DSM_RET_STATUS_SUCCESS;
699
}
700

701
/*
702
 * DSM Spec Rev1 4.5 Get Namespace Label Data (Function Index 5).
703
 */
704
static void nvdimm_dsm_get_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in,
705
                                      hwaddr dsm_mem_addr)
706
{
707
    NVDIMMClass *nvc = NVDIMM_GET_CLASS(nvdimm);
708
    NvdimmFuncGetLabelDataIn *get_label_data;
709
    NvdimmFuncGetLabelDataOut *get_label_data_out;
710
    uint32_t status;
711
    int size;
712

713
    get_label_data = (NvdimmFuncGetLabelDataIn *)in->arg3;
714
    get_label_data->offset = le32_to_cpu(get_label_data->offset);
715
    get_label_data->length = le32_to_cpu(get_label_data->length);
716

717
    trace_acpi_nvdimm_read_label(get_label_data->offset,
718
                                 get_label_data->length);
719

720
    status = nvdimm_rw_label_data_check(nvdimm, get_label_data->offset,
721
                                        get_label_data->length, false);
722
    if (status != NVDIMM_DSM_RET_STATUS_SUCCESS) {
723
        nvdimm_dsm_no_payload(status, dsm_mem_addr);
724
        return;
725
    }
726

727
    size = sizeof(*get_label_data_out) + get_label_data->length;
728
    assert(size <= NVDIMM_DSM_MEMORY_SIZE);
729
    get_label_data_out = g_malloc(size);
730

731
    get_label_data_out->len = cpu_to_le32(size);
732
    get_label_data_out->func_ret_status =
733
                            cpu_to_le32(NVDIMM_DSM_RET_STATUS_SUCCESS);
734
    nvc->read_label_data(nvdimm, get_label_data_out->out_buf,
735
                         get_label_data->length, get_label_data->offset);
736

737
    cpu_physical_memory_write(dsm_mem_addr, get_label_data_out, size);
738
    g_free(get_label_data_out);
739
}
740

741
/*
742
 * DSM Spec Rev1 4.6 Set Namespace Label Data (Function Index 6).
743
 */
744
static void nvdimm_dsm_set_label_data(NVDIMMDevice *nvdimm, NvdimmDsmIn *in,
745
                                      hwaddr dsm_mem_addr)
746
{
747
    NVDIMMClass *nvc = NVDIMM_GET_CLASS(nvdimm);
748
    NvdimmFuncSetLabelDataIn *set_label_data;
749
    uint32_t status;
750

751
    set_label_data = (NvdimmFuncSetLabelDataIn *)in->arg3;
752

753
    set_label_data->offset = le32_to_cpu(set_label_data->offset);
754
    set_label_data->length = le32_to_cpu(set_label_data->length);
755

756
    trace_acpi_nvdimm_write_label(set_label_data->offset,
757
                                  set_label_data->length);
758

759
    status = nvdimm_rw_label_data_check(nvdimm, set_label_data->offset,
760
                                        set_label_data->length, true);
761
    if (status != NVDIMM_DSM_RET_STATUS_SUCCESS) {
762
        nvdimm_dsm_no_payload(status, dsm_mem_addr);
763
        return;
764
    }
765

766
    assert(offsetof(NvdimmDsmIn, arg3) + sizeof(*set_label_data) +
767
                    set_label_data->length <= NVDIMM_DSM_MEMORY_SIZE);
768

769
    nvc->write_label_data(nvdimm, set_label_data->in_buf,
770
                          set_label_data->length, set_label_data->offset);
771
    nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_SUCCESS, dsm_mem_addr);
772
}
773

774
static void nvdimm_dsm_device(NvdimmDsmIn *in, hwaddr dsm_mem_addr)
775
{
776
    NVDIMMDevice *nvdimm = nvdimm_get_device_by_handle(in->handle);
777

778
    /* See the comments in nvdimm_dsm_root(). */
779
    if (!in->function) {
780
        uint32_t supported_func = 0;
781

782
        if (nvdimm && nvdimm->label_size) {
783
            supported_func |= 0x1 /* Bit 0 indicates whether there is
784
                                     support for any functions other
785
                                     than function 0. */ |
786
                              1 << 4 /* Get Namespace Label Size */ |
787
                              1 << 5 /* Get Namespace Label Data */ |
788
                              1 << 6 /* Set Namespace Label Data */;
789
        }
790
        nvdimm_dsm_function0(supported_func, dsm_mem_addr);
791
        return;
792
    }
793

794
    if (!nvdimm) {
795
        nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_NOMEMDEV,
796
                              dsm_mem_addr);
797
        return;
798
    }
799

800
    /* Encode DSM function according to DSM Spec Rev1. */
801
    switch (in->function) {
802
    case 4 /* Get Namespace Label Size */:
803
        if (nvdimm->label_size) {
804
            nvdimm_dsm_label_size(nvdimm, dsm_mem_addr);
805
            return;
806
        }
807
        break;
808
    case 5 /* Get Namespace Label Data */:
809
        if (nvdimm->label_size) {
810
            nvdimm_dsm_get_label_data(nvdimm, in, dsm_mem_addr);
811
            return;
812
        }
813
        break;
814
    case 0x6 /* Set Namespace Label Data */:
815
        if (nvdimm->label_size) {
816
            nvdimm_dsm_set_label_data(nvdimm, in, dsm_mem_addr);
817
            return;
818
        }
819
        break;
820
    }
821

822
    nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT, dsm_mem_addr);
823
}
824

825
static uint64_t
826
nvdimm_dsm_read(void *opaque, hwaddr addr, unsigned size)
827
{
828
    trace_acpi_nvdimm_read_io_port();
829
    return 0;
830
}
831

832
static void
833
nvdimm_dsm_write(void *opaque, hwaddr addr, uint64_t val, unsigned size)
834
{
835
    NVDIMMState *state = opaque;
836
    NvdimmDsmIn *in;
837
    hwaddr dsm_mem_addr = val;
838

839
    trace_acpi_nvdimm_dsm_mem_addr(dsm_mem_addr);
840

841
    /*
842
     * The DSM memory is mapped to guest address space so an evil guest
843
     * can change its content while we are doing DSM emulation. Avoid
844
     * this by copying DSM memory to QEMU local memory.
845
     */
846
    in = g_new(NvdimmDsmIn, 1);
847
    cpu_physical_memory_read(dsm_mem_addr, in, sizeof(*in));
848

849
    in->revision = le32_to_cpu(in->revision);
850
    in->function = le32_to_cpu(in->function);
851
    in->handle = le32_to_cpu(in->handle);
852

853
    trace_acpi_nvdimm_dsm_info(in->revision, in->handle, in->function);
854

855
    if (in->revision != 0x1 /* Currently we only support DSM Spec Rev1. */) {
856
        trace_acpi_nvdimm_invalid_revision(in->revision);
857
        nvdimm_dsm_no_payload(NVDIMM_DSM_RET_STATUS_UNSUPPORT, dsm_mem_addr);
858
        goto exit;
859
    }
860

861
    if (in->handle == NVDIMM_QEMU_RSVD_HANDLE_ROOT) {
862
        nvdimm_dsm_handle_reserved_root_method(state, in, dsm_mem_addr);
863
        goto exit;
864
    }
865

866
     /* Handle 0 is reserved for NVDIMM Root Device. */
867
    if (!in->handle) {
868
        nvdimm_dsm_root(in, dsm_mem_addr);
869
        goto exit;
870
    }
871

872
    nvdimm_dsm_device(in, dsm_mem_addr);
873

874
exit:
875
    g_free(in);
876
}
877

878
static const MemoryRegionOps nvdimm_dsm_ops = {
879
    .read = nvdimm_dsm_read,
880
    .write = nvdimm_dsm_write,
881
    .endianness = DEVICE_LITTLE_ENDIAN,
882
    .valid = {
883
        .min_access_size = 4,
884
        .max_access_size = 4,
885
    },
886
};
887

888
void nvdimm_acpi_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev)
889
{
890
    if (dev->hotplugged) {
891
        acpi_send_event(DEVICE(hotplug_dev), ACPI_NVDIMM_HOTPLUG_STATUS);
892
    }
893
}
894

895
void nvdimm_init_acpi_state(NVDIMMState *state, MemoryRegion *io,
896
                            struct AcpiGenericAddress dsm_io,
897
                            FWCfgState *fw_cfg, Object *owner)
898
{
899
    state->dsm_io = dsm_io;
900
    memory_region_init_io(&state->io_mr, owner, &nvdimm_dsm_ops, state,
901
                          "nvdimm-acpi-io", dsm_io.bit_width >> 3);
902
    memory_region_add_subregion(io, dsm_io.address, &state->io_mr);
903

904
    state->dsm_mem = g_array_new(false, true /* clear */, 1);
905
    acpi_data_push(state->dsm_mem, sizeof(NvdimmDsmIn));
906
    fw_cfg_add_file(fw_cfg, NVDIMM_DSM_MEM_FILE, state->dsm_mem->data,
907
                    state->dsm_mem->len);
908

909
    nvdimm_init_fit_buffer(&state->fit_buf);
910
}
911

912
#define NVDIMM_COMMON_DSM       "NCAL"
913
#define NVDIMM_ACPI_MEM_ADDR    "MEMA"
914

915
#define NVDIMM_DSM_MEMORY       "NRAM"
916
#define NVDIMM_DSM_IOPORT       "NPIO"
917

918
#define NVDIMM_DSM_NOTIFY       "NTFI"
919
#define NVDIMM_DSM_HANDLE       "HDLE"
920
#define NVDIMM_DSM_REVISION     "REVS"
921
#define NVDIMM_DSM_FUNCTION     "FUNC"
922
#define NVDIMM_DSM_ARG3         "FARG"
923

924
#define NVDIMM_DSM_OUT_BUF_SIZE "RLEN"
925
#define NVDIMM_DSM_OUT_BUF      "ODAT"
926

927
#define NVDIMM_DSM_RFIT_STATUS  "RSTA"
928

929
#define NVDIMM_QEMU_RSVD_UUID   "648B9CF2-CDA1-4312-8AD9-49C4AF32BD62"
930
#define NVDIMM_DEVICE_DSM_UUID  "4309AC30-0D11-11E4-9191-0800200C9A66"
931

932
static void nvdimm_build_common_dsm(Aml *dev,
933
                                    NVDIMMState *nvdimm_state)
934
{
935
    Aml *method, *ifctx, *function, *handle, *uuid, *dsm_mem, *elsectx2;
936
    Aml *elsectx, *unsupport, *unpatched, *expected_uuid, *uuid_invalid;
937
    Aml *pckg, *pckg_index, *pckg_buf, *field, *dsm_out_buf, *dsm_out_buf_size;
938
    Aml *whilectx, *offset;
939
    uint8_t byte_list[1];
940
    AmlRegionSpace rs;
941

942
    method = aml_method(NVDIMM_COMMON_DSM, 5, AML_SERIALIZED);
943
    uuid = aml_arg(0);
944
    function = aml_arg(2);
945
    handle = aml_arg(4);
946
    dsm_mem = aml_local(6);
947
    dsm_out_buf = aml_local(7);
948

949
    aml_append(method, aml_store(aml_name(NVDIMM_ACPI_MEM_ADDR), dsm_mem));
950

951
    if (nvdimm_state->dsm_io.space_id == AML_AS_SYSTEM_IO) {
952
        rs = AML_SYSTEM_IO;
953
    } else {
954
        rs = AML_SYSTEM_MEMORY;
955
    }
956

957
    /* map DSM memory and IO into ACPI namespace. */
958
    aml_append(method, aml_operation_region(NVDIMM_DSM_IOPORT, rs,
959
               aml_int(nvdimm_state->dsm_io.address),
960
               nvdimm_state->dsm_io.bit_width >> 3));
961
    aml_append(method, aml_operation_region(NVDIMM_DSM_MEMORY,
962
               AML_SYSTEM_MEMORY, dsm_mem, sizeof(NvdimmDsmIn)));
963

964
    /*
965
     * DSM notifier:
966
     * NVDIMM_DSM_NOTIFY: write the address of DSM memory and notify QEMU to
967
     *                    emulate the access.
968
     *
969
     * It is the IO port so that accessing them will cause VM-exit, the
970
     * control will be transferred to QEMU.
971
     */
972
    field = aml_field(NVDIMM_DSM_IOPORT, AML_DWORD_ACC, AML_NOLOCK,
973
                      AML_PRESERVE);
974
    aml_append(field, aml_named_field(NVDIMM_DSM_NOTIFY,
975
               nvdimm_state->dsm_io.bit_width));
976
    aml_append(method, field);
977

978
    /*
979
     * DSM input:
980
     * NVDIMM_DSM_HANDLE: store device's handle, it's zero if the _DSM call
981
     *                    happens on NVDIMM Root Device.
982
     * NVDIMM_DSM_REVISION: store the Arg1 of _DSM call.
983
     * NVDIMM_DSM_FUNCTION: store the Arg2 of _DSM call.
984
     * NVDIMM_DSM_ARG3: store the Arg3 of _DSM call which is a Package
985
     *                  containing function-specific arguments.
986
     *
987
     * They are RAM mapping on host so that these accesses never cause
988
     * VM-EXIT.
989
     */
990
    field = aml_field(NVDIMM_DSM_MEMORY, AML_DWORD_ACC, AML_NOLOCK,
991
                      AML_PRESERVE);
992
    aml_append(field, aml_named_field(NVDIMM_DSM_HANDLE,
993
               sizeof(typeof_field(NvdimmDsmIn, handle)) * BITS_PER_BYTE));
994
    aml_append(field, aml_named_field(NVDIMM_DSM_REVISION,
995
               sizeof(typeof_field(NvdimmDsmIn, revision)) * BITS_PER_BYTE));
996
    aml_append(field, aml_named_field(NVDIMM_DSM_FUNCTION,
997
               sizeof(typeof_field(NvdimmDsmIn, function)) * BITS_PER_BYTE));
998
    aml_append(field, aml_named_field(NVDIMM_DSM_ARG3,
999
         (sizeof(NvdimmDsmIn) - offsetof(NvdimmDsmIn, arg3)) * BITS_PER_BYTE));
1000
    aml_append(method, field);
1001

1002
    /*
1003
     * DSM output:
1004
     * NVDIMM_DSM_OUT_BUF_SIZE: the size of the buffer filled by QEMU.
1005
     * NVDIMM_DSM_OUT_BUF: the buffer QEMU uses to store the result.
1006
     *
1007
     * Since the page is reused by both input and out, the input data
1008
     * will be lost after storing new result into ODAT so we should fetch
1009
     * all the input data before writing the result.
1010
     */
1011
    field = aml_field(NVDIMM_DSM_MEMORY, AML_DWORD_ACC, AML_NOLOCK,
1012
                      AML_PRESERVE);
1013
    aml_append(field, aml_named_field(NVDIMM_DSM_OUT_BUF_SIZE,
1014
               sizeof(typeof_field(NvdimmDsmOut, len)) * BITS_PER_BYTE));
1015
    aml_append(field, aml_named_field(NVDIMM_DSM_OUT_BUF,
1016
       (sizeof(NvdimmDsmOut) - offsetof(NvdimmDsmOut, data)) * BITS_PER_BYTE));
1017
    aml_append(method, field);
1018

1019
    /*
1020
     * do not support any method if DSM memory address has not been
1021
     * patched.
1022
     */
1023
    unpatched = aml_equal(dsm_mem, aml_int(0x0));
1024

1025
    expected_uuid = aml_local(0);
1026

1027
    ifctx = aml_if(aml_equal(handle, aml_int(0x0)));
1028
    aml_append(ifctx, aml_store(
1029
               aml_touuid("2F10E7A4-9E91-11E4-89D3-123B93F75CBA")
1030
               /* UUID for NVDIMM Root Device */, expected_uuid));
1031
    aml_append(method, ifctx);
1032
    elsectx = aml_else();
1033
    ifctx = aml_if(aml_equal(handle, aml_int(NVDIMM_QEMU_RSVD_HANDLE_ROOT)));
1034
    aml_append(ifctx, aml_store(aml_touuid(NVDIMM_QEMU_RSVD_UUID
1035
               /* UUID for QEMU internal use */), expected_uuid));
1036
    aml_append(elsectx, ifctx);
1037
    elsectx2 = aml_else();
1038
    aml_append(elsectx2, aml_store(aml_touuid(NVDIMM_DEVICE_DSM_UUID)
1039
               /* UUID for NVDIMM Devices */, expected_uuid));
1040
    aml_append(elsectx, elsectx2);
1041
    aml_append(method, elsectx);
1042

1043
    uuid_invalid = aml_lnot(aml_equal(uuid, expected_uuid));
1044

1045
    unsupport = aml_if(aml_lor(unpatched, uuid_invalid));
1046

1047
    /*
1048
     * function 0 is called to inquire what functions are supported by
1049
     * OSPM
1050
     */
1051
    ifctx = aml_if(aml_equal(function, aml_int(0)));
1052
    byte_list[0] = 0 /* No function Supported */;
1053
    aml_append(ifctx, aml_return(aml_buffer(1, byte_list)));
1054
    aml_append(unsupport, ifctx);
1055

1056
    /* No function is supported yet. */
1057
    byte_list[0] = NVDIMM_DSM_RET_STATUS_UNSUPPORT;
1058
    aml_append(unsupport, aml_return(aml_buffer(1, byte_list)));
1059
    aml_append(method, unsupport);
1060

1061
    /*
1062
     * The HDLE indicates the DSM function is issued from which device,
1063
     * it reserves 0 for root device and is the handle for NVDIMM devices.
1064
     * See the comments in nvdimm_slot_to_handle().
1065
     */
1066
    aml_append(method, aml_store(handle, aml_name(NVDIMM_DSM_HANDLE)));
1067
    aml_append(method, aml_store(aml_arg(1), aml_name(NVDIMM_DSM_REVISION)));
1068
    aml_append(method, aml_store(function, aml_name(NVDIMM_DSM_FUNCTION)));
1069

1070
    /*
1071
     * The fourth parameter (Arg3) of _DSM is a package which contains
1072
     * a buffer, the layout of the buffer is specified by UUID (Arg0),
1073
     * Revision ID (Arg1) and Function Index (Arg2) which are documented
1074
     * in the DSM Spec.
1075
     */
1076
    pckg = aml_arg(3);
1077
    ifctx = aml_if(aml_land(aml_equal(aml_object_type(pckg),
1078
                   aml_int(4 /* Package */)) /* It is a Package? */,
1079
                   aml_equal(aml_sizeof(pckg), aml_int(1)) /* 1 element? */));
1080

1081
    pckg_index = aml_local(2);
1082
    pckg_buf = aml_local(3);
1083
    aml_append(ifctx, aml_store(aml_index(pckg, aml_int(0)), pckg_index));
1084
    aml_append(ifctx, aml_store(aml_derefof(pckg_index), pckg_buf));
1085
    aml_append(ifctx, aml_store(pckg_buf, aml_name(NVDIMM_DSM_ARG3)));
1086
    aml_append(method, ifctx);
1087

1088
    /*
1089
     * tell QEMU about the real address of DSM memory, then QEMU
1090
     * gets the control and fills the result in DSM memory.
1091
     */
1092
    aml_append(method, aml_store(dsm_mem, aml_name(NVDIMM_DSM_NOTIFY)));
1093

1094
    dsm_out_buf_size = aml_local(1);
1095
    /* RLEN is not included in the payload returned to guest. */
1096
    aml_append(method, aml_subtract(aml_name(NVDIMM_DSM_OUT_BUF_SIZE),
1097
               aml_int(4), dsm_out_buf_size));
1098

1099
    /*
1100
     * As per ACPI spec 6.3, Table 19-419 Object Conversion Rules, if
1101
     * the Buffer Field <= to the size of an Integer (in bits), it will
1102
     * be treated as an integer. Moreover, the integer size depends on
1103
     * DSDT tables revision number. If revision number is < 2, integer
1104
     * size is 32 bits, otherwise it is 64 bits.
1105
     * Because of this CreateField() cannot be used if RLEN < Integer Size.
1106
     *
1107
     * Also please note that APCI ASL operator SizeOf() doesn't support
1108
     * Integer and there isn't any other way to figure out the Integer
1109
     * size. Hence we assume 8 byte as Integer size and if RLEN < 8 bytes,
1110
     * build dsm_out_buf byte by byte.
1111
     */
1112
    ifctx = aml_if(aml_lless(dsm_out_buf_size, aml_int(8)));
1113
    offset = aml_local(2);
1114
    aml_append(ifctx, aml_store(aml_int(0), offset));
1115
    aml_append(ifctx, aml_name_decl("TBUF", aml_buffer(1, NULL)));
1116
    aml_append(ifctx, aml_store(aml_buffer(0, NULL), dsm_out_buf));
1117

1118
    whilectx = aml_while(aml_lless(offset, dsm_out_buf_size));
1119
    /* Copy 1 byte at offset from ODAT to temporary buffer(TBUF). */
1120
    aml_append(whilectx, aml_store(aml_derefof(aml_index(
1121
                                   aml_name(NVDIMM_DSM_OUT_BUF), offset)),
1122
                                   aml_index(aml_name("TBUF"), aml_int(0))));
1123
    aml_append(whilectx, aml_concatenate(dsm_out_buf, aml_name("TBUF"),
1124
                                         dsm_out_buf));
1125
    aml_append(whilectx, aml_increment(offset));
1126
    aml_append(ifctx, whilectx);
1127

1128
    aml_append(ifctx, aml_return(dsm_out_buf));
1129
    aml_append(method, ifctx);
1130

1131
    /* If RLEN >= Integer size, just use CreateField() operator */
1132
    aml_append(method, aml_store(aml_shiftleft(dsm_out_buf_size, aml_int(3)),
1133
                                 dsm_out_buf_size));
1134
    aml_append(method, aml_create_field(aml_name(NVDIMM_DSM_OUT_BUF),
1135
               aml_int(0), dsm_out_buf_size, "OBUF"));
1136
    aml_append(method, aml_return(aml_name("OBUF")));
1137

1138
    aml_append(dev, method);
1139
}
1140

1141
static void nvdimm_build_device_dsm(Aml *dev, uint32_t handle)
1142
{
1143
    Aml *method;
1144

1145
    method = aml_method("_DSM", 4, AML_NOTSERIALIZED);
1146
    aml_append(method, aml_return(aml_call5(NVDIMM_COMMON_DSM, aml_arg(0),
1147
                                  aml_arg(1), aml_arg(2), aml_arg(3),
1148
                                  aml_int(handle))));
1149
    aml_append(dev, method);
1150
}
1151

1152
static void nvdimm_build_fit(Aml *dev)
1153
{
1154
    Aml *method, *pkg, *buf, *buf_size, *offset, *call_result;
1155
    Aml *whilectx, *ifcond, *ifctx, *elsectx, *fit;
1156

1157
    buf = aml_local(0);
1158
    buf_size = aml_local(1);
1159
    fit = aml_local(2);
1160

1161
    aml_append(dev, aml_name_decl(NVDIMM_DSM_RFIT_STATUS, aml_int(0)));
1162

1163
    /* build helper function, RFIT. */
1164
    method = aml_method("RFIT", 1, AML_SERIALIZED);
1165
    aml_append(method, aml_name_decl("OFST", aml_int(0)));
1166

1167
    /* prepare input package. */
1168
    pkg = aml_package(1);
1169
    aml_append(method, aml_store(aml_arg(0), aml_name("OFST")));
1170
    aml_append(pkg, aml_name("OFST"));
1171

1172
    /* call Read_FIT function. */
1173
    call_result = aml_call5(NVDIMM_COMMON_DSM,
1174
                            aml_touuid(NVDIMM_QEMU_RSVD_UUID),
1175
                            aml_int(1) /* Revision 1 */,
1176
                            aml_int(0x1) /* Read FIT */,
1177
                            pkg, aml_int(NVDIMM_QEMU_RSVD_HANDLE_ROOT));
1178
    aml_append(method, aml_store(call_result, buf));
1179

1180
    /* handle _DSM result. */
1181
    aml_append(method, aml_create_dword_field(buf,
1182
               aml_int(0) /* offset at byte 0 */, "STAU"));
1183

1184
    aml_append(method, aml_store(aml_name("STAU"),
1185
                                 aml_name(NVDIMM_DSM_RFIT_STATUS)));
1186

1187
     /* if something is wrong during _DSM. */
1188
    ifcond = aml_equal(aml_int(NVDIMM_DSM_RET_STATUS_SUCCESS),
1189
                       aml_name("STAU"));
1190
    ifctx = aml_if(aml_lnot(ifcond));
1191
    aml_append(ifctx, aml_return(aml_buffer(0, NULL)));
1192
    aml_append(method, ifctx);
1193

1194
    aml_append(method, aml_store(aml_sizeof(buf), buf_size));
1195
    aml_append(method, aml_subtract(buf_size,
1196
                                    aml_int(4) /* the size of "STAU" */,
1197
                                    buf_size));
1198

1199
    /* if we read the end of fit. */
1200
    ifctx = aml_if(aml_equal(buf_size, aml_int(0)));
1201
    aml_append(ifctx, aml_return(aml_buffer(0, NULL)));
1202
    aml_append(method, ifctx);
1203

1204
    aml_append(method, aml_create_field(buf,
1205
                            aml_int(4 * BITS_PER_BYTE), /* offset at byte 4.*/
1206
                            aml_shiftleft(buf_size, aml_int(3)), "BUFF"));
1207
    aml_append(method, aml_return(aml_name("BUFF")));
1208
    aml_append(dev, method);
1209

1210
    /* build _FIT. */
1211
    method = aml_method("_FIT", 0, AML_SERIALIZED);
1212
    offset = aml_local(3);
1213

1214
    aml_append(method, aml_store(aml_buffer(0, NULL), fit));
1215
    aml_append(method, aml_store(aml_int(0), offset));
1216

1217
    whilectx = aml_while(aml_int(1));
1218
    aml_append(whilectx, aml_store(aml_call1("RFIT", offset), buf));
1219
    aml_append(whilectx, aml_store(aml_sizeof(buf), buf_size));
1220

1221
    /*
1222
     * if fit buffer was changed during RFIT, read from the beginning
1223
     * again.
1224
     */
1225
    ifctx = aml_if(aml_equal(aml_name(NVDIMM_DSM_RFIT_STATUS),
1226
                             aml_int(NVDIMM_DSM_RET_STATUS_FIT_CHANGED)));
1227
    aml_append(ifctx, aml_store(aml_buffer(0, NULL), fit));
1228
    aml_append(ifctx, aml_store(aml_int(0), offset));
1229
    aml_append(whilectx, ifctx);
1230

1231
    elsectx = aml_else();
1232

1233
    /* finish fit read if no data is read out. */
1234
    ifctx = aml_if(aml_equal(buf_size, aml_int(0)));
1235
    aml_append(ifctx, aml_return(fit));
1236
    aml_append(elsectx, ifctx);
1237

1238
    /* update the offset. */
1239
    aml_append(elsectx, aml_add(offset, buf_size, offset));
1240
    /* append the data we read out to the fit buffer. */
1241
    aml_append(elsectx, aml_concatenate(fit, buf, fit));
1242
    aml_append(whilectx, elsectx);
1243
    aml_append(method, whilectx);
1244

1245
    aml_append(dev, method);
1246
}
1247

1248
static void nvdimm_build_nvdimm_devices(Aml *root_dev, uint32_t ram_slots)
1249
{
1250
    uint32_t slot;
1251
    Aml *method, *pkg, *field, *com_call;
1252

1253
    for (slot = 0; slot < ram_slots; slot++) {
1254
        uint32_t handle = nvdimm_slot_to_handle(slot);
1255
        Aml *nvdimm_dev;
1256

1257
        nvdimm_dev = aml_device("NV%02X", slot);
1258

1259
        /*
1260
         * ACPI 6.0: 9.20 NVDIMM Devices:
1261
         *
1262
         * _ADR object that is used to supply OSPM with unique address
1263
         * of the NVDIMM device. This is done by returning the NFIT Device
1264
         * handle that is used to identify the associated entries in ACPI
1265
         * table NFIT or _FIT.
1266
         */
1267
        aml_append(nvdimm_dev, aml_name_decl("_ADR", aml_int(handle)));
1268

1269
        /*
1270
         * ACPI v6.4: Section 6.5.10 NVDIMM Label Methods
1271
         */
1272
        /* _LSI */
1273
        method = aml_method("_LSI", 0, AML_SERIALIZED);
1274
        com_call = aml_call5(NVDIMM_COMMON_DSM,
1275
                            aml_touuid(NVDIMM_DEVICE_DSM_UUID),
1276
                            aml_int(1), aml_int(4), aml_int(0),
1277
                            aml_int(handle));
1278
        aml_append(method, aml_store(com_call, aml_local(0)));
1279

1280
        aml_append(method, aml_create_dword_field(aml_local(0),
1281
                                                  aml_int(0), "STTS"));
1282
        aml_append(method, aml_create_dword_field(aml_local(0), aml_int(4),
1283
                                                  "SLSA"));
1284
        aml_append(method, aml_create_dword_field(aml_local(0), aml_int(8),
1285
                                                  "MAXT"));
1286

1287
        pkg = aml_package(3);
1288
        aml_append(pkg, aml_name("STTS"));
1289
        aml_append(pkg, aml_name("SLSA"));
1290
        aml_append(pkg, aml_name("MAXT"));
1291
        aml_append(method, aml_store(pkg, aml_local(1)));
1292
        aml_append(method, aml_return(aml_local(1)));
1293

1294
        aml_append(nvdimm_dev, method);
1295

1296
        /* _LSR */
1297
        method = aml_method("_LSR", 2, AML_SERIALIZED);
1298
        aml_append(method, aml_name_decl("INPT", aml_buffer(8, NULL)));
1299

1300
        aml_append(method, aml_create_dword_field(aml_name("INPT"),
1301
                                                  aml_int(0), "OFST"));
1302
        aml_append(method, aml_create_dword_field(aml_name("INPT"),
1303
                                                  aml_int(4), "LEN"));
1304
        aml_append(method, aml_store(aml_arg(0), aml_name("OFST")));
1305
        aml_append(method, aml_store(aml_arg(1), aml_name("LEN")));
1306

1307
        pkg = aml_package(1);
1308
        aml_append(pkg, aml_name("INPT"));
1309
        aml_append(method, aml_store(pkg, aml_local(0)));
1310

1311
        com_call = aml_call5(NVDIMM_COMMON_DSM,
1312
                            aml_touuid(NVDIMM_DEVICE_DSM_UUID),
1313
                            aml_int(1), aml_int(5), aml_local(0),
1314
                            aml_int(handle));
1315
        aml_append(method, aml_store(com_call, aml_local(3)));
1316
        field = aml_create_dword_field(aml_local(3), aml_int(0), "STTS");
1317
        aml_append(method, field);
1318
        field = aml_create_field(aml_local(3), aml_int(32),
1319
                                 aml_shiftleft(aml_name("LEN"), aml_int(3)),
1320
                                 "LDAT");
1321
        aml_append(method, field);
1322
        aml_append(method, aml_name_decl("LSA", aml_buffer(0, NULL)));
1323
        aml_append(method, aml_to_buffer(aml_name("LDAT"), aml_name("LSA")));
1324

1325
        pkg = aml_package(2);
1326
        aml_append(pkg, aml_name("STTS"));
1327
        aml_append(pkg, aml_name("LSA"));
1328

1329
        aml_append(method, aml_store(pkg, aml_local(1)));
1330
        aml_append(method, aml_return(aml_local(1)));
1331

1332
        aml_append(nvdimm_dev, method);
1333

1334
        /* _LSW */
1335
        method = aml_method("_LSW", 3, AML_SERIALIZED);
1336
        aml_append(method, aml_store(aml_arg(2), aml_local(2)));
1337
        aml_append(method, aml_name_decl("INPT", aml_buffer(8, NULL)));
1338
        field = aml_create_dword_field(aml_name("INPT"),
1339
                                                  aml_int(0), "OFST");
1340
        aml_append(method, field);
1341
        field = aml_create_dword_field(aml_name("INPT"),
1342
                                                  aml_int(4), "TLEN");
1343
        aml_append(method, field);
1344
        aml_append(method, aml_store(aml_arg(0), aml_name("OFST")));
1345
        aml_append(method, aml_store(aml_arg(1), aml_name("TLEN")));
1346

1347
        aml_append(method, aml_concatenate(aml_name("INPT"), aml_local(2),
1348
                                            aml_name("INPT")));
1349
        pkg = aml_package(1);
1350
        aml_append(pkg, aml_name("INPT"));
1351
        aml_append(method, aml_store(pkg, aml_local(0)));
1352
        com_call = aml_call5(NVDIMM_COMMON_DSM,
1353
                            aml_touuid(NVDIMM_DEVICE_DSM_UUID),
1354
                            aml_int(1), aml_int(6), aml_local(0),
1355
                            aml_int(handle));
1356
        aml_append(method, aml_store(com_call, aml_local(3)));
1357
        field = aml_create_dword_field(aml_local(3), aml_int(0), "STTS");
1358
        aml_append(method, field);
1359
        aml_append(method, aml_return(aml_name("STTS")));
1360

1361
        aml_append(nvdimm_dev, method);
1362

1363
        nvdimm_build_device_dsm(nvdimm_dev, handle);
1364
        aml_append(root_dev, nvdimm_dev);
1365
    }
1366
}
1367

1368
static void nvdimm_build_ssdt(GArray *table_offsets, GArray *table_data,
1369
                              BIOSLinker *linker,
1370
                              NVDIMMState *nvdimm_state,
1371
                              uint32_t ram_slots, const char *oem_id)
1372
{
1373
    int mem_addr_offset;
1374
    Aml *ssdt, *sb_scope, *dev;
1375
    AcpiTable table = { .sig = "SSDT", .rev = 1,
1376
                        .oem_id = oem_id, .oem_table_id = "NVDIMM" };
1377

1378
    acpi_add_table(table_offsets, table_data);
1379

1380
    acpi_table_begin(&table, table_data);
1381
    ssdt = init_aml_allocator();
1382
    sb_scope = aml_scope("\\_SB");
1383

1384
    dev = aml_device("NVDR");
1385

1386
    /*
1387
     * ACPI 6.0: 9.20 NVDIMM Devices:
1388
     *
1389
     * The ACPI Name Space device uses _HID of ACPI0012 to identify the root
1390
     * NVDIMM interface device. Platform firmware is required to contain one
1391
     * such device in _SB scope if NVDIMMs support is exposed by platform to
1392
     * OSPM.
1393
     * For each NVDIMM present or intended to be supported by platform,
1394
     * platform firmware also exposes an ACPI Namespace Device under the
1395
     * root device.
1396
     */
1397
    aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0012")));
1398

1399
    nvdimm_build_common_dsm(dev, nvdimm_state);
1400

1401
    /* 0 is reserved for root device. */
1402
    nvdimm_build_device_dsm(dev, 0);
1403
    nvdimm_build_fit(dev);
1404

1405
    nvdimm_build_nvdimm_devices(dev, ram_slots);
1406

1407
    aml_append(sb_scope, dev);
1408
    aml_append(ssdt, sb_scope);
1409

1410
    /* copy AML table into ACPI tables blob and patch header there */
1411
    g_array_append_vals(table_data, ssdt->buf->data, ssdt->buf->len);
1412
    mem_addr_offset = build_append_named_dword(table_data,
1413
                                               NVDIMM_ACPI_MEM_ADDR);
1414

1415
    bios_linker_loader_alloc(linker,
1416
                             NVDIMM_DSM_MEM_FILE, nvdimm_state->dsm_mem,
1417
                             sizeof(NvdimmDsmIn), false /* high memory */);
1418
    bios_linker_loader_add_pointer(linker,
1419
        ACPI_BUILD_TABLE_FILE, mem_addr_offset, sizeof(uint32_t),
1420
        NVDIMM_DSM_MEM_FILE, 0);
1421
    free_aml_allocator();
1422
    /*
1423
     * must be executed as the last so that pointer patching command above
1424
     * would be executed by guest before it recalculated checksum which were
1425
     * scheduled by acpi_table_end()
1426
     */
1427
    acpi_table_end(linker, &table);
1428
}
1429

1430
void nvdimm_build_srat(GArray *table_data)
1431
{
1432
    GSList *device_list, *list = nvdimm_get_device_list();
1433

1434
    for (device_list = list; device_list; device_list = device_list->next) {
1435
        DeviceState *dev = device_list->data;
1436
        Object *obj = OBJECT(dev);
1437
        uint64_t addr, size;
1438
        int node;
1439

1440
        node = object_property_get_int(obj, PC_DIMM_NODE_PROP, &error_abort);
1441
        addr = object_property_get_uint(obj, PC_DIMM_ADDR_PROP, &error_abort);
1442
        size = object_property_get_uint(obj, PC_DIMM_SIZE_PROP, &error_abort);
1443

1444
        build_srat_memory(table_data, addr, size, node,
1445
                          MEM_AFFINITY_ENABLED | MEM_AFFINITY_NON_VOLATILE);
1446
    }
1447
    g_slist_free(list);
1448
}
1449

1450
void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data,
1451
                       BIOSLinker *linker, NVDIMMState *state,
1452
                       uint32_t ram_slots, const char *oem_id,
1453
                       const char *oem_table_id)
1454
{
1455
    GSList *device_list;
1456

1457
    /* no nvdimm device can be plugged. */
1458
    if (!ram_slots) {
1459
        return;
1460
    }
1461

1462
    nvdimm_build_ssdt(table_offsets, table_data, linker, state,
1463
                      ram_slots, oem_id);
1464

1465
    device_list = nvdimm_get_device_list();
1466
    /* no NVDIMM device is plugged. */
1467
    if (!device_list) {
1468
        return;
1469
    }
1470

1471
    nvdimm_build_nfit(state, table_offsets, table_data, linker,
1472
                      oem_id, oem_table_id);
1473
    g_slist_free(device_list);
1474
}
1475