qemu

1
/*
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 * ACPI implementation
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 *
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 * Copyright (c) 2006 Fabrice Bellard
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 * Copyright (c) 2009 Isaku Yamahata <yamahata at valinux co jp>
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 *                    VA Linux Systems Japan K.K.
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 * Copyright (C) 2012 Jason Baron <jbaron@redhat.com>
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 *
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 * This is based on acpi.c.
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 *
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 * This library is free software; you can redistribute it and/or
12
 * modify it under the terms of the GNU Lesser General Public
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 * License version 2.1 as published by the Free Software Foundation.
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 *
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 * This library is distributed in the hope that it will be useful,
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 * but WITHOUT ANY WARRANTY; without even the implied warranty of
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 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
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 * Lesser General Public License for more details.
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 *
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 * You should have received a copy of the GNU Lesser General Public
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 * License along with this library; if not, see <http://www.gnu.org/licenses/>
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 *
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 * Contributions after 2012-01-13 are licensed under the terms of the
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 * GNU GPL, version 2 or (at your option) any later version.
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 */
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#include "qemu/osdep.h"
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#include "qapi/error.h"
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#include "qapi/visitor.h"
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#include "hw/pci/pci.h"
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#include "migration/vmstate.h"
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#include "qemu/timer.h"
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#include "hw/core/cpu.h"
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#include "sysemu/reset.h"
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#include "sysemu/runstate.h"
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#include "hw/acpi/acpi.h"
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#include "hw/acpi/ich9_tco.h"
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#include "hw/southbridge/ich9.h"
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#include "hw/mem/pc-dimm.h"
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#include "hw/mem/nvdimm.h"
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//#define DEBUG
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45
#ifdef DEBUG
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#define ICH9_DEBUG(fmt, ...) \
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do { printf("%s "fmt, __func__, ## __VA_ARGS__); } while (0)
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#else
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#define ICH9_DEBUG(fmt, ...)    do { } while (0)
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#endif
51

52
static void ich9_pm_update_sci_fn(ACPIREGS *regs)
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{
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    ICH9LPCPMRegs *pm = container_of(regs, ICH9LPCPMRegs, acpi_regs);
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    acpi_update_sci(&pm->acpi_regs, pm->irq);
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}
57

58
static uint64_t ich9_gpe_readb(void *opaque, hwaddr addr, unsigned width)
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{
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    ICH9LPCPMRegs *pm = opaque;
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    return acpi_gpe_ioport_readb(&pm->acpi_regs, addr);
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}
63

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static void ich9_gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
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                            unsigned width)
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{
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    ICH9LPCPMRegs *pm = opaque;
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    acpi_gpe_ioport_writeb(&pm->acpi_regs, addr, val);
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    acpi_update_sci(&pm->acpi_regs, pm->irq);
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}
71

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static const MemoryRegionOps ich9_gpe_ops = {
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    .read = ich9_gpe_readb,
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    .write = ich9_gpe_writeb,
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    .valid.min_access_size = 1,
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    .valid.max_access_size = 4,
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    .impl.min_access_size = 1,
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    .impl.max_access_size = 1,
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    .endianness = DEVICE_LITTLE_ENDIAN,
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};
81

82
static uint64_t ich9_smi_readl(void *opaque, hwaddr addr, unsigned width)
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{
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    ICH9LPCPMRegs *pm = opaque;
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    switch (addr) {
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    case 0:
87
        return pm->smi_en;
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    case 4:
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        return pm->smi_sts;
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    default:
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        return 0;
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    }
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}
94

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static void ich9_smi_writel(void *opaque, hwaddr addr, uint64_t val,
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                            unsigned width)
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{
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    ICH9LPCPMRegs *pm = opaque;
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    TCOIORegs *tr = &pm->tco_regs;
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    uint64_t tco_en;
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    switch (addr) {
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    case 0:
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        tco_en = pm->smi_en & ICH9_PMIO_SMI_EN_TCO_EN;
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        /* once TCO_LOCK bit is set, TCO_EN bit cannot be overwritten */
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        if (tr->tco.cnt1 & TCO_LOCK) {
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            val = (val & ~ICH9_PMIO_SMI_EN_TCO_EN) | tco_en;
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        }
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        pm->smi_en &= ~pm->smi_en_wmask;
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        pm->smi_en |= (val & pm->smi_en_wmask);
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        break;
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    }
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}
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static const MemoryRegionOps ich9_smi_ops = {
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    .read = ich9_smi_readl,
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    .write = ich9_smi_writel,
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    .valid.min_access_size = 4,
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    .valid.max_access_size = 4,
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    .endianness = DEVICE_LITTLE_ENDIAN,
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};
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void ich9_pm_iospace_update(ICH9LPCPMRegs *pm, uint32_t pm_io_base)
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{
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    ICH9_DEBUG("to 0x%x\n", pm_io_base);
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    assert((pm_io_base & ICH9_PMIO_MASK) == 0);
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    pm->pm_io_base = pm_io_base;
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    memory_region_transaction_begin();
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    memory_region_set_enabled(&pm->io, pm->pm_io_base != 0);
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    memory_region_set_address(&pm->io, pm->pm_io_base);
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    memory_region_transaction_commit();
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}
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static int ich9_pm_post_load(void *opaque, int version_id)
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{
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    ICH9LPCPMRegs *pm = opaque;
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    uint32_t pm_io_base = pm->pm_io_base;
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    pm->pm_io_base = 0;
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    ich9_pm_iospace_update(pm, pm_io_base);
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    return 0;
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}
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#define VMSTATE_GPE_ARRAY(_field, _state)                            \
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 {                                                                   \
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     .name       = (stringify(_field)),                              \
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     .version_id = 0,                                                \
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     .num        = ICH9_PMIO_GPE0_LEN,                               \
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     .info       = &vmstate_info_uint8,                              \
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     .size       = sizeof(uint8_t),                                  \
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     .flags      = VMS_ARRAY | VMS_POINTER,                          \
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     .offset     = vmstate_offset_pointer(_state, _field, uint8_t),  \
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 }
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static const VMStateDescription vmstate_memhp_state = {
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    .name = "ich9_pm/memhp",
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    .version_id = 1,
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    .minimum_version_id = 1,
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    .fields = (const VMStateField[]) {
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        VMSTATE_MEMORY_HOTPLUG(acpi_memory_hotplug, ICH9LPCPMRegs),
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        VMSTATE_END_OF_LIST()
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    }
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};
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static bool vmstate_test_use_tco(void *opaque)
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{
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    ICH9LPCPMRegs *s = opaque;
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    return s->enable_tco;
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}
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static const VMStateDescription vmstate_tco_io_state = {
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    .name = "ich9_pm/tco",
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    .version_id = 1,
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    .minimum_version_id = 1,
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    .needed = vmstate_test_use_tco,
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    .fields = (const VMStateField[]) {
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        VMSTATE_STRUCT(tco_regs, ICH9LPCPMRegs, 1, vmstate_tco_io_sts,
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                       TCOIORegs),
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        VMSTATE_END_OF_LIST()
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    }
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};
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184
static bool vmstate_test_use_cpuhp(void *opaque)
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{
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    ICH9LPCPMRegs *s = opaque;
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    return !s->cpu_hotplug_legacy;
188
}
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static int vmstate_cpuhp_pre_load(void *opaque)
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{
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    ICH9LPCPMRegs *s = opaque;
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    Object *obj = OBJECT(s->gpe_cpu.device);
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    object_property_set_bool(obj, "cpu-hotplug-legacy", false, &error_abort);
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    return 0;
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}
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static const VMStateDescription vmstate_cpuhp_state = {
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    .name = "ich9_pm/cpuhp",
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    .version_id = 1,
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    .minimum_version_id = 1,
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    .needed = vmstate_test_use_cpuhp,
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    .pre_load = vmstate_cpuhp_pre_load,
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    .fields = (const VMStateField[]) {
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        VMSTATE_CPU_HOTPLUG(cpuhp_state, ICH9LPCPMRegs),
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        VMSTATE_END_OF_LIST()
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    }
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};
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static bool vmstate_test_use_pcihp(void *opaque)
211
{
212
    ICH9LPCPMRegs *s = opaque;
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    return s->acpi_pci_hotplug.use_acpi_hotplug_bridge;
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}
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static const VMStateDescription vmstate_pcihp_state = {
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    .name = "ich9_pm/pcihp",
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    .version_id = 1,
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    .minimum_version_id = 1,
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    .needed = vmstate_test_use_pcihp,
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    .fields = (const VMStateField[]) {
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        VMSTATE_PCI_HOTPLUG(acpi_pci_hotplug,
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                            ICH9LPCPMRegs,
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                            NULL, NULL),
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        VMSTATE_END_OF_LIST()
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    }
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};
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const VMStateDescription vmstate_ich9_pm = {
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    .name = "ich9_pm",
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    .version_id = 1,
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    .minimum_version_id = 1,
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    .post_load = ich9_pm_post_load,
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    .fields = (const VMStateField[]) {
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        VMSTATE_UINT16(acpi_regs.pm1.evt.sts, ICH9LPCPMRegs),
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        VMSTATE_UINT16(acpi_regs.pm1.evt.en, ICH9LPCPMRegs),
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        VMSTATE_UINT16(acpi_regs.pm1.cnt.cnt, ICH9LPCPMRegs),
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        VMSTATE_TIMER_PTR(acpi_regs.tmr.timer, ICH9LPCPMRegs),
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        VMSTATE_INT64(acpi_regs.tmr.overflow_time, ICH9LPCPMRegs),
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        VMSTATE_GPE_ARRAY(acpi_regs.gpe.sts, ICH9LPCPMRegs),
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        VMSTATE_GPE_ARRAY(acpi_regs.gpe.en, ICH9LPCPMRegs),
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        VMSTATE_UINT32(smi_en, ICH9LPCPMRegs),
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        VMSTATE_UINT32(smi_sts, ICH9LPCPMRegs),
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        VMSTATE_END_OF_LIST()
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    },
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    .subsections = (const VMStateDescription * const []) {
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        &vmstate_memhp_state,
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        &vmstate_tco_io_state,
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        &vmstate_cpuhp_state,
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        &vmstate_pcihp_state,
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        NULL
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    }
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};
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static void pm_reset(void *opaque)
257
{
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    ICH9LPCPMRegs *pm = opaque;
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    ich9_pm_iospace_update(pm, 0);
260

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    acpi_pm1_evt_reset(&pm->acpi_regs);
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    acpi_pm1_cnt_reset(&pm->acpi_regs);
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    acpi_pm_tmr_reset(&pm->acpi_regs);
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    acpi_gpe_reset(&pm->acpi_regs);
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    pm->smi_en = 0;
267
    if (!pm->smm_enabled) {
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        /* Mark SMM as already inited to prevent SMM from running. */
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        pm->smi_en |= ICH9_PMIO_SMI_EN_APMC_EN;
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    }
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    pm->smi_en_wmask = ~0;
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273
    if (pm->acpi_pci_hotplug.use_acpi_hotplug_bridge) {
274
        acpi_pcihp_reset(&pm->acpi_pci_hotplug);
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    }
276

277
    acpi_update_sci(&pm->acpi_regs, pm->irq);
278
}
279

280
static void pm_powerdown_req(Notifier *n, void *opaque)
281
{
282
    ICH9LPCPMRegs *pm = container_of(n, ICH9LPCPMRegs, powerdown_notifier);
283

284
    acpi_pm1_evt_power_down(&pm->acpi_regs);
285
}
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287
void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, qemu_irq sci_irq)
288
{
289
    memory_region_init(&pm->io, OBJECT(lpc_pci), "ich9-pm", ICH9_PMIO_SIZE);
290
    memory_region_set_enabled(&pm->io, false);
291
    memory_region_add_subregion(pci_address_space_io(lpc_pci),
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                                0, &pm->io);
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    acpi_pm_tmr_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
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    acpi_pm1_evt_init(&pm->acpi_regs, ich9_pm_update_sci_fn, &pm->io);
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    acpi_pm1_cnt_init(&pm->acpi_regs, &pm->io, pm->disable_s3, pm->disable_s4,
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                      pm->s4_val, !pm->smm_compat && !pm->smm_enabled);
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299
    acpi_gpe_init(&pm->acpi_regs, ICH9_PMIO_GPE0_LEN);
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    memory_region_init_io(&pm->io_gpe, OBJECT(lpc_pci), &ich9_gpe_ops, pm,
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                          "acpi-gpe0", ICH9_PMIO_GPE0_LEN);
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    memory_region_add_subregion(&pm->io, ICH9_PMIO_GPE0_STS, &pm->io_gpe);
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    memory_region_init_io(&pm->io_smi, OBJECT(lpc_pci), &ich9_smi_ops, pm,
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                          "acpi-smi", 8);
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    memory_region_add_subregion(&pm->io, ICH9_PMIO_SMI_EN, &pm->io_smi);
307

308
    if (pm->enable_tco) {
309
        acpi_pm_tco_init(&pm->tco_regs, &pm->io);
310
    }
311

312
    if (pm->acpi_pci_hotplug.use_acpi_hotplug_bridge) {
313
        acpi_pcihp_init(OBJECT(lpc_pci),
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                        &pm->acpi_pci_hotplug,
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                        pci_get_bus(lpc_pci),
316
                        pci_address_space_io(lpc_pci),
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                        ACPI_PCIHP_ADDR_ICH9);
318

319
        qbus_set_hotplug_handler(BUS(pci_get_bus(lpc_pci)),
320
                                 OBJECT(lpc_pci));
321
    }
322

323
    pm->irq = sci_irq;
324
    qemu_register_reset(pm_reset, pm);
325
    pm->powerdown_notifier.notify = pm_powerdown_req;
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    qemu_register_powerdown_notifier(&pm->powerdown_notifier);
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    legacy_acpi_cpu_hotplug_init(pci_address_space_io(lpc_pci),
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        OBJECT(lpc_pci), &pm->gpe_cpu, ICH9_CPU_HOTPLUG_IO_BASE);
330

331
    acpi_memory_hotplug_init(pci_address_space_io(lpc_pci), OBJECT(lpc_pci),
332
                             &pm->acpi_memory_hotplug,
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                             ACPI_MEMORY_HOTPLUG_BASE);
334
}
335

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static void ich9_pm_get_gpe0_blk(Object *obj, Visitor *v, const char *name,
337
                                 void *opaque, Error **errp)
338
{
339
    ICH9LPCPMRegs *pm = opaque;
340
    uint32_t value = pm->pm_io_base + ICH9_PMIO_GPE0_STS;
341

342
    visit_type_uint32(v, name, &value, errp);
343
}
344

345
static bool ich9_pm_get_cpu_hotplug_legacy(Object *obj, Error **errp)
346
{
347
    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
348

349
    return s->pm.cpu_hotplug_legacy;
350
}
351

352
static void ich9_pm_set_cpu_hotplug_legacy(Object *obj, bool value,
353
                                           Error **errp)
354
{
355
    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
356

357
    assert(!value);
358
    if (s->pm.cpu_hotplug_legacy && value == false) {
359
        acpi_switch_to_modern_cphp(&s->pm.gpe_cpu, &s->pm.cpuhp_state,
360
                                   ICH9_CPU_HOTPLUG_IO_BASE);
361
    }
362
    s->pm.cpu_hotplug_legacy = value;
363
}
364

365
static bool ich9_pm_get_enable_tco(Object *obj, Error **errp)
366
{
367
    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
368
    return s->pm.enable_tco;
369
}
370

371
static void ich9_pm_set_enable_tco(Object *obj, bool value, Error **errp)
372
{
373
    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
374
    s->pm.enable_tco = value;
375
}
376

377
static bool ich9_pm_get_acpi_pci_hotplug(Object *obj, Error **errp)
378
{
379
    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
380

381
    return s->pm.acpi_pci_hotplug.use_acpi_hotplug_bridge;
382
}
383

384
static void ich9_pm_set_acpi_pci_hotplug(Object *obj, bool value, Error **errp)
385
{
386
    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
387

388
    s->pm.acpi_pci_hotplug.use_acpi_hotplug_bridge = value;
389
}
390

391
static bool ich9_pm_get_keep_pci_slot_hpc(Object *obj, Error **errp)
392
{
393
    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
394

395
    return s->pm.keep_pci_slot_hpc;
396
}
397

398
static void ich9_pm_set_keep_pci_slot_hpc(Object *obj, bool value, Error **errp)
399
{
400
    ICH9LPCState *s = ICH9_LPC_DEVICE(obj);
401

402
    s->pm.keep_pci_slot_hpc = value;
403
}
404

405
void ich9_pm_add_properties(Object *obj, ICH9LPCPMRegs *pm)
406
{
407
    static const uint32_t gpe0_len = ICH9_PMIO_GPE0_LEN;
408
    pm->acpi_memory_hotplug.is_enabled = true;
409
    pm->cpu_hotplug_legacy = true;
410
    pm->disable_s3 = 0;
411
    pm->disable_s4 = 0;
412
    pm->s4_val = 2;
413
    pm->acpi_pci_hotplug.use_acpi_hotplug_bridge = true;
414
    pm->keep_pci_slot_hpc = true;
415
    pm->enable_tco = true;
416

417
    object_property_add_uint32_ptr(obj, ACPI_PM_PROP_PM_IO_BASE,
418
                                   &pm->pm_io_base, OBJ_PROP_FLAG_READ);
419
    object_property_add(obj, ACPI_PM_PROP_GPE0_BLK, "uint32",
420
                        ich9_pm_get_gpe0_blk,
421
                        NULL, NULL, pm);
422
    object_property_add_uint32_ptr(obj, ACPI_PM_PROP_GPE0_BLK_LEN,
423
                                   &gpe0_len, OBJ_PROP_FLAG_READ);
424
    object_property_add_bool(obj, "cpu-hotplug-legacy",
425
                             ich9_pm_get_cpu_hotplug_legacy,
426
                             ich9_pm_set_cpu_hotplug_legacy);
427
    object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S3_DISABLED,
428
                                  &pm->disable_s3, OBJ_PROP_FLAG_READWRITE);
429
    object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_DISABLED,
430
                                  &pm->disable_s4, OBJ_PROP_FLAG_READWRITE);
431
    object_property_add_uint8_ptr(obj, ACPI_PM_PROP_S4_VAL,
432
                                  &pm->s4_val, OBJ_PROP_FLAG_READWRITE);
433
    object_property_add_bool(obj, ACPI_PM_PROP_TCO_ENABLED,
434
                             ich9_pm_get_enable_tco,
435
                             ich9_pm_set_enable_tco);
436
    object_property_add_bool(obj, ACPI_PM_PROP_ACPI_PCIHP_BRIDGE,
437
                             ich9_pm_get_acpi_pci_hotplug,
438
                             ich9_pm_set_acpi_pci_hotplug);
439
    object_property_add_bool(obj, "x-keep-pci-slot-hpc",
440
                             ich9_pm_get_keep_pci_slot_hpc,
441
                             ich9_pm_set_keep_pci_slot_hpc);
442
}
443

444
void ich9_pm_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
445
                                Error **errp)
446
{
447
    ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
448

449
    if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
450
        acpi_pcihp_device_pre_plug_cb(hotplug_dev, dev, errp);
451
        return;
452
    }
453

454
    if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
455
        uint64_t negotiated = lpc->smi_negotiated_features;
456

457
        if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
458
            !(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOTPLUG_BIT))) {
459
            error_setg(errp, "cpu hotplug with SMI wasn't enabled by firmware");
460
            error_append_hint(errp, "update machine type to newer than 5.1 "
461
                "and firmware that suppors CPU hotplug with SMM");
462
        }
463
    }
464
}
465

466
void ich9_pm_device_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
467
                            Error **errp)
468
{
469
    ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
470

471
    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
472
        if (object_dynamic_cast(OBJECT(dev), TYPE_NVDIMM)) {
473
            nvdimm_acpi_plug_cb(hotplug_dev, dev);
474
        } else {
475
            acpi_memory_plug_cb(hotplug_dev, &lpc->pm.acpi_memory_hotplug,
476
                                dev, errp);
477
        }
478
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU)) {
479
        if (lpc->pm.cpu_hotplug_legacy) {
480
            legacy_acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.gpe_cpu, dev, errp);
481
        } else {
482
            acpi_cpu_plug_cb(hotplug_dev, &lpc->pm.cpuhp_state, dev, errp);
483
        }
484
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
485
        acpi_pcihp_device_plug_cb(hotplug_dev, &lpc->pm.acpi_pci_hotplug,
486
                                  dev, errp);
487
    } else {
488
        error_setg(errp, "acpi: device plug request for not supported device"
489
                   " type: %s", object_get_typename(OBJECT(dev)));
490
    }
491
}
492

493
void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev,
494
                                      DeviceState *dev, Error **errp)
495
{
496
    ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
497

498
    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
499
        acpi_memory_unplug_request_cb(hotplug_dev,
500
                                      &lpc->pm.acpi_memory_hotplug, dev,
501
                                      errp);
502
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
503
               !lpc->pm.cpu_hotplug_legacy) {
504
        uint64_t negotiated = lpc->smi_negotiated_features;
505

506
        if (negotiated & BIT_ULL(ICH9_LPC_SMI_F_BROADCAST_BIT) &&
507
            !(negotiated & BIT_ULL(ICH9_LPC_SMI_F_CPU_HOT_UNPLUG_BIT))) {
508
            error_setg(errp, "cpu hot-unplug with SMI wasn't enabled "
509
                             "by firmware");
510
            error_append_hint(errp, "update machine type to a version having "
511
                                    "x-smi-cpu-hotunplug=on and firmware that "
512
                                    "supports CPU hot-unplug with SMM");
513
            return;
514
        }
515

516
        acpi_cpu_unplug_request_cb(hotplug_dev, &lpc->pm.cpuhp_state,
517
                                   dev, errp);
518
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
519
        acpi_pcihp_device_unplug_request_cb(hotplug_dev,
520
                                            &lpc->pm.acpi_pci_hotplug,
521
                                            dev, errp);
522
    } else {
523
        error_setg(errp, "acpi: device unplug request for not supported device"
524
                   " type: %s", object_get_typename(OBJECT(dev)));
525
    }
526
}
527

528
void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev,
529
                              Error **errp)
530
{
531
    ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
532

533
    if (object_dynamic_cast(OBJECT(dev), TYPE_PC_DIMM)) {
534
        acpi_memory_unplug_cb(&lpc->pm.acpi_memory_hotplug, dev, errp);
535
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_CPU) &&
536
               !lpc->pm.cpu_hotplug_legacy) {
537
        acpi_cpu_unplug_cb(&lpc->pm.cpuhp_state, dev, errp);
538
    } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) {
539
        acpi_pcihp_device_unplug_cb(hotplug_dev, &lpc->pm.acpi_pci_hotplug,
540
                                    dev, errp);
541
    } else {
542
        error_setg(errp, "acpi: device unplug for not supported device"
543
                   " type: %s", object_get_typename(OBJECT(dev)));
544
    }
545
}
546

547
bool ich9_pm_is_hotpluggable_bus(HotplugHandler *hotplug_dev, BusState *bus)
548
{
549
    ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev);
550
    return acpi_pcihp_is_hotpluggbale_bus(&lpc->pm.acpi_pci_hotplug, bus);
551
}
552

553
void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list)
554
{
555
    ICH9LPCState *s = ICH9_LPC_DEVICE(adev);
556

557
    acpi_memory_ospm_status(&s->pm.acpi_memory_hotplug, list);
558
    if (!s->pm.cpu_hotplug_legacy) {
559
        acpi_cpu_ospm_status(&s->pm.cpuhp_state, list);
560
    }
561
}
562