qemu
/
cpu-target.c
474 строки · 12.8 Кб
1/*
2* Target-specific parts of the CPU object
3*
4* Copyright (c) 2003 Fabrice Bellard
5*
6* This library is free software; you can redistribute it and/or
7* modify it under the terms of the GNU Lesser General Public
8* License as published by the Free Software Foundation; either
9* version 2 of the License, or (at your option) any later version.
10*
11* This library is distributed in the hope that it will be useful,
12* but WITHOUT ANY WARRANTY; without even the implied warranty of
13* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
14* Lesser General Public License for more details.
15*
16* You should have received a copy of the GNU Lesser General Public
17* License along with this library; if not, see <http://www.gnu.org/licenses/>.
18*/
19
20#include "qemu/osdep.h"
21#include "qapi/error.h"
22
23#include "exec/target_page.h"
24#include "exec/page-protection.h"
25#include "hw/qdev-core.h"
26#include "hw/qdev-properties.h"
27#include "qemu/error-report.h"
28#include "qemu/qemu-print.h"
29#include "migration/vmstate.h"
30#ifdef CONFIG_USER_ONLY
31#include "qemu.h"
32#else
33#include "hw/core/sysemu-cpu-ops.h"
34#include "exec/address-spaces.h"
35#include "exec/memory.h"
36#endif
37#include "sysemu/cpus.h"
38#include "sysemu/tcg.h"
39#include "exec/tswap.h"
40#include "exec/replay-core.h"
41#include "exec/cpu-common.h"
42#include "exec/exec-all.h"
43#include "exec/tb-flush.h"
44#include "exec/translate-all.h"
45#include "exec/log.h"
46#include "hw/core/accel-cpu.h"
47#include "trace/trace-root.h"
48#include "qemu/accel.h"
49
50#ifndef CONFIG_USER_ONLY
51static int cpu_common_post_load(void *opaque, int version_id)
52{
53CPUState *cpu = opaque;
54
55/* 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
56version_id is increased. */
57cpu->interrupt_request &= ~0x01;
58tlb_flush(cpu);
59
60/* loadvm has just updated the content of RAM, bypassing the
61* usual mechanisms that ensure we flush TBs for writes to
62* memory we've translated code from. So we must flush all TBs,
63* which will now be stale.
64*/
65tb_flush(cpu);
66
67return 0;
68}
69
70static int cpu_common_pre_load(void *opaque)
71{
72CPUState *cpu = opaque;
73
74cpu->exception_index = -1;
75
76return 0;
77}
78
79static bool cpu_common_exception_index_needed(void *opaque)
80{
81CPUState *cpu = opaque;
82
83return tcg_enabled() && cpu->exception_index != -1;
84}
85
86static const VMStateDescription vmstate_cpu_common_exception_index = {
87.name = "cpu_common/exception_index",
88.version_id = 1,
89.minimum_version_id = 1,
90.needed = cpu_common_exception_index_needed,
91.fields = (const VMStateField[]) {
92VMSTATE_INT32(exception_index, CPUState),
93VMSTATE_END_OF_LIST()
94}
95};
96
97static bool cpu_common_crash_occurred_needed(void *opaque)
98{
99CPUState *cpu = opaque;
100
101return cpu->crash_occurred;
102}
103
104static const VMStateDescription vmstate_cpu_common_crash_occurred = {
105.name = "cpu_common/crash_occurred",
106.version_id = 1,
107.minimum_version_id = 1,
108.needed = cpu_common_crash_occurred_needed,
109.fields = (const VMStateField[]) {
110VMSTATE_BOOL(crash_occurred, CPUState),
111VMSTATE_END_OF_LIST()
112}
113};
114
115const VMStateDescription vmstate_cpu_common = {
116.name = "cpu_common",
117.version_id = 1,
118.minimum_version_id = 1,
119.pre_load = cpu_common_pre_load,
120.post_load = cpu_common_post_load,
121.fields = (const VMStateField[]) {
122VMSTATE_UINT32(halted, CPUState),
123VMSTATE_UINT32(interrupt_request, CPUState),
124VMSTATE_END_OF_LIST()
125},
126.subsections = (const VMStateDescription * const []) {
127&vmstate_cpu_common_exception_index,
128&vmstate_cpu_common_crash_occurred,
129NULL
130}
131};
132#endif
133
134bool cpu_exec_realizefn(CPUState *cpu, Error **errp)
135{
136/* cache the cpu class for the hotpath */
137cpu->cc = CPU_GET_CLASS(cpu);
138
139if (!accel_cpu_common_realize(cpu, errp)) {
140return false;
141}
142
143/* Wait until cpu initialization complete before exposing cpu. */
144cpu_list_add(cpu);
145
146#ifdef CONFIG_USER_ONLY
147assert(qdev_get_vmsd(DEVICE(cpu)) == NULL ||
148qdev_get_vmsd(DEVICE(cpu))->unmigratable);
149#else
150if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
151vmstate_register(NULL, cpu->cpu_index, &vmstate_cpu_common, cpu);
152}
153if (cpu->cc->sysemu_ops->legacy_vmsd != NULL) {
154vmstate_register(NULL, cpu->cpu_index, cpu->cc->sysemu_ops->legacy_vmsd, cpu);
155}
156#endif /* CONFIG_USER_ONLY */
157
158return true;
159}
160
161void cpu_exec_unrealizefn(CPUState *cpu)
162{
163#ifndef CONFIG_USER_ONLY
164CPUClass *cc = CPU_GET_CLASS(cpu);
165
166if (cc->sysemu_ops->legacy_vmsd != NULL) {
167vmstate_unregister(NULL, cc->sysemu_ops->legacy_vmsd, cpu);
168}
169if (qdev_get_vmsd(DEVICE(cpu)) == NULL) {
170vmstate_unregister(NULL, &vmstate_cpu_common, cpu);
171}
172#endif
173
174cpu_list_remove(cpu);
175/*
176* Now that the vCPU has been removed from the RCU list, we can call
177* accel_cpu_common_unrealize, which may free fields using call_rcu.
178*/
179accel_cpu_common_unrealize(cpu);
180}
181
182/*
183* This can't go in hw/core/cpu.c because that file is compiled only
184* once for both user-mode and system builds.
185*/
186static Property cpu_common_props[] = {
187#ifdef CONFIG_USER_ONLY
188/*
189* Create a property for the user-only object, so users can
190* adjust prctl(PR_SET_UNALIGN) from the command-line.
191* Has no effect if the target does not support the feature.
192*/
193DEFINE_PROP_BOOL("prctl-unalign-sigbus", CPUState,
194prctl_unalign_sigbus, false),
195#else
196/*
197* Create a memory property for system CPU object, so users can
198* wire up its memory. The default if no link is set up is to use
199* the system address space.
200*/
201DEFINE_PROP_LINK("memory", CPUState, memory, TYPE_MEMORY_REGION,
202MemoryRegion *),
203#endif
204DEFINE_PROP_END_OF_LIST(),
205};
206
207#ifndef CONFIG_USER_ONLY
208static bool cpu_get_start_powered_off(Object *obj, Error **errp)
209{
210CPUState *cpu = CPU(obj);
211return cpu->start_powered_off;
212}
213
214static void cpu_set_start_powered_off(Object *obj, bool value, Error **errp)
215{
216CPUState *cpu = CPU(obj);
217cpu->start_powered_off = value;
218}
219#endif
220
221void cpu_class_init_props(DeviceClass *dc)
222{
223#ifndef CONFIG_USER_ONLY
224ObjectClass *oc = OBJECT_CLASS(dc);
225
226/*
227* We can't use DEFINE_PROP_BOOL in the Property array for this
228* property, because we want this to be settable after realize.
229*/
230object_class_property_add_bool(oc, "start-powered-off",
231cpu_get_start_powered_off,
232cpu_set_start_powered_off);
233#endif
234
235device_class_set_props(dc, cpu_common_props);
236}
237
238void cpu_exec_initfn(CPUState *cpu)
239{
240cpu->as = NULL;
241cpu->num_ases = 0;
242
243#ifndef CONFIG_USER_ONLY
244cpu->memory = get_system_memory();
245object_ref(OBJECT(cpu->memory));
246#endif
247}
248
249char *cpu_model_from_type(const char *typename)
250{
251const char *suffix = "-" CPU_RESOLVING_TYPE;
252
253if (!object_class_by_name(typename)) {
254return NULL;
255}
256
257if (g_str_has_suffix(typename, suffix)) {
258return g_strndup(typename, strlen(typename) - strlen(suffix));
259}
260
261return g_strdup(typename);
262}
263
264const char *parse_cpu_option(const char *cpu_option)
265{
266ObjectClass *oc;
267CPUClass *cc;
268gchar **model_pieces;
269const char *cpu_type;
270
271model_pieces = g_strsplit(cpu_option, ",", 2);
272if (!model_pieces[0]) {
273error_report("-cpu option cannot be empty");
274exit(1);
275}
276
277oc = cpu_class_by_name(CPU_RESOLVING_TYPE, model_pieces[0]);
278if (oc == NULL) {
279error_report("unable to find CPU model '%s'", model_pieces[0]);
280g_strfreev(model_pieces);
281exit(EXIT_FAILURE);
282}
283
284cpu_type = object_class_get_name(oc);
285cc = CPU_CLASS(oc);
286cc->parse_features(cpu_type, model_pieces[1], &error_fatal);
287g_strfreev(model_pieces);
288return cpu_type;
289}
290
291#ifndef cpu_list
292static void cpu_list_entry(gpointer data, gpointer user_data)
293{
294CPUClass *cc = CPU_CLASS(OBJECT_CLASS(data));
295const char *typename = object_class_get_name(OBJECT_CLASS(data));
296g_autofree char *model = cpu_model_from_type(typename);
297
298if (cc->deprecation_note) {
299qemu_printf(" %s (deprecated)\n", model);
300} else {
301qemu_printf(" %s\n", model);
302}
303}
304
305static void cpu_list(void)
306{
307GSList *list;
308
309list = object_class_get_list_sorted(TYPE_CPU, false);
310qemu_printf("Available CPUs:\n");
311g_slist_foreach(list, cpu_list_entry, NULL);
312g_slist_free(list);
313}
314#endif
315
316void list_cpus(void)
317{
318cpu_list();
319}
320
321/* enable or disable single step mode. EXCP_DEBUG is returned by the
322CPU loop after each instruction */
323void cpu_single_step(CPUState *cpu, int enabled)
324{
325if (cpu->singlestep_enabled != enabled) {
326cpu->singlestep_enabled = enabled;
327
328#if !defined(CONFIG_USER_ONLY)
329const AccelOpsClass *ops = cpus_get_accel();
330if (ops->update_guest_debug) {
331ops->update_guest_debug(cpu);
332}
333#endif
334
335trace_breakpoint_singlestep(cpu->cpu_index, enabled);
336}
337}
338
339void cpu_abort(CPUState *cpu, const char *fmt, ...)
340{
341va_list ap;
342va_list ap2;
343
344va_start(ap, fmt);
345va_copy(ap2, ap);
346fprintf(stderr, "qemu: fatal: ");
347vfprintf(stderr, fmt, ap);
348fprintf(stderr, "\n");
349cpu_dump_state(cpu, stderr, CPU_DUMP_FPU | CPU_DUMP_CCOP);
350if (qemu_log_separate()) {
351FILE *logfile = qemu_log_trylock();
352if (logfile) {
353fprintf(logfile, "qemu: fatal: ");
354vfprintf(logfile, fmt, ap2);
355fprintf(logfile, "\n");
356cpu_dump_state(cpu, logfile, CPU_DUMP_FPU | CPU_DUMP_CCOP);
357qemu_log_unlock(logfile);
358}
359}
360va_end(ap2);
361va_end(ap);
362replay_finish();
363#if defined(CONFIG_USER_ONLY)
364{
365struct sigaction act;
366sigfillset(&act.sa_mask);
367act.sa_handler = SIG_DFL;
368act.sa_flags = 0;
369sigaction(SIGABRT, &act, NULL);
370}
371#endif
372abort();
373}
374
375/* physical memory access (slow version, mainly for debug) */
376#if defined(CONFIG_USER_ONLY)
377int cpu_memory_rw_debug(CPUState *cpu, vaddr addr,
378void *ptr, size_t len, bool is_write)
379{
380int flags;
381vaddr l, page;
382void * p;
383uint8_t *buf = ptr;
384ssize_t written;
385int ret = -1;
386int fd = -1;
387
388while (len > 0) {
389page = addr & TARGET_PAGE_MASK;
390l = (page + TARGET_PAGE_SIZE) - addr;
391if (l > len)
392l = len;
393flags = page_get_flags(page);
394if (!(flags & PAGE_VALID)) {
395goto out_close;
396}
397if (is_write) {
398if (flags & PAGE_WRITE) {
399/* XXX: this code should not depend on lock_user */
400p = lock_user(VERIFY_WRITE, addr, l, 0);
401if (!p) {
402goto out_close;
403}
404memcpy(p, buf, l);
405unlock_user(p, addr, l);
406} else {
407/* Bypass the host page protection using ptrace. */
408if (fd == -1) {
409fd = open("/proc/self/mem", O_WRONLY);
410if (fd == -1) {
411goto out;
412}
413}
414/*
415* If there is a TranslationBlock and we weren't bypassing the
416* host page protection, the memcpy() above would SEGV,
417* ultimately leading to page_unprotect(). So invalidate the
418* translations manually. Both invalidation and pwrite() must
419* be under mmap_lock() in order to prevent the creation of
420* another TranslationBlock in between.
421*/
422mmap_lock();
423tb_invalidate_phys_range(addr, addr + l - 1);
424written = pwrite(fd, buf, l,
425(off_t)(uintptr_t)g2h_untagged(addr));
426mmap_unlock();
427if (written != l) {
428goto out_close;
429}
430}
431} else if (flags & PAGE_READ) {
432/* XXX: this code should not depend on lock_user */
433p = lock_user(VERIFY_READ, addr, l, 1);
434if (!p) {
435goto out_close;
436}
437memcpy(buf, p, l);
438unlock_user(p, addr, 0);
439} else {
440/* Bypass the host page protection using ptrace. */
441if (fd == -1) {
442fd = open("/proc/self/mem", O_RDONLY);
443if (fd == -1) {
444goto out;
445}
446}
447if (pread(fd, buf, l,
448(off_t)(uintptr_t)g2h_untagged(addr)) != l) {
449goto out_close;
450}
451}
452len -= l;
453buf += l;
454addr += l;
455}
456ret = 0;
457out_close:
458if (fd != -1) {
459close(fd);
460}
461out:
462return ret;
463}
464#endif
465
466bool target_words_bigendian(void)
467{
468return TARGET_BIG_ENDIAN;
469}
470
471const char *target_name(void)
472{
473return TARGET_NAME;
474}
475