capstone

Форк
0
/
armv8.5a-mte.s.cs 
145 строк · 5.9 Кб
1
# CS_ARCH_AARCH64, 0, None
2

3
0x20,0x10,0xdf,0x9a == irg x0, x1
4
0x3f,0x10,0xdf,0x9a == irg sp, x1
5
0xe0,0x13,0xdf,0x9a == irg x0, sp
6
0x20,0x10,0xc2,0x9a == irg x0, x1, x2
7
0x3f,0x10,0xc2,0x9a == irg sp, x1, x2
8
0x20,0x04,0x80,0x91 == addg x0, x1, #0, #1
9
0x5f,0x0c,0x82,0x91 == addg sp, x2, #32, #3
10
0xe0,0x17,0x84,0x91 == addg x0, sp, #64, #5
11
0x83,0x18,0xbf,0x91 == addg x3, x4, #1008, #6
12
0xc5,0x3c,0x87,0x91 == addg x5, x6, #112, #15
13
0x20,0x04,0x80,0xd1 == subg x0, x1, #0, #1
14
0x5f,0x0c,0x82,0xd1 == subg sp, x2, #32, #3
15
0xe0,0x17,0x84,0xd1 == subg x0, sp, #64, #5
16
0x83,0x18,0xbf,0xd1 == subg x3, x4, #1008, #6
17
0xc5,0x3c,0x87,0xd1 == subg x5, x6, #112, #15
18
0x20,0x14,0xc2,0x9a == gmi x0, x1, x2
19
0xe3,0x17,0xc4,0x9a == gmi x3, sp, x4
20
0x1f,0x14,0xde,0x9a == gmi xzr, x0, x30
21
0x1e,0x14,0xdf,0x9a == gmi x30, x0, xzr
22
0x20,0x08,0x20,0xd9 == stg x0,  [x1]
23
0x21,0x08,0x30,0xd9 == stg x1,  [x1, #-4096]
24
0x42,0xf8,0x2f,0xd9 == stg x2,  [x2, #4080]
25
0xe3,0x1b,0x20,0xd9 == stg x3,  [sp, #16]
26
0xff,0x1b,0x20,0xd9 == stg sp,  [sp, #16]
27
0x20,0x08,0x60,0xd9 == stzg x0,  [x1]
28
0x21,0x08,0x70,0xd9 == stzg x1,  [x1, #-4096]
29
0x42,0xf8,0x6f,0xd9 == stzg x2,  [x2, #4080]
30
0xe3,0x1b,0x60,0xd9 == stzg x3,  [sp, #16]
31
0xff,0x1b,0x60,0xd9 == stzg sp,  [sp, #16]
32
0x20,0x0c,0x30,0xd9 == stg x0,  [x1, #-4096]!
33
0x41,0xfc,0x2f,0xd9 == stg x1,  [x2, #4080]!
34
0xe2,0x1f,0x20,0xd9 == stg x2,  [sp, #16]!
35
0xff,0x1f,0x20,0xd9 == stg sp,  [sp, #16]!
36
0x20,0x0c,0x70,0xd9 == stzg x0,  [x1, #-4096]!
37
0x41,0xfc,0x6f,0xd9 == stzg x1,  [x2, #4080]!
38
0xe2,0x1f,0x60,0xd9 == stzg x2,  [sp, #16]!
39
0xff,0x1f,0x60,0xd9 == stzg sp,  [sp, #16]!
40
0x20,0x04,0x30,0xd9 == stg x0,  [x1], #-4096
41
0x41,0xf4,0x2f,0xd9 == stg x1,  [x2], #4080
42
0xe2,0x17,0x20,0xd9 == stg x2,  [sp], #16
43
0xff,0x17,0x20,0xd9 == stg sp,  [sp], #16
44
0x20,0x04,0x70,0xd9 == stzg x0,  [x1], #-4096
45
0x41,0xf4,0x6f,0xd9 == stzg x1,  [x2], #4080
46
0xe2,0x17,0x60,0xd9 == stzg x2,  [sp], #16
47
0xff,0x17,0x60,0xd9 == stzg sp,  [sp], #16
48
0x20,0x08,0xa0,0xd9 == st2g x0,  [x1]
49
0x21,0x08,0xb0,0xd9 == st2g x1,  [x1, #-4096]
50
0x42,0xf8,0xaf,0xd9 == st2g x2,  [x2, #4080]
51
0xe3,0x1b,0xa0,0xd9 == st2g x3,  [sp, #16]
52
0xff,0x1b,0xa0,0xd9 == st2g sp,  [sp, #16]
53
0x20,0x08,0xe0,0xd9 == stz2g x0,  [x1]
54
0x21,0x08,0xf0,0xd9 == stz2g x1,  [x1, #-4096]
55
0x42,0xf8,0xef,0xd9 == stz2g x2,  [x2, #4080]
56
0xe3,0x1b,0xe0,0xd9 == stz2g x3,  [sp, #16]
57
0xff,0x1b,0xe0,0xd9 == stz2g sp,  [sp, #16]
58
0x20,0x0c,0xb0,0xd9 == st2g x0,  [x1, #-4096]!
59
0x41,0xfc,0xaf,0xd9 == st2g x1,  [x2, #4080]!
60
0xe2,0x1f,0xa0,0xd9 == st2g x2,  [sp, #16]!
61
0xff,0x1f,0xa0,0xd9 == st2g sp,  [sp, #16]!
62
0x20,0x0c,0xf0,0xd9 == stz2g x0,  [x1, #-4096]!
63
0x41,0xfc,0xef,0xd9 == stz2g x1,  [x2, #4080]!
64
0xe2,0x1f,0xe0,0xd9 == stz2g x2,  [sp, #16]!
65
0xff,0x1f,0xe0,0xd9 == stz2g sp,  [sp, #16]!
66
0x20,0x04,0xb0,0xd9 == st2g x0,  [x1], #-4096
67
0x41,0xf4,0xaf,0xd9 == st2g x1,  [x2], #4080
68
0xe2,0x17,0xa0,0xd9 == st2g x2,  [sp], #16
69
0xff,0x17,0xa0,0xd9 == st2g sp,  [sp], #16
70
0x20,0x04,0xf0,0xd9 == stz2g x0,  [x1], #-4096
71
0x41,0xf4,0xef,0xd9 == stz2g x1,  [x2], #4080
72
0xe2,0x17,0xe0,0xd9 == stz2g x2,  [sp], #16
73
0xff,0x17,0xe0,0xd9 == stz2g sp,  [sp], #16
74
0x40,0x04,0x00,0x69 == stgp x0, x1, [x2]
75
0x40,0x04,0x20,0x69 == stgp x0, x1, [x2, #-1024]
76
0x40,0x84,0x1f,0x69 == stgp x0, x1, [x2, #1008]
77
0xe0,0x87,0x00,0x69 == stgp x0, x1, [sp, #16]
78
0x5f,0x84,0x00,0x69 == stgp xzr, x1, [x2, #16]
79
0x40,0xfc,0x00,0x69 == stgp x0, xzr, [x2, #16]
80
0x40,0x04,0xa0,0x69 == stgp x0, x1, [x2, #-1024]!
81
0x40,0x84,0x9f,0x69 == stgp x0, x1, [x2, #1008]!
82
0xe0,0x87,0x80,0x69 == stgp x0, x1, [sp, #16]!
83
0x5f,0x84,0x80,0x69 == stgp xzr, x1, [x2, #16]!
84
0x40,0xfc,0x80,0x69 == stgp x0, xzr, [x2, #16]!
85
0x40,0x04,0xa0,0x68 == stgp x0, x1, [x2], #-1024
86
0x40,0x84,0x9f,0x68 == stgp x0, x1, [x2], #1008
87
0xe0,0x87,0x80,0x68 == stgp x0, x1, [sp], #16
88
0x5f,0x84,0x80,0x68 == stgp xzr, x1, [x2], #16
89
0x40,0xfc,0x80,0x68 == stgp x0, xzr, [x2], #16
90
0x60,0x76,0x08,0xd5 == dc igvac, x0
91
0x81,0x76,0x08,0xd5 == dc igsw, x1
92
0x82,0x7a,0x08,0xd5 == dc cgsw, x2
93
0x83,0x7e,0x08,0xd5 == dc cigsw, x3
94
0x64,0x7a,0x0b,0xd5 == dc cgvac, x4
95
0x65,0x7c,0x0b,0xd5 == dc cgvap, x5
96
0x66,0x7d,0x0b,0xd5 == dc cgvadp, x6
97
0x67,0x7e,0x0b,0xd5 == dc cigvac, x7
98
0x68,0x74,0x0b,0xd5 == dc gva, x8
99
0xa9,0x76,0x08,0xd5 == dc igdvac, x9
100
0xca,0x76,0x08,0xd5 == dc igdsw, x10
101
0xcb,0x7a,0x08,0xd5 == dc cgdsw, x11
102
0xcc,0x7e,0x08,0xd5 == dc cigdsw, x12
103
0xad,0x7a,0x0b,0xd5 == dc cgdvac, x13
104
0xae,0x7c,0x0b,0xd5 == dc cgdvap, x14
105
0xaf,0x7d,0x0b,0xd5 == dc cgdvadp, x15
106
0xb0,0x7e,0x0b,0xd5 == dc cigdvac, x16
107
0x91,0x74,0x0b,0xd5 == dc gzva, x17
108
0xe0,0x42,0x3b,0xd5 == mrs x0, TCO
109
0xc1,0x10,0x38,0xd5 == mrs x1, GCR_EL1
110
0xa2,0x10,0x38,0xd5 == mrs x2, RGSR_EL1
111
0x03,0x56,0x38,0xd5 == mrs x3, TFSR_EL1
112
0x04,0x56,0x3c,0xd5 == mrs x4, TFSR_EL2
113
0x05,0x56,0x3e,0xd5 == mrs x5, TFSR_EL3
114
0x06,0x56,0x3d,0xd5 == mrs x6, TFSR_EL12
115
0x27,0x56,0x38,0xd5 == mrs x7, TFSRE0_EL1
116
0x87,0x00,0x39,0xd5 == mrs x7, GMID_EL1
117
0x9f,0x40,0x03,0xd5 == msr TCO, #0
118
0xe0,0x42,0x1b,0xd5 == msr TCO, x0
119
0xc1,0x10,0x18,0xd5 == msr GCR_EL1, x1
120
0xa2,0x10,0x18,0xd5 == msr RGSR_EL1, x2
121
0x03,0x56,0x18,0xd5 == msr TFSR_EL1, x3
122
0x04,0x56,0x1c,0xd5 == msr TFSR_EL2, x4
123
0x05,0x56,0x1e,0xd5 == msr TFSR_EL3, x5
124
0x06,0x56,0x1d,0xd5 == msr TFSR_EL12, x6
125
0x27,0x56,0x18,0xd5 == msr TFSRE0_EL1, x7
126
0x20,0x00,0xc2,0x9a == subp  x0, x1, x2
127
0xe0,0x03,0xdf,0x9a == subp  x0, sp, sp
128
0x20,0x00,0xc2,0xba == subps x0, x1, x2
129
0xe0,0x03,0xdf,0xba == subps x0, sp, sp
130
0x1f,0x00,0xc1,0xba == subps xzr, x0, x1
131
0x1f,0x00,0xc1,0xba == subps xzr, x0, x1
132
0xff,0x03,0xdf,0xba == subps xzr, sp, sp
133
0xff,0x03,0xdf,0xba == subps xzr, sp, sp
134
0x20,0x00,0x60,0xd9 == ldg x0, [x1]
135
0xe2,0x03,0x70,0xd9 == ldg x2, [sp, #-4096]
136
0x83,0xf0,0x6f,0xd9 == ldg x3, [x4, #4080]
137
0x20,0x00,0xe0,0xd9 == ldgm x0, [x1]
138
0xe1,0x03,0xe0,0xd9 == ldgm x1, [sp]
139
0x5f,0x00,0xe0,0xd9 == ldgm xzr, [x2]
140
0x20,0x00,0xa0,0xd9 == stgm x0, [x1]
141
0xe1,0x03,0xa0,0xd9 == stgm x1, [sp]
142
0x5f,0x00,0xa0,0xd9 == stgm xzr, [x2]
143
0x20,0x00,0x20,0xd9 == stzgm x0, [x1]
144
0xe1,0x03,0x20,0xd9 == stzgm x1, [sp]
145
0x5f,0x00,0x20,0xd9 == stzgm xzr, [x2]
146

Использование cookies

Мы используем файлы cookie в соответствии с Политикой конфиденциальности и Политикой использования cookies.

Нажимая кнопку «Принимаю», Вы даете АО «СберТех» согласие на обработку Ваших персональных данных в целях совершенствования нашего веб-сайта и Сервиса GitVerse, а также повышения удобства их использования.

Запретить использование cookies Вы можете самостоятельно в настройках Вашего браузера.