capstone

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/* Capstone Disassembly Engine */
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/* By Nguyen Anh Quynh <aquynh@gmail.com>, 2013-2019 */
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/*    Rot127 <unisono@quyllur.org>, 2022-2023 */
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#include "Mapping.h"
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#include "capstone/capstone.h"
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#include "utils.h"
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// create a cache for fast id lookup
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static unsigned short *make_id2insn(const insn_map *insns, unsigned int size)
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{
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	// NOTE: assume that the max id is always put at the end of insns array
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	unsigned short max_id = insns[size - 1].id;
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	unsigned int i;
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	unsigned short *cache =
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		(unsigned short *)cs_mem_calloc(max_id + 1, sizeof(*cache));
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	for (i = 1; i < size; i++)
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		cache[insns[i].id] = i;
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	return cache;
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}
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// look for @id in @insns, given its size in @max. first time call will update
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// @cache. return 0 if not found
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unsigned short insn_find(const insn_map *insns, unsigned int max,
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			 unsigned int id, unsigned short **cache)
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{
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	if (id > insns[max - 1].id)
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		return 0;
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	if (*cache == NULL)
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		*cache = make_id2insn(insns, max);
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	return (*cache)[id];
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}
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// Gives the id for the given @name if it is saved in @map.
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// Returns the id or -1 if not found.
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int name2id(const name_map *map, int max, const char *name)
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{
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	int i;
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	for (i = 0; i < max; i++) {
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		if (!strcmp(map[i].name, name)) {
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			return map[i].id;
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		}
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	}
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	// nothing match
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	return -1;
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}
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// Gives the name for the given @id if it is saved in @map.
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// Returns the name or NULL if not found.
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const char *id2name(const name_map *map, int max, const unsigned int id)
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{
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	int i;
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	for (i = 0; i < max; i++) {
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		if (map[i].id == id) {
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			return map[i].name;
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		}
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	}
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	// nothing match
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	return NULL;
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}
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/// Adds a register to the implicit write register list.
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/// It will not add the same register twice.
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void map_add_implicit_write(MCInst *MI, uint32_t Reg)
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{
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	if (!MI->flat_insn->detail)
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		return;
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	uint16_t *regs_write = MI->flat_insn->detail->regs_write;
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	for (int i = 0; i < MAX_IMPL_W_REGS; ++i) {
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		if (i == MI->flat_insn->detail->regs_write_count) {
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			regs_write[i] = Reg;
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			MI->flat_insn->detail->regs_write_count++;
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			return;
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		}
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		if (regs_write[i] == Reg)
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			return;
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	}
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}
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/// Adds a register to the implicit read register list.
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/// It will not add the same register twice.
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void map_add_implicit_read(MCInst *MI, uint32_t Reg)
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{
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	if (!MI->flat_insn->detail)
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		return;
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	uint16_t *regs_read = MI->flat_insn->detail->regs_read;
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	for (int i = 0; i < MAX_IMPL_R_REGS; ++i) {
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		if (i == MI->flat_insn->detail->regs_read_count) {
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			regs_read[i] = Reg;
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			MI->flat_insn->detail->regs_read_count++;
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			return;
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		}
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		if (regs_read[i] == Reg)
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			return;
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	}
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}
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/// Removes a register from the implicit write register list.
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void map_remove_implicit_write(MCInst *MI, uint32_t Reg)
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{
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	if (!MI->flat_insn->detail)
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		return;
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	uint16_t *regs_write = MI->flat_insn->detail->regs_write;
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	bool shorten_list = false;
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	for (int i = 0; i < MAX_IMPL_W_REGS; ++i) {
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		if (shorten_list) {
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			regs_write[i - 1] = regs_write[i];
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		}
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		if (i >= MI->flat_insn->detail->regs_write_count)
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			return;
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		if (regs_write[i] == Reg) {
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			MI->flat_insn->detail->regs_write_count--;
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			// The register should exist only once in the list.
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			assert(!shorten_list);
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			shorten_list = true;
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		}
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	}
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}
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/// Copies the implicit read registers of @imap to @MI->flat_insn.
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/// Already present registers will be preserved.
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void map_implicit_reads(MCInst *MI, const insn_map *imap)
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{
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#ifndef CAPSTONE_DIET
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	if (!MI->flat_insn->detail)
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		return;
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	cs_detail *detail = MI->flat_insn->detail;
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	unsigned Opcode = MCInst_getOpcode(MI);
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	unsigned i = 0;
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	uint16_t reg = imap[Opcode].regs_use[i];
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	while (reg != 0) {
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		if (i >= MAX_IMPL_R_REGS ||
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		    detail->regs_read_count >= MAX_IMPL_R_REGS) {
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			printf("ERROR: Too many implicit read register defined in "
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			       "instruction mapping.\n");
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			return;
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		}
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		detail->regs_read[detail->regs_read_count++] = reg;
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		reg = imap[Opcode].regs_use[++i];
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	}
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#endif // CAPSTONE_DIET
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}
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/// Copies the implicit write registers of @imap to @MI->flat_insn.
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/// Already present registers will be preserved.
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void map_implicit_writes(MCInst *MI, const insn_map *imap)
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{
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#ifndef CAPSTONE_DIET
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	if (!MI->flat_insn->detail)
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		return;
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	cs_detail *detail = MI->flat_insn->detail;
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	unsigned Opcode = MCInst_getOpcode(MI);
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	unsigned i = 0;
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	uint16_t reg = imap[Opcode].regs_mod[i];
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	while (reg != 0) {
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		if (i >= MAX_IMPL_W_REGS ||
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		    detail->regs_write_count >= MAX_IMPL_W_REGS) {
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			printf("ERROR: Too many implicit write register defined in "
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			       "instruction mapping.\n");
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			return;
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		}
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		detail->regs_write[detail->regs_write_count++] = reg;
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		reg = imap[Opcode].regs_mod[++i];
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	}
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#endif // CAPSTONE_DIET
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}
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/// Adds a given group to @MI->flat_insn.
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/// A group is never added twice.
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void add_group(MCInst *MI, unsigned /* arch_group */ group)
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{
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#ifndef CAPSTONE_DIET
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	if (!MI->flat_insn->detail)
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		return;
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	cs_detail *detail = MI->flat_insn->detail;
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	if (detail->groups_count >= MAX_NUM_GROUPS) {
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		printf("ERROR: Too many groups defined.\n");
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		return;
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	}
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	for (int i = 0; i < detail->groups_count; ++i) {
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		if (detail->groups[i] == group) {
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			return;
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		}
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	}
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	detail->groups[detail->groups_count++] = group;
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#endif // CAPSTONE_DIET
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}
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/// Copies the groups from @imap to @MI->flat_insn.
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/// Already present groups will be preserved.
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void map_groups(MCInst *MI, const insn_map *imap)
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{
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#ifndef CAPSTONE_DIET
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	if (!MI->flat_insn->detail)
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		return;
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	cs_detail *detail = MI->flat_insn->detail;
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	unsigned Opcode = MCInst_getOpcode(MI);
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	unsigned i = 0;
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	uint16_t group = imap[Opcode].groups[i];
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	while (group != 0) {
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		if (detail->groups_count >= MAX_NUM_GROUPS) {
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			printf("ERROR: Too many groups defined in instruction mapping.\n");
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			return;
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		}
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		detail->groups[detail->groups_count++] = group;
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		group = imap[Opcode].groups[++i];
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	}
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#endif // CAPSTONE_DIET
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}
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/// Returns the pointer to the supllementary information in
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/// the instruction mapping table @imap or NULL in case of failure.
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const void *map_get_suppl_info(MCInst *MI, const insn_map *imap)
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{
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#ifndef CAPSTONE_DIET
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	if (!MI->flat_insn->detail)
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		return NULL;
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	unsigned Opcode = MCInst_getOpcode(MI);
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	return &imap[Opcode].suppl_info;
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#else
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	return NULL;
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#endif // CAPSTONE_DIET
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}
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// Search for the CS instruction id for the given @MC_Opcode in @imap.
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// return -1 if none is found.
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unsigned int find_cs_id(unsigned MC_Opcode, const insn_map *imap,
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			unsigned imap_size)
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{
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	// binary searching since the IDs are sorted in order
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	unsigned int left, right, m;
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	unsigned int max = imap_size;
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	right = max - 1;
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	if (MC_Opcode < imap[0].id || MC_Opcode > imap[right].id)
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		// not found
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		return -1;
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	left = 0;
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	while (left <= right) {
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		m = (left + right) / 2;
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		if (MC_Opcode == imap[m].id) {
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			return m;
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		}
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		if (MC_Opcode < imap[m].id)
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			right = m - 1;
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		else
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			left = m + 1;
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	}
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	return -1;
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}
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/// Sets the Capstone instruction id which maps to the @MI opcode.
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/// If no mapping is found the function returns and prints an error.
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void map_cs_id(MCInst *MI, const insn_map *imap, unsigned int imap_size)
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{
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	unsigned int i = find_cs_id(MCInst_getOpcode(MI), imap, imap_size);
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	if (i != -1) {
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		MI->flat_insn->id = imap[i].mapid;
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		return;
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	}
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	printf("ERROR: Could not find CS id for MCInst opcode: %d\n",
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	       MCInst_getOpcode(MI));
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	return;
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}
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/// Returns the operand type information from the
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/// mapping table for instruction operands.
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/// Only usable by `auto-sync` archs!
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const cs_op_type mapping_get_op_type(MCInst *MI, unsigned OpNum,
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				     const map_insn_ops *insn_ops_map,
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				     size_t map_size)
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{
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	assert(MI);
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	assert(MI->Opcode < map_size);
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	assert(OpNum < sizeof(insn_ops_map[MI->Opcode].ops) /
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			       sizeof(insn_ops_map[MI->Opcode].ops[0]));
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	return insn_ops_map[MI->Opcode].ops[OpNum].type;
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}
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/// Returns the operand access flags from the
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/// mapping table for instruction operands.
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/// Only usable by `auto-sync` archs!
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const cs_ac_type mapping_get_op_access(MCInst *MI, unsigned OpNum,
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				       const map_insn_ops *insn_ops_map,
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				       size_t map_size)
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{
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	assert(MI);
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	assert(MI->Opcode < map_size);
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	assert(OpNum < sizeof(insn_ops_map[MI->Opcode].ops) /
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			       sizeof(insn_ops_map[MI->Opcode].ops[0]));
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	cs_ac_type access = insn_ops_map[MI->Opcode].ops[OpNum].access;
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	if (MCInst_opIsTied(MI, OpNum) || MCInst_opIsTying(MI, OpNum))
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		access |= (access == CS_AC_READ) ? CS_AC_WRITE : CS_AC_READ;
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	return access;
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}
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/// Returns the operand at detail->arch.operands[op_count + offset]
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/// Or NULL if detail is not set.
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#define DEFINE_get_detail_op(arch, ARCH) \
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	cs_##arch##_op *ARCH##_get_detail_op(MCInst *MI, int offset) \
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	{ \
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		if (!MI->flat_insn->detail) \
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			return NULL; \
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		int OpIdx = MI->flat_insn->detail->arch.op_count + offset; \
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		assert(OpIdx >= 0 && OpIdx < MAX_MC_OPS); \
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		return &MI->flat_insn->detail->arch.operands[OpIdx]; \
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	}
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DEFINE_get_detail_op(arm, ARM);
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DEFINE_get_detail_op(ppc, PPC);
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DEFINE_get_detail_op(tricore, TriCore);
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DEFINE_get_detail_op(aarch64, AArch64);
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DEFINE_get_detail_op(alpha, Alpha);
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DEFINE_get_detail_op(hppa, HPPA);
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DEFINE_get_detail_op(loongarch, LoongArch);
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DEFINE_get_detail_op(riscv, RISCV);
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/// Returns true if for this architecture the
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/// alias operands should be filled.
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/// TODO: Replace this with a proper option.
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/// 			So it can be toggled between disas() calls.
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bool map_use_alias_details(const MCInst *MI) {
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	assert(MI);
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	return !(MI->csh->detail_opt & CS_OPT_DETAIL_REAL);
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}
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/// Sets the setDetailOps flag to @p Val.
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/// If detail == NULLit refuses to set the flag to true.
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void map_set_fill_detail_ops(MCInst *MI, bool Val) {
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	assert(MI);
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	if (!detail_is_set(MI)) {
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		MI->fillDetailOps = false;
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		return;
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	}
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	MI->fillDetailOps = Val;
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}
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/// Sets the instruction alias flags and the given alias id.
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void map_set_is_alias_insn(MCInst *MI, bool Val, uint64_t Alias) {
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	assert(MI);
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	MI->isAliasInstr = Val;
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	MI->flat_insn->is_alias = Val;
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	MI->flat_insn->alias_id = Alias;
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}
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static inline bool char_ends_mnem(const char c) {
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	return (!c || c == ' ' || c == '\t');
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}
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/// Sets an alternative id for some instruction.
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/// Or -1 if it fails.
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/// You must add (<ARCH>_INS_ALIAS_BEGIN + 1) to the id to get the real id.
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void map_set_alias_id(MCInst *MI, const SStream *O, const name_map *alias_mnem_id_map, int map_size) {
380
	if (!MCInst_isAlias(MI))
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		return;
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	char alias_mnem[16] = { 0 };
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	int i = 0, j = 0;
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	const char *asm_str_buf = O->buffer;
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	// Skip spaces and tabs
387
	while (is_blank_char(asm_str_buf[i])) {
388
		if (!asm_str_buf[i]) {
389
			MI->flat_insn->alias_id = -1;
390
			return;
391
		}
392
		++i;
393
	}
394
	for (; j < sizeof(alias_mnem) - 1; ++j, ++i) {
395
		if (char_ends_mnem(asm_str_buf[i]))
396
			break;
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		alias_mnem[j] = asm_str_buf[i];
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	}
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400
	MI->flat_insn->alias_id = name2id(alias_mnem_id_map, map_size, alias_mnem);
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}
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/// Does a binary search over the given map and searches for @id.
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/// If @id exists in @map, it sets @found to true and returns
405
/// the value for the @id.
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/// Otherwise, @found is set to false and it returns UINT64_MAX.
407
///
408
/// Of course it assumes the map is sorted.
409
uint64_t enum_map_bin_search(const cs_enum_id_map *map, size_t map_len,
410
			     const char *id, bool *found)
411
{
412
	size_t l = 0;
413
	size_t r = map_len;
414
	size_t id_len = strlen(id);
415

416
	while (l <= r) {
417
		size_t m = (l + r) / 2;
418
		size_t j = 0;
419
		size_t i = 0;
420
		size_t entry_len = strlen(map[m].str);
421

422
		while (j < entry_len && i < id_len && id[i] == map[m].str[j]) {
423
			++j, ++i;
424
		}
425
		if (i == id_len && j == entry_len) {
426
			*found = true;
427
			return map[m].val;
428
		}
429

430
		if (id[i] < map[m].str[j]) {
431
			r = m - 1;
432
		} else if (id[i] > map[m].str[j]) {
433
			l = m + 1;
434
		}
435
		if (m == 0 || (l + r) / 2 >= map_len) {
436
			// Break before we go out of bounds.
437
			break;
438
		}
439
	}
440
	*found = false;
441
	return UINT64_MAX;
442
}
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