llvm-project
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1; RUN: opt %loadNPMPolly -polly-vectorizer=stripmine -polly-isl-arg=--no-schedule-serialize-sccs -polly-tiling=0 '-passes=print<polly-opt-isl>' -disable-output < %s | FileCheck %s
2
3; isl_schedule_node_band_sink may sink into multiple children.
4; https://llvm.org/PR52637
5
6%struct.v4l2_sliced_vbi_data = type { [48 x i8] }
7
8define void @vivid_vbi_gen_sliced() {
9entry:
10br label %for.body
11
12for.body: ; preds = %vivid_vbi_gen_teletext.exit, %entry
13%i.015 = phi i32 [ 0, %entry ], [ %inc, %vivid_vbi_gen_teletext.exit ]
14%data0.014 = phi ptr [ null, %entry ], [ %incdec.ptr, %vivid_vbi_gen_teletext.exit ]
15%arrayidx.i = getelementptr inbounds %struct.v4l2_sliced_vbi_data, ptr %data0.014, i32 0, i32 0, i32 6
16%0 = load i8, ptr %arrayidx.i, align 1
17store i8 %0, ptr %data0.014, align 1
18br label %for.body.for.body_crit_edge.i
19
20for.body.for.body_crit_edge.i: ; preds = %for.body.for.body_crit_edge.i, %for.body
21%inc10.i13 = phi i32 [ 1, %for.body ], [ %inc10.i, %for.body.for.body_crit_edge.i ]
22%arrayidx2.phi.trans.insert.i = getelementptr inbounds %struct.v4l2_sliced_vbi_data, ptr %data0.014, i32 0, i32 0, i32 %inc10.i13
23store i8 0, ptr %arrayidx2.phi.trans.insert.i, align 1
24%inc10.i = add nuw nsw i32 %inc10.i13, 1
25%exitcond.not.i = icmp eq i32 %inc10.i13, 42
26br i1 %exitcond.not.i, label %vivid_vbi_gen_teletext.exit, label %for.body.for.body_crit_edge.i
27
28vivid_vbi_gen_teletext.exit: ; preds = %for.body.for.body_crit_edge.i
29%incdec.ptr = getelementptr inbounds %struct.v4l2_sliced_vbi_data, ptr %data0.014, i32 1
30%inc = add nuw nsw i32 %i.015, 1
31%exitcond.not = icmp eq i32 %i.015, 1
32br i1 %exitcond.not, label %for.end, label %for.body
33
34for.end: ; preds = %vivid_vbi_gen_teletext.exit
35ret void
36}
37
38
39; CHECK: schedule:
40; CHECK: schedule:
41; CHECK: mark: "SIMD"
42; CHECK: schedule:
43; CHECK: mark: "SIMD"
44; CHECK: schedule:
45