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pattern-matching-based-opts-after-delicm_2.ll 
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; RUN: opt %loadNPMPolly '-passes=polly-delicm,polly-simplify,polly-opt-isl' \
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; RUN: -polly-pattern-matching-based-opts=true \
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; RUN: -polly-tc-opt=true -debug -disable-output < %s 2>&1 | FileCheck %s
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; REQUIRES: asserts
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;
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; Check that the pattern matching detects the tensor contraction pattern
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; after a full run of -polly-delicm. This test case generates the following
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; schedule, which contans two band nodes. Without DeLICM two statement are
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; generated.
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;
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; domain: "{ Stmt5[i0, i1, i2, i3, i4, i5] : 0 <= i0 <= 31 and 0 <= i1 <= 31 and
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;                                            0 <= i2 <= 31 and 0 <= i3 <= 31 and
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;                                            0 <= i4 <= 31 and 0 <= i5 <= 31 }"
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; child:
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;   schedule: "[{ Stmt5[i0, i1, i2, i3, i4, i5] -> [(i0)] },
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;               { Stmt5[i0, i1, i2, i3, i4, i5] -> [(i1)] },
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;               { Stmt5[i0, i1, i2, i3, i4, i5] -> [(i2)] },
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;               { Stmt5[i0, i1, i2, i3, i4, i5] -> [(i4)] },
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;               { Stmt5[i0, i1, i2, i3, i4, i5] -> [(i3)] }]"
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;   permutable: 1
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;   coincident: [ 1, 1, 1, 1, 0 ]
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;   child:
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;     schedule: "[{ Stmt5[i0, i1, i2, i3, i4, i5] -> [(i5)] }]"
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;     permutable: 1
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;     child:
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;       leaf
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;
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;   for (i = 0; i < 32; i++)
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;     for (j = 0; j < 32; j++)
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;       for (k = 0; k < 32; ++k)
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;         for (l = 0; l < 32; ++l)
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;           for (w = 0; w < 32; ++w)
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;             for (q = 0; q < 32; ++q)
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;               C[i][j][k][w] += A[i][l][j][q] * B[q][w][l][k];
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;
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; CHECK: The tensor contraction pattern was detected
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;
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target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
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target triple = "x86_64-unknown-linux-gnu"
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define internal fastcc void @kernel_tc(ptr nocapture %C, ptr nocapture readonly %A, ptr nocapture readonly %B) {
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entry:
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  br label %for.cond1.preheader
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for.cond1.preheader:                              ; preds = %for.inc50, %entry
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  %indvars.iv19 = phi i64 [ 0, %entry ], [ %indvars.iv.next20, %for.inc50 ]
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  br label %for.cond4.preheader
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for.cond4.preheader:                              ; preds = %for.inc47, %for.cond1.preheader
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  %indvars.iv16 = phi i64 [ 0, %for.cond1.preheader ], [ %indvars.iv.next17, %for.inc47 ]
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  br label %for.cond7.preheader
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for.cond7.preheader:                              ; preds = %for.inc44, %for.cond4.preheader
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  %indvars.iv13 = phi i64 [ 0, %for.cond4.preheader ], [ %indvars.iv.next14, %for.inc44 ]
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  br label %for.cond10.preheader
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for.cond10.preheader:                             ; preds = %for.inc41, %for.cond7.preheader
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  %indvars.iv10 = phi i64 [ 0, %for.cond7.preheader ], [ %indvars.iv.next11, %for.inc41 ]
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  br label %for.cond13.preheader
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for.cond13.preheader:                             ; preds = %for.inc38, %for.cond10.preheader
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  %indvars.iv7 = phi i64 [ 0, %for.cond10.preheader ], [ %indvars.iv.next8, %for.inc38 ]
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  %arrayidx37 = getelementptr inbounds [32 x [32 x [32 x double]]], ptr %C, i64 %indvars.iv19, i64 %indvars.iv16, i64 %indvars.iv13, i64 %indvars.iv7
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  %.pre = load double, ptr %arrayidx37, align 8
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  br label %for.body15
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for.body15:                                       ; preds = %for.body15, %for.cond13.preheader
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  %i = phi double [ %.pre, %for.cond13.preheader ], [ %add, %for.body15 ]
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  %indvars.iv = phi i64 [ 0, %for.cond13.preheader ], [ %indvars.iv.next, %for.body15 ]
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  %arrayidx21 = getelementptr inbounds [32 x [32 x [32 x double]]], ptr %A, i64 %indvars.iv19, i64 %indvars.iv10, i64 %indvars.iv16, i64 %indvars.iv
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  %i1 = load double, ptr %arrayidx21, align 8
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  %arrayidx29 = getelementptr inbounds [32 x [32 x [32 x double]]], ptr %B, i64 %indvars.iv, i64 %indvars.iv7, i64 %indvars.iv10, i64 %indvars.iv13
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  %i2 = load double, ptr %arrayidx29, align 8
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  %mul = fmul fast double %i2, %i1
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  %add = fadd fast double %i, %mul
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  store double %add, ptr %arrayidx37, align 8
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  %indvars.iv.next = add nuw nsw i64 %indvars.iv, 1
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  %exitcond.not = icmp eq i64 %indvars.iv.next, 32
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  br i1 %exitcond.not, label %for.inc38, label %for.body15
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for.inc38:                                        ; preds = %for.body15
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  %indvars.iv.next8 = add nuw nsw i64 %indvars.iv7, 1
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  %exitcond9.not = icmp eq i64 %indvars.iv.next8, 32
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  br i1 %exitcond9.not, label %for.inc41, label %for.cond13.preheader
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for.inc41:                                        ; preds = %for.inc38
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  %indvars.iv.next11 = add nuw nsw i64 %indvars.iv10, 1
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  %exitcond12.not = icmp eq i64 %indvars.iv.next11, 32
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  br i1 %exitcond12.not, label %for.inc44, label %for.cond10.preheader
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for.inc44:                                        ; preds = %for.inc41
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  %indvars.iv.next14 = add nuw nsw i64 %indvars.iv13, 1
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  %exitcond15.not = icmp eq i64 %indvars.iv.next14, 32
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  br i1 %exitcond15.not, label %for.inc47, label %for.cond7.preheader
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for.inc47:                                        ; preds = %for.inc44
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  %indvars.iv.next17 = add nuw nsw i64 %indvars.iv16, 1
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  %exitcond18.not = icmp eq i64 %indvars.iv.next17, 32
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  br i1 %exitcond18.not, label %for.inc50, label %for.cond4.preheader
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for.inc50:                                        ; preds = %for.inc47
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  %indvars.iv.next20 = add nuw nsw i64 %indvars.iv19, 1
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  %exitcond21.not = icmp eq i64 %indvars.iv.next20, 32
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  br i1 %exitcond21.not, label %for.end52, label %for.cond1.preheader
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for.end52:                                        ; preds = %for.inc50
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  ret void
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}
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