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1//===-- SchedClassResolutionTest.cpp ----------------------------*- C++ -*-===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8
9#include "SchedClassResolution.h"
10
11#include <cassert>
12#include <memory>
13
14#include "TestBase.h"
15#include "llvm/MC/TargetRegistry.h"
16#include "llvm/Support/TargetSelect.h"
17#include "gmock/gmock.h"
18#include "gtest/gtest.h"
19
20namespace llvm {
21namespace exegesis {
22namespace {
23
24using testing::Pair;
25using testing::UnorderedElementsAre;
26
27class X86SchedClassResolutionTest : public X86TestBase {
28protected:
29X86SchedClassResolutionTest() : STI(State.getSubtargetInfo()) {
30// Compute the ProxResIdx of ports uses in tests.
31const auto &SM = STI.getSchedModel();
32for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
33const std::string Name = SM.getProcResource(I)->Name;
34if (Name == "HWPort0") {
35P0Idx = I;
36} else if (Name == "HWPort1") {
37P1Idx = I;
38} else if (Name == "HWPort5") {
39P5Idx = I;
40} else if (Name == "HWPort6") {
41P6Idx = I;
42} else if (Name == "HWPort05") {
43P05Idx = I;
44} else if (Name == "HWPort0156") {
45P0156Idx = I;
46}
47}
48EXPECT_NE(P0Idx, 0);
49EXPECT_NE(P1Idx, 0);
50EXPECT_NE(P5Idx, 0);
51EXPECT_NE(P6Idx, 0);
52EXPECT_NE(P05Idx, 0);
53EXPECT_NE(P0156Idx, 0);
54}
55
56protected:
57const MCSubtargetInfo &STI;
58uint16_t P0Idx = 0;
59uint16_t P1Idx = 0;
60uint16_t P5Idx = 0;
61uint16_t P6Idx = 0;
62uint16_t P05Idx = 0;
63uint16_t P0156Idx = 0;
64};
65
66TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P0) {
67const auto Pressure =
68computeIdealizedProcResPressure(STI.getSchedModel(), {{P0Idx, 2, 0}});
69EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(P0Idx, 2.0)));
70}
71
72TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05) {
73const auto Pressure =
74computeIdealizedProcResPressure(STI.getSchedModel(), {{P05Idx, 2, 0}});
75EXPECT_THAT(Pressure,
76UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P5Idx, 1.0)));
77}
78
79TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05_2P0156) {
80const auto Pressure = computeIdealizedProcResPressure(
81STI.getSchedModel(), {{P05Idx, 2, 0}, {P0156Idx, 2, 0}});
82EXPECT_THAT(Pressure,
83UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
84Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
85}
86
87TEST_F(X86SchedClassResolutionTest,
88ComputeIdealizedProcResPressure_1P1_1P05_2P0156) {
89const auto Pressure = computeIdealizedProcResPressure(
90STI.getSchedModel(), {{P1Idx, 1, 0}, {P05Idx, 1, 0}, {P0156Idx, 2, 0}});
91EXPECT_THAT(Pressure,
92UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
93Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
94}
95
96} // namespace
97} // namespace exegesis
98} // namespace llvm
99