llvm-project

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//===-- SchedClassResolutionTest.cpp ----------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "SchedClassResolution.h"
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#include <cassert>
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#include <memory>
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#include "TestBase.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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#include "gmock/gmock.h"
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#include "gtest/gtest.h"
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namespace llvm {
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namespace exegesis {
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namespace {
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using testing::Pair;
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using testing::UnorderedElementsAre;
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class X86SchedClassResolutionTest : public X86TestBase {
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protected:
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  X86SchedClassResolutionTest() : STI(State.getSubtargetInfo()) {
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    // Compute the ProxResIdx of ports uses in tests.
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    const auto &SM = STI.getSchedModel();
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    for (unsigned I = 0, E = SM.getNumProcResourceKinds(); I < E; ++I) {
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      const std::string Name = SM.getProcResource(I)->Name;
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      if (Name == "HWPort0") {
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        P0Idx = I;
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      } else if (Name == "HWPort1") {
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        P1Idx = I;
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      } else if (Name == "HWPort5") {
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        P5Idx = I;
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      } else if (Name == "HWPort6") {
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        P6Idx = I;
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      } else if (Name == "HWPort05") {
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        P05Idx = I;
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      } else if (Name == "HWPort0156") {
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        P0156Idx = I;
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      }
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    }
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    EXPECT_NE(P0Idx, 0);
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    EXPECT_NE(P1Idx, 0);
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    EXPECT_NE(P5Idx, 0);
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    EXPECT_NE(P6Idx, 0);
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    EXPECT_NE(P05Idx, 0);
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    EXPECT_NE(P0156Idx, 0);
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  }
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protected:
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  const MCSubtargetInfo &STI;
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  uint16_t P0Idx = 0;
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  uint16_t P1Idx = 0;
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  uint16_t P5Idx = 0;
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  uint16_t P6Idx = 0;
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  uint16_t P05Idx = 0;
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  uint16_t P0156Idx = 0;
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};
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TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P0) {
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  const auto Pressure =
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      computeIdealizedProcResPressure(STI.getSchedModel(), {{P0Idx, 2, 0}});
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  EXPECT_THAT(Pressure, UnorderedElementsAre(Pair(P0Idx, 2.0)));
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}
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TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05) {
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  const auto Pressure =
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      computeIdealizedProcResPressure(STI.getSchedModel(), {{P05Idx, 2, 0}});
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  EXPECT_THAT(Pressure,
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              UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P5Idx, 1.0)));
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}
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TEST_F(X86SchedClassResolutionTest, ComputeIdealizedProcResPressure_2P05_2P0156) {
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  const auto Pressure = computeIdealizedProcResPressure(
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      STI.getSchedModel(), {{P05Idx, 2, 0}, {P0156Idx, 2, 0}});
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  EXPECT_THAT(Pressure,
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              UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
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                                   Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
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}
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TEST_F(X86SchedClassResolutionTest,
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       ComputeIdealizedProcResPressure_1P1_1P05_2P0156) {
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  const auto Pressure = computeIdealizedProcResPressure(
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      STI.getSchedModel(), {{P1Idx, 1, 0}, {P05Idx, 1, 0}, {P0156Idx, 2, 0}});
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  EXPECT_THAT(Pressure,
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              UnorderedElementsAre(Pair(P0Idx, 1.0), Pair(P1Idx, 1.0),
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                                   Pair(P5Idx, 1.0), Pair(P6Idx, 1.0)));
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}
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} // namespace
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} // namespace exegesis
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} // namespace llvm
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