llvm-project

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//===-- X86RegisterAliasingTest.cpp --------------------------------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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#include "RegisterAliasing.h"
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#include <cassert>
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#include <memory>
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#include "TestBase.h"
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#include "X86InstrInfo.h"
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#include "llvm/MC/TargetRegistry.h"
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#include "llvm/Support/TargetSelect.h"
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#include "gmock/gmock.h"
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#include "gtest/gtest.h"
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namespace llvm {
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namespace exegesis {
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namespace {
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class X86RegisterAliasingTest : public X86TestBase {};
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TEST_F(X86RegisterAliasingTest, TrackSimpleRegister) {
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  const auto &RegInfo = State.getRegInfo();
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  const RegisterAliasingTracker tracker(RegInfo, X86::EAX);
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  std::set<MCPhysReg> ActualAliasedRegisters;
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  for (unsigned I : tracker.aliasedBits().set_bits())
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    ActualAliasedRegisters.insert(static_cast<MCPhysReg>(I));
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  const std::set<MCPhysReg> ExpectedAliasedRegisters = {
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      X86::AL, X86::AH, X86::AX, X86::EAX, X86::HAX, X86::RAX};
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  ASSERT_THAT(ActualAliasedRegisters, ExpectedAliasedRegisters);
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  for (MCPhysReg aliased : ExpectedAliasedRegisters) {
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    ASSERT_THAT(tracker.getOrigin(aliased), X86::EAX);
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  }
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}
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TEST_F(X86RegisterAliasingTest, TrackRegisterClass) {
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  // The alias bits for GR8_ABCD_LRegClassID are the union of the alias bits for
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  // AL, BL, CL and DL.
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  const auto &RegInfo = State.getRegInfo();
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  const BitVector NoReservedReg(RegInfo.getNumRegs());
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  const RegisterAliasingTracker RegClassTracker(
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      RegInfo, NoReservedReg, RegInfo.getRegClass(X86::GR8_ABCD_LRegClassID));
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  BitVector sum(RegInfo.getNumRegs());
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  sum |= RegisterAliasingTracker(RegInfo, X86::AL).aliasedBits();
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  sum |= RegisterAliasingTracker(RegInfo, X86::BL).aliasedBits();
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  sum |= RegisterAliasingTracker(RegInfo, X86::CL).aliasedBits();
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  sum |= RegisterAliasingTracker(RegInfo, X86::DL).aliasedBits();
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  ASSERT_THAT(RegClassTracker.aliasedBits(), sum);
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}
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TEST_F(X86RegisterAliasingTest, TrackRegisterClassCache) {
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  // Fetching twice the same tracker yields the same pointers.
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  const auto &RegInfo = State.getRegInfo();
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  const BitVector NoReservedReg(RegInfo.getNumRegs());
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  RegisterAliasingTrackerCache Cache(RegInfo, NoReservedReg);
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  ASSERT_THAT(&Cache.getRegister(X86::AX), &Cache.getRegister(X86::AX));
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  ASSERT_THAT(&Cache.getRegisterClass(X86::GR8_ABCD_LRegClassID),
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              &Cache.getRegisterClass(X86::GR8_ABCD_LRegClassID));
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}
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} // namespace
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} // namespace exegesis
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} // namespace llvm
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