llvm-project

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# REQUIRES: amdgpu-registered-target
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# RUN: not --crash llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -run-pass=none -o /dev/null %s 2>&1 | FileCheck %s
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---
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name: invalid_reg_sequence
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tracksRegLiveness: true
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body:             |
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  bb.0:
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    ; CHECK:   *** Bad machine code: Too few operands ***
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    IMPLICIT_DEF
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    ; FIXME: Error message misleading
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    ; CHECK: *** Bad machine code: Explicit definition must be a register ***
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    IMPLICIT_DEF 0
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    ; CHECK: *** Bad machine code: Extra explicit operand on non-variadic instruction ***
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    %1:vgpr_32 = IMPLICIT_DEF 0
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    ; CHECK: *** Bad machine code: Extra explicit operand on non-variadic instruction ***
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    ; CHECK: *** Bad machine code: Extra explicit operand on non-variadic instruction ***
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    %2:vgpr_32 = IMPLICIT_DEF 0, 1
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    ; CHECK: *** Bad machine code: Extra explicit operand on non-variadic instruction ***
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    %3:vgpr_32 = IMPLICIT_DEF %1
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    ; CHECK-NOT: Bad machine code
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    %4:vgpr_32 = IMPLICIT_DEF implicit %1
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...
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