llvm-project

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//===-- ARMTargetParser - Parser for ARM target features --------*- C++ -*-===//
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//
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// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
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// See https://llvm.org/LICENSE.txt for license information.
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// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements a target parser to recognise ARM hardware features
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// such as FPU/CPU/ARCH/extensions and specific support such as HWDIV.
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//
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//===----------------------------------------------------------------------===//
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#include "llvm/TargetParser/ARMTargetParser.h"
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#include "llvm/ADT/StringSwitch.h"
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#include "llvm/Support/Format.h"
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#include "llvm/Support/raw_ostream.h"
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#include "llvm/TargetParser/ARMTargetParserCommon.h"
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#include "llvm/TargetParser/Triple.h"
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#include <cctype>
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using namespace llvm;
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static StringRef getHWDivSynonym(StringRef HWDiv) {
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  return StringSwitch<StringRef>(HWDiv)
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      .Case("thumb,arm", "arm,thumb")
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      .Default(HWDiv);
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}
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// Allows partial match, ex. "v7a" matches "armv7a".
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ARM::ArchKind ARM::parseArch(StringRef Arch) {
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  Arch = getCanonicalArchName(Arch);
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  StringRef Syn = getArchSynonym(Arch);
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  for (const auto &A : ARMArchNames) {
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    if (A.Name.ends_with(Syn))
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      return A.ID;
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  }
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  return ArchKind::INVALID;
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}
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// Version number (ex. v7 = 7).
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unsigned ARM::parseArchVersion(StringRef Arch) {
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  Arch = getCanonicalArchName(Arch);
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  switch (parseArch(Arch)) {
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  case ArchKind::ARMV4:
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  case ArchKind::ARMV4T:
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    return 4;
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  case ArchKind::ARMV5T:
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  case ArchKind::ARMV5TE:
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  case ArchKind::IWMMXT:
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  case ArchKind::IWMMXT2:
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  case ArchKind::XSCALE:
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  case ArchKind::ARMV5TEJ:
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    return 5;
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  case ArchKind::ARMV6:
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  case ArchKind::ARMV6K:
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  case ArchKind::ARMV6T2:
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  case ArchKind::ARMV6KZ:
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  case ArchKind::ARMV6M:
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    return 6;
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  case ArchKind::ARMV7A:
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  case ArchKind::ARMV7VE:
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  case ArchKind::ARMV7R:
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  case ArchKind::ARMV7M:
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  case ArchKind::ARMV7S:
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  case ArchKind::ARMV7EM:
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  case ArchKind::ARMV7K:
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    return 7;
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  case ArchKind::ARMV8A:
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  case ArchKind::ARMV8_1A:
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  case ArchKind::ARMV8_2A:
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  case ArchKind::ARMV8_3A:
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  case ArchKind::ARMV8_4A:
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  case ArchKind::ARMV8_5A:
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  case ArchKind::ARMV8_6A:
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  case ArchKind::ARMV8_7A:
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  case ArchKind::ARMV8_8A:
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  case ArchKind::ARMV8_9A:
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  case ArchKind::ARMV8R:
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  case ArchKind::ARMV8MBaseline:
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  case ArchKind::ARMV8MMainline:
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  case ArchKind::ARMV8_1MMainline:
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    return 8;
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  case ArchKind::ARMV9A:
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  case ArchKind::ARMV9_1A:
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  case ArchKind::ARMV9_2A:
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  case ArchKind::ARMV9_3A:
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  case ArchKind::ARMV9_4A:
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  case ArchKind::ARMV9_5A:
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    return 9;
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  case ArchKind::INVALID:
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    return 0;
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  }
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  llvm_unreachable("Unhandled architecture");
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}
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static ARM::ProfileKind getProfileKind(ARM::ArchKind AK) {
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  switch (AK) {
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  case ARM::ArchKind::ARMV6M:
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  case ARM::ArchKind::ARMV7M:
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  case ARM::ArchKind::ARMV7EM:
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  case ARM::ArchKind::ARMV8MMainline:
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  case ARM::ArchKind::ARMV8MBaseline:
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  case ARM::ArchKind::ARMV8_1MMainline:
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    return ARM::ProfileKind::M;
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  case ARM::ArchKind::ARMV7R:
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  case ARM::ArchKind::ARMV8R:
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    return ARM::ProfileKind::R;
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  case ARM::ArchKind::ARMV7A:
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  case ARM::ArchKind::ARMV7VE:
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  case ARM::ArchKind::ARMV7K:
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  case ARM::ArchKind::ARMV8A:
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  case ARM::ArchKind::ARMV8_1A:
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  case ARM::ArchKind::ARMV8_2A:
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  case ARM::ArchKind::ARMV8_3A:
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  case ARM::ArchKind::ARMV8_4A:
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  case ARM::ArchKind::ARMV8_5A:
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  case ARM::ArchKind::ARMV8_6A:
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  case ARM::ArchKind::ARMV8_7A:
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  case ARM::ArchKind::ARMV8_8A:
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  case ARM::ArchKind::ARMV8_9A:
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  case ARM::ArchKind::ARMV9A:
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  case ARM::ArchKind::ARMV9_1A:
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  case ARM::ArchKind::ARMV9_2A:
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  case ARM::ArchKind::ARMV9_3A:
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  case ARM::ArchKind::ARMV9_4A:
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  case ARM::ArchKind::ARMV9_5A:
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    return ARM::ProfileKind::A;
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  case ARM::ArchKind::ARMV4:
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  case ARM::ArchKind::ARMV4T:
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  case ARM::ArchKind::ARMV5T:
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  case ARM::ArchKind::ARMV5TE:
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  case ARM::ArchKind::ARMV5TEJ:
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  case ARM::ArchKind::ARMV6:
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  case ARM::ArchKind::ARMV6K:
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  case ARM::ArchKind::ARMV6T2:
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  case ARM::ArchKind::ARMV6KZ:
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  case ARM::ArchKind::ARMV7S:
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  case ARM::ArchKind::IWMMXT:
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  case ARM::ArchKind::IWMMXT2:
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  case ARM::ArchKind::XSCALE:
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  case ARM::ArchKind::INVALID:
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    return ARM::ProfileKind::INVALID;
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  }
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  llvm_unreachable("Unhandled architecture");
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}
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// Profile A/R/M
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ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {
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  Arch = getCanonicalArchName(Arch);
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  return getProfileKind(parseArch(Arch));
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}
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bool ARM::getFPUFeatures(ARM::FPUKind FPUKind,
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                         std::vector<StringRef> &Features) {
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  if (FPUKind >= FK_LAST || FPUKind == FK_INVALID)
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    return false;
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  static const struct FPUFeatureNameInfo {
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    const char *PlusName, *MinusName;
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    FPUVersion MinVersion;
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    FPURestriction MaxRestriction;
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  } FPUFeatureInfoList[] = {
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    // We have to specify the + and - versions of the name in full so
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    // that we can return them as static StringRefs.
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    //
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    // Also, the SubtargetFeatures ending in just "sp" are listed here
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    // under FPURestriction::None, which is the only FPURestriction in
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    // which they would be valid (since FPURestriction::SP doesn't
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    // exist).
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    {"+vfp2", "-vfp2", FPUVersion::VFPV2, FPURestriction::D16},
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    {"+vfp2sp", "-vfp2sp", FPUVersion::VFPV2, FPURestriction::SP_D16},
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    {"+vfp3", "-vfp3", FPUVersion::VFPV3, FPURestriction::None},
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    {"+vfp3d16", "-vfp3d16", FPUVersion::VFPV3, FPURestriction::D16},
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    {"+vfp3d16sp", "-vfp3d16sp", FPUVersion::VFPV3, FPURestriction::SP_D16},
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    {"+vfp3sp", "-vfp3sp", FPUVersion::VFPV3, FPURestriction::None},
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    {"+fp16", "-fp16", FPUVersion::VFPV3_FP16, FPURestriction::SP_D16},
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    {"+vfp4", "-vfp4", FPUVersion::VFPV4, FPURestriction::None},
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    {"+vfp4d16", "-vfp4d16", FPUVersion::VFPV4, FPURestriction::D16},
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    {"+vfp4d16sp", "-vfp4d16sp", FPUVersion::VFPV4, FPURestriction::SP_D16},
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    {"+vfp4sp", "-vfp4sp", FPUVersion::VFPV4, FPURestriction::None},
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    {"+fp-armv8", "-fp-armv8", FPUVersion::VFPV5, FPURestriction::None},
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    {"+fp-armv8d16", "-fp-armv8d16", FPUVersion::VFPV5, FPURestriction::D16},
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    {"+fp-armv8d16sp", "-fp-armv8d16sp", FPUVersion::VFPV5, FPURestriction::SP_D16},
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    {"+fp-armv8sp", "-fp-armv8sp", FPUVersion::VFPV5, FPURestriction::None},
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    {"+fullfp16", "-fullfp16", FPUVersion::VFPV5_FULLFP16, FPURestriction::SP_D16},
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    {"+fp64", "-fp64", FPUVersion::VFPV2, FPURestriction::D16},
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    {"+d32", "-d32", FPUVersion::VFPV3, FPURestriction::None},
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  };
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  for (const auto &Info: FPUFeatureInfoList) {
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    if (FPUNames[FPUKind].FPUVer >= Info.MinVersion &&
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        FPUNames[FPUKind].Restriction <= Info.MaxRestriction)
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      Features.push_back(Info.PlusName);
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    else
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      Features.push_back(Info.MinusName);
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  }
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  static const struct NeonFeatureNameInfo {
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    const char *PlusName, *MinusName;
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    NeonSupportLevel MinSupportLevel;
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  } NeonFeatureInfoList[] = {
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      {"+neon", "-neon", NeonSupportLevel::Neon},
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      {"+sha2", "-sha2", NeonSupportLevel::Crypto},
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      {"+aes", "-aes", NeonSupportLevel::Crypto},
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  };
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  for (const auto &Info: NeonFeatureInfoList) {
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    if (FPUNames[FPUKind].NeonSupport >= Info.MinSupportLevel)
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      Features.push_back(Info.PlusName);
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    else
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      Features.push_back(Info.MinusName);
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  }
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  return true;
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}
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ARM::FPUKind ARM::parseFPU(StringRef FPU) {
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  StringRef Syn = getFPUSynonym(FPU);
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  for (const auto &F : FPUNames) {
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    if (Syn == F.Name)
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      return F.ID;
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  }
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  return FK_INVALID;
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}
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ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(ARM::FPUKind FPUKind) {
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  if (FPUKind >= FK_LAST)
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    return NeonSupportLevel::None;
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  return FPUNames[FPUKind].NeonSupport;
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}
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StringRef ARM::getFPUSynonym(StringRef FPU) {
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  return StringSwitch<StringRef>(FPU)
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      .Cases("fpa", "fpe2", "fpe3", "maverick", "invalid") // Unsupported
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      .Case("vfp2", "vfpv2")
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      .Case("vfp3", "vfpv3")
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      .Case("vfp4", "vfpv4")
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      .Case("vfp3-d16", "vfpv3-d16")
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      .Case("vfp4-d16", "vfpv4-d16")
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      .Cases("fp4-sp-d16", "vfpv4-sp-d16", "fpv4-sp-d16")
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      .Cases("fp4-dp-d16", "fpv4-dp-d16", "vfpv4-d16")
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      .Case("fp5-sp-d16", "fpv5-sp-d16")
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      .Cases("fp5-dp-d16", "fpv5-dp-d16", "fpv5-d16")
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      // FIXME: Clang uses it, but it's bogus, since neon defaults to vfpv3.
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      .Case("neon-vfpv3", "neon")
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      .Default(FPU);
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}
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StringRef ARM::getFPUName(ARM::FPUKind FPUKind) {
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  if (FPUKind >= FK_LAST)
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    return StringRef();
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  return FPUNames[FPUKind].Name;
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}
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ARM::FPUVersion ARM::getFPUVersion(ARM::FPUKind FPUKind) {
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  if (FPUKind >= FK_LAST)
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    return FPUVersion::NONE;
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  return FPUNames[FPUKind].FPUVer;
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}
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ARM::FPURestriction ARM::getFPURestriction(ARM::FPUKind FPUKind) {
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  if (FPUKind >= FK_LAST)
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    return FPURestriction::None;
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  return FPUNames[FPUKind].Restriction;
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}
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ARM::FPUKind ARM::getDefaultFPU(StringRef CPU, ARM::ArchKind AK) {
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  if (CPU == "generic")
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    return ARM::ARMArchNames[static_cast<unsigned>(AK)].DefaultFPU;
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  return StringSwitch<ARM::FPUKind>(CPU)
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#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
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  .Case(NAME, DEFAULT_FPU)
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#include "llvm/TargetParser/ARMTargetParser.def"
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      .Default(ARM::FK_INVALID);
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}
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uint64_t ARM::getDefaultExtensions(StringRef CPU, ARM::ArchKind AK) {
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  if (CPU == "generic")
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    return ARM::ARMArchNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
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284
  return StringSwitch<uint64_t>(CPU)
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#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)           \
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  .Case(NAME,                                                                  \
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        ARMArchNames[static_cast<unsigned>(ArchKind::ID)].ArchBaseExtensions | \
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            DEFAULT_EXT)
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#include "llvm/TargetParser/ARMTargetParser.def"
290
  .Default(ARM::AEK_INVALID);
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}
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bool ARM::getHWDivFeatures(uint64_t HWDivKind,
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                           std::vector<StringRef> &Features) {
295

296
  if (HWDivKind == AEK_INVALID)
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    return false;
298

299
  if (HWDivKind & AEK_HWDIVARM)
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    Features.push_back("+hwdiv-arm");
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  else
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    Features.push_back("-hwdiv-arm");
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  if (HWDivKind & AEK_HWDIVTHUMB)
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    Features.push_back("+hwdiv");
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  else
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    Features.push_back("-hwdiv");
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  return true;
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}
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bool ARM::getExtensionFeatures(uint64_t Extensions,
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                               std::vector<StringRef> &Features) {
314

315
  if (Extensions == AEK_INVALID)
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    return false;
317

318
  for (const auto &AE : ARCHExtNames) {
319
    if ((Extensions & AE.ID) == AE.ID && !AE.Feature.empty())
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      Features.push_back(AE.Feature);
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    else if (!AE.NegFeature.empty())
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      Features.push_back(AE.NegFeature);
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  }
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  return getHWDivFeatures(Extensions, Features);
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}
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StringRef ARM::getArchName(ARM::ArchKind AK) {
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  return ARMArchNames[static_cast<unsigned>(AK)].Name;
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}
331

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StringRef ARM::getCPUAttr(ARM::ArchKind AK) {
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  return ARMArchNames[static_cast<unsigned>(AK)].CPUAttr;
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}
335

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StringRef ARM::getSubArch(ARM::ArchKind AK) {
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  return ARMArchNames[static_cast<unsigned>(AK)].getSubArch();
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}
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unsigned ARM::getArchAttr(ARM::ArchKind AK) {
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  return ARMArchNames[static_cast<unsigned>(AK)].ArchAttr;
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}
343

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StringRef ARM::getArchExtName(uint64_t ArchExtKind) {
345
  for (const auto &AE : ARCHExtNames) {
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    if (ArchExtKind == AE.ID)
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      return AE.Name;
348
  }
349
  return StringRef();
350
}
351

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static bool stripNegationPrefix(StringRef &Name) {
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  return Name.consume_front("no");
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}
355

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StringRef ARM::getArchExtFeature(StringRef ArchExt) {
357
  bool Negated = stripNegationPrefix(ArchExt);
358
  for (const auto &AE : ARCHExtNames) {
359
    if (!AE.Feature.empty() && ArchExt == AE.Name)
360
      return StringRef(Negated ? AE.NegFeature : AE.Feature);
361
  }
362

363
  return StringRef();
364
}
365

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static ARM::FPUKind findDoublePrecisionFPU(ARM::FPUKind InputFPUKind) {
367
  if (InputFPUKind == ARM::FK_INVALID || InputFPUKind == ARM::FK_NONE)
368
    return ARM::FK_INVALID;
369

370
  const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];
371

372
  // If the input FPU already supports double-precision, then there
373
  // isn't any different FPU we can return here.
374
  if (ARM::isDoublePrecision(InputFPU.Restriction))
375
    return InputFPUKind;
376

377
  // Otherwise, look for an FPU entry with all the same fields, except
378
  // that it supports double precision.
379
  for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {
380
    if (CandidateFPU.FPUVer == InputFPU.FPUVer &&
381
        CandidateFPU.NeonSupport == InputFPU.NeonSupport &&
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        ARM::has32Regs(CandidateFPU.Restriction) ==
383
            ARM::has32Regs(InputFPU.Restriction) &&
384
        ARM::isDoublePrecision(CandidateFPU.Restriction)) {
385
      return CandidateFPU.ID;
386
    }
387
  }
388

389
  // nothing found
390
  return ARM::FK_INVALID;
391
}
392

393
static ARM::FPUKind findSinglePrecisionFPU(ARM::FPUKind InputFPUKind) {
394
  if (InputFPUKind == ARM::FK_INVALID || InputFPUKind == ARM::FK_NONE)
395
    return ARM::FK_INVALID;
396

397
  const ARM::FPUName &InputFPU = ARM::FPUNames[InputFPUKind];
398

399
  // If the input FPU already is single-precision only, then there
400
  // isn't any different FPU we can return here.
401
  if (!ARM::isDoublePrecision(InputFPU.Restriction))
402
    return InputFPUKind;
403

404
  // Otherwise, look for an FPU entry with all the same fields, except
405
  // that it does not support double precision.
406
  for (const ARM::FPUName &CandidateFPU : ARM::FPUNames) {
407
    if (CandidateFPU.FPUVer == InputFPU.FPUVer &&
408
        CandidateFPU.NeonSupport == InputFPU.NeonSupport &&
409
        ARM::has32Regs(CandidateFPU.Restriction) ==
410
            ARM::has32Regs(InputFPU.Restriction) &&
411
        !ARM::isDoublePrecision(CandidateFPU.Restriction)) {
412
      return CandidateFPU.ID;
413
    }
414
  }
415

416
  // nothing found
417
  return ARM::FK_INVALID;
418
}
419

420
bool ARM::appendArchExtFeatures(StringRef CPU, ARM::ArchKind AK,
421
                                StringRef ArchExt,
422
                                std::vector<StringRef> &Features,
423
                                ARM::FPUKind &ArgFPUKind) {
424

425
  size_t StartingNumFeatures = Features.size();
426
  const bool Negated = stripNegationPrefix(ArchExt);
427
  uint64_t ID = parseArchExt(ArchExt);
428

429
  if (ID == AEK_INVALID)
430
    return false;
431

432
  for (const auto &AE : ARCHExtNames) {
433
    if (Negated) {
434
      if ((AE.ID & ID) == ID && !AE.NegFeature.empty())
435
        Features.push_back(AE.NegFeature);
436
    } else {
437
      if ((AE.ID & ID) == AE.ID && !AE.Feature.empty())
438
        Features.push_back(AE.Feature);
439
    }
440
  }
441

442
  if (CPU == "")
443
    CPU = "generic";
444

445
  if (ArchExt == "fp" || ArchExt == "fp.dp") {
446
    const ARM::FPUKind DefaultFPU = getDefaultFPU(CPU, AK);
447
    ARM::FPUKind FPUKind;
448
    if (ArchExt == "fp.dp") {
449
      const bool IsDP = ArgFPUKind != ARM::FK_INVALID &&
450
                        ArgFPUKind != ARM::FK_NONE &&
451
                        isDoublePrecision(getFPURestriction(ArgFPUKind));
452
      if (Negated) {
453
        /* If there is no FPU selected yet, we still need to set ArgFPUKind, as
454
         * leaving it as FK_INVALID, would cause default FPU to be selected
455
         * later and that could be double precision one. */
456
        if (ArgFPUKind != ARM::FK_INVALID && !IsDP)
457
          return true;
458
        FPUKind = findSinglePrecisionFPU(DefaultFPU);
459
        if (FPUKind == ARM::FK_INVALID)
460
          FPUKind = ARM::FK_NONE;
461
      } else {
462
        if (IsDP)
463
          return true;
464
        FPUKind = findDoublePrecisionFPU(DefaultFPU);
465
        if (FPUKind == ARM::FK_INVALID)
466
          return false;
467
      }
468
    } else if (Negated) {
469
      FPUKind = ARM::FK_NONE;
470
    } else {
471
      FPUKind = DefaultFPU;
472
    }
473
    ArgFPUKind = FPUKind;
474
    return true;
475
  }
476
  return StartingNumFeatures != Features.size();
477
}
478

479
ARM::ArchKind ARM::convertV9toV8(ARM::ArchKind AK) {
480
  if (getProfileKind(AK) != ProfileKind::A)
481
    return ARM::ArchKind::INVALID;
482
  if (AK < ARM::ArchKind::ARMV9A || AK > ARM::ArchKind::ARMV9_3A)
483
    return ARM::ArchKind::INVALID;
484
  unsigned AK_v8 = static_cast<unsigned>(ARM::ArchKind::ARMV8_5A);
485
  AK_v8 += static_cast<unsigned>(AK) -
486
           static_cast<unsigned>(ARM::ArchKind::ARMV9A);
487
  return static_cast<ARM::ArchKind>(AK_v8);
488
}
489

490
StringRef ARM::getDefaultCPU(StringRef Arch) {
491
  ArchKind AK = parseArch(Arch);
492
  if (AK == ArchKind::INVALID)
493
    return StringRef();
494

495
  // Look for multiple AKs to find the default for pair AK+Name.
496
  for (const auto &CPU : CPUNames) {
497
    if (CPU.ArchID == AK && CPU.Default)
498
      return CPU.Name;
499
  }
500

501
  // If we can't find a default then target the architecture instead
502
  return "generic";
503
}
504

505
uint64_t ARM::parseHWDiv(StringRef HWDiv) {
506
  StringRef Syn = getHWDivSynonym(HWDiv);
507
  for (const auto &D : HWDivNames) {
508
    if (Syn == D.Name)
509
      return D.ID;
510
  }
511
  return AEK_INVALID;
512
}
513

514
uint64_t ARM::parseArchExt(StringRef ArchExt) {
515
  for (const auto &A : ARCHExtNames) {
516
    if (ArchExt == A.Name)
517
      return A.ID;
518
  }
519
  return AEK_INVALID;
520
}
521

522
ARM::ArchKind ARM::parseCPUArch(StringRef CPU) {
523
  for (const auto &C : CPUNames) {
524
    if (CPU == C.Name)
525
      return C.ArchID;
526
  }
527
  return ArchKind::INVALID;
528
}
529

530
void ARM::fillValidCPUArchList(SmallVectorImpl<StringRef> &Values) {
531
  for (const auto &Arch : CPUNames) {
532
    if (Arch.ArchID != ArchKind::INVALID)
533
      Values.push_back(Arch.Name);
534
  }
535
}
536

537
StringRef ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) {
538
  StringRef ArchName =
539
      CPU.empty() ? TT.getArchName() : getArchName(parseCPUArch(CPU));
540

541
  if (TT.isOSBinFormatMachO()) {
542
    if (TT.getEnvironment() == Triple::EABI ||
543
        TT.getOS() == Triple::UnknownOS ||
544
        parseArchProfile(ArchName) == ProfileKind::M)
545
      return "aapcs";
546
    if (TT.isWatchABI())
547
      return "aapcs16";
548
    return "apcs-gnu";
549
  } else if (TT.isOSWindows())
550
    // FIXME: this is invalid for WindowsCE.
551
    return "aapcs";
552

553
  // Select the default based on the platform.
554
  switch (TT.getEnvironment()) {
555
  case Triple::Android:
556
  case Triple::GNUEABI:
557
  case Triple::GNUEABIHF:
558
  case Triple::MuslEABI:
559
  case Triple::MuslEABIHF:
560
  case Triple::OpenHOS:
561
    return "aapcs-linux";
562
  case Triple::EABIHF:
563
  case Triple::EABI:
564
    return "aapcs";
565
  default:
566
    if (TT.isOSNetBSD())
567
      return "apcs-gnu";
568
    if (TT.isOSFreeBSD() || TT.isOSOpenBSD() || TT.isOSHaiku() ||
569
        TT.isOHOSFamily())
570
      return "aapcs-linux";
571
    return "aapcs";
572
  }
573
}
574

575
StringRef ARM::getARMCPUForArch(const llvm::Triple &Triple, StringRef MArch) {
576
  if (MArch.empty())
577
    MArch = Triple.getArchName();
578
  MArch = llvm::ARM::getCanonicalArchName(MArch);
579

580
  // Some defaults are forced.
581
  switch (Triple.getOS()) {
582
  case llvm::Triple::FreeBSD:
583
  case llvm::Triple::NetBSD:
584
  case llvm::Triple::OpenBSD:
585
  case llvm::Triple::Haiku:
586
    if (!MArch.empty() && MArch == "v6")
587
      return "arm1176jzf-s";
588
    if (!MArch.empty() && MArch == "v7")
589
      return "cortex-a8";
590
    break;
591
  case llvm::Triple::Win32:
592
    // FIXME: this is invalid for WindowsCE
593
    if (llvm::ARM::parseArchVersion(MArch) <= 7)
594
      return "cortex-a9";
595
    break;
596
  case llvm::Triple::IOS:
597
  case llvm::Triple::MacOSX:
598
  case llvm::Triple::TvOS:
599
  case llvm::Triple::WatchOS:
600
  case llvm::Triple::DriverKit:
601
  case llvm::Triple::XROS:
602
    if (MArch == "v7k")
603
      return "cortex-a7";
604
    break;
605
  default:
606
    break;
607
  }
608

609
  if (MArch.empty())
610
    return StringRef();
611

612
  StringRef CPU = llvm::ARM::getDefaultCPU(MArch);
613
  if (!CPU.empty() && CPU != "invalid")
614
    return CPU;
615

616
  // If no specific architecture version is requested, return the minimum CPU
617
  // required by the OS and environment.
618
  switch (Triple.getOS()) {
619
  case llvm::Triple::Haiku:
620
    return "arm1176jzf-s";
621
  case llvm::Triple::NetBSD:
622
    switch (Triple.getEnvironment()) {
623
    case llvm::Triple::EABI:
624
    case llvm::Triple::EABIHF:
625
    case llvm::Triple::GNUEABI:
626
    case llvm::Triple::GNUEABIHF:
627
      return "arm926ej-s";
628
    default:
629
      return "strongarm";
630
    }
631
  case llvm::Triple::NaCl:
632
  case llvm::Triple::OpenBSD:
633
    return "cortex-a8";
634
  default:
635
    switch (Triple.getEnvironment()) {
636
    case llvm::Triple::EABIHF:
637
    case llvm::Triple::GNUEABIHF:
638
    case llvm::Triple::MuslEABIHF:
639
      return "arm1176jzf-s";
640
    default:
641
      return "arm7tdmi";
642
    }
643
  }
644

645
  llvm_unreachable("invalid arch name");
646
}
647

648
void ARM::PrintSupportedExtensions(StringMap<StringRef> DescMap) {
649
  outs() << "All available -march extensions for ARM\n\n"
650
         << "    " << left_justify("Name", 20)
651
         << (DescMap.empty() ? "\n" : "Description\n");
652
  for (const auto &Ext : ARCHExtNames) {
653
    // Extensions without a feature cannot be used with -march.
654
    if (!Ext.Feature.empty()) {
655
      std::string Description = DescMap[Ext.Name].str();
656
      outs() << "    "
657
             << format(Description.empty() ? "%s\n" : "%-20s%s\n",
658
                       Ext.Name.str().c_str(), Description.c_str());
659
    }
660
  }
661
}
662