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1//===----------- VectorUtils.cpp - Vectorizer utility functions -----------===//
2//
3// Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4// See https://llvm.org/LICENSE.txt for license information.
5// SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6//
7//===----------------------------------------------------------------------===//
8//
9// This file defines vectorizer utilities.
10//
11//===----------------------------------------------------------------------===//
12
13#include "llvm/Analysis/VectorUtils.h"14#include "llvm/ADT/EquivalenceClasses.h"15#include "llvm/ADT/SmallVector.h"16#include "llvm/Analysis/DemandedBits.h"17#include "llvm/Analysis/LoopInfo.h"18#include "llvm/Analysis/LoopIterator.h"19#include "llvm/Analysis/ScalarEvolution.h"20#include "llvm/Analysis/ScalarEvolutionExpressions.h"21#include "llvm/Analysis/TargetTransformInfo.h"22#include "llvm/Analysis/ValueTracking.h"23#include "llvm/IR/Constants.h"24#include "llvm/IR/DerivedTypes.h"25#include "llvm/IR/IRBuilder.h"26#include "llvm/IR/MemoryModelRelaxationAnnotations.h"27#include "llvm/IR/PatternMatch.h"28#include "llvm/IR/Value.h"29#include "llvm/Support/CommandLine.h"30
31#define DEBUG_TYPE "vectorutils"32
33using namespace llvm;34using namespace llvm::PatternMatch;35
36/// Maximum factor for an interleaved memory access.
37static cl::opt<unsigned> MaxInterleaveGroupFactor(38"max-interleave-group-factor", cl::Hidden,39cl::desc("Maximum factor for an interleaved access group (default = 8)"),40cl::init(8));41
42/// Return true if all of the intrinsic's arguments and return type are scalars
43/// for the scalar form of the intrinsic, and vectors for the vector form of the
44/// intrinsic (except operands that are marked as always being scalar by
45/// isVectorIntrinsicWithScalarOpAtArg).
46bool llvm::isTriviallyVectorizable(Intrinsic::ID ID) {47switch (ID) {48case Intrinsic::abs: // Begin integer bit-manipulation.49case Intrinsic::bswap:50case Intrinsic::bitreverse:51case Intrinsic::ctpop:52case Intrinsic::ctlz:53case Intrinsic::cttz:54case Intrinsic::fshl:55case Intrinsic::fshr:56case Intrinsic::smax:57case Intrinsic::smin:58case Intrinsic::umax:59case Intrinsic::umin:60case Intrinsic::sadd_sat:61case Intrinsic::ssub_sat:62case Intrinsic::uadd_sat:63case Intrinsic::usub_sat:64case Intrinsic::smul_fix:65case Intrinsic::smul_fix_sat:66case Intrinsic::umul_fix:67case Intrinsic::umul_fix_sat:68case Intrinsic::sqrt: // Begin floating-point.69case Intrinsic::sin:70case Intrinsic::cos:71case Intrinsic::tan:72case Intrinsic::exp:73case Intrinsic::exp2:74case Intrinsic::log:75case Intrinsic::log10:76case Intrinsic::log2:77case Intrinsic::fabs:78case Intrinsic::minnum:79case Intrinsic::maxnum:80case Intrinsic::minimum:81case Intrinsic::maximum:82case Intrinsic::copysign:83case Intrinsic::floor:84case Intrinsic::ceil:85case Intrinsic::trunc:86case Intrinsic::rint:87case Intrinsic::nearbyint:88case Intrinsic::round:89case Intrinsic::roundeven:90case Intrinsic::pow:91case Intrinsic::fma:92case Intrinsic::fmuladd:93case Intrinsic::is_fpclass:94case Intrinsic::powi:95case Intrinsic::canonicalize:96case Intrinsic::fptosi_sat:97case Intrinsic::fptoui_sat:98case Intrinsic::lrint:99case Intrinsic::llrint:100return true;101default:102return false;103}104}
105
106/// Identifies if the vector form of the intrinsic has a scalar operand.
107bool llvm::isVectorIntrinsicWithScalarOpAtArg(Intrinsic::ID ID,108unsigned ScalarOpdIdx) {109switch (ID) {110case Intrinsic::abs:111case Intrinsic::ctlz:112case Intrinsic::cttz:113case Intrinsic::is_fpclass:114case Intrinsic::powi:115return (ScalarOpdIdx == 1);116case Intrinsic::smul_fix:117case Intrinsic::smul_fix_sat:118case Intrinsic::umul_fix:119case Intrinsic::umul_fix_sat:120return (ScalarOpdIdx == 2);121default:122return false;123}124}
125
126bool llvm::isVectorIntrinsicWithOverloadTypeAtArg(Intrinsic::ID ID,127int OpdIdx) {128assert(ID != Intrinsic::not_intrinsic && "Not an intrinsic!");129
130switch (ID) {131case Intrinsic::fptosi_sat:132case Intrinsic::fptoui_sat:133case Intrinsic::lrint:134case Intrinsic::llrint:135return OpdIdx == -1 || OpdIdx == 0;136case Intrinsic::is_fpclass:137return OpdIdx == 0;138case Intrinsic::powi:139return OpdIdx == -1 || OpdIdx == 1;140default:141return OpdIdx == -1;142}143}
144
145/// Returns intrinsic ID for call.
146/// For the input call instruction it finds mapping intrinsic and returns
147/// its ID, in case it does not found it return not_intrinsic.
148Intrinsic::ID llvm::getVectorIntrinsicIDForCall(const CallInst *CI,149const TargetLibraryInfo *TLI) {150Intrinsic::ID ID = getIntrinsicForCallSite(*CI, TLI);151if (ID == Intrinsic::not_intrinsic)152return Intrinsic::not_intrinsic;153
154if (isTriviallyVectorizable(ID) || ID == Intrinsic::lifetime_start ||155ID == Intrinsic::lifetime_end || ID == Intrinsic::assume ||156ID == Intrinsic::experimental_noalias_scope_decl ||157ID == Intrinsic::sideeffect || ID == Intrinsic::pseudoprobe)158return ID;159return Intrinsic::not_intrinsic;160}
161
162/// Given a vector and an element number, see if the scalar value is
163/// already around as a register, for example if it were inserted then extracted
164/// from the vector.
165Value *llvm::findScalarElement(Value *V, unsigned EltNo) {166assert(V->getType()->isVectorTy() && "Not looking at a vector?");167VectorType *VTy = cast<VectorType>(V->getType());168// For fixed-length vector, return poison for out of range access.169if (auto *FVTy = dyn_cast<FixedVectorType>(VTy)) {170unsigned Width = FVTy->getNumElements();171if (EltNo >= Width)172return PoisonValue::get(FVTy->getElementType());173}174
175if (Constant *C = dyn_cast<Constant>(V))176return C->getAggregateElement(EltNo);177
178if (InsertElementInst *III = dyn_cast<InsertElementInst>(V)) {179// If this is an insert to a variable element, we don't know what it is.180if (!isa<ConstantInt>(III->getOperand(2)))181return nullptr;182unsigned IIElt = cast<ConstantInt>(III->getOperand(2))->getZExtValue();183
184// If this is an insert to the element we are looking for, return the185// inserted value.186if (EltNo == IIElt)187return III->getOperand(1);188
189// Guard against infinite loop on malformed, unreachable IR.190if (III == III->getOperand(0))191return nullptr;192
193// Otherwise, the insertelement doesn't modify the value, recurse on its194// vector input.195return findScalarElement(III->getOperand(0), EltNo);196}197
198ShuffleVectorInst *SVI = dyn_cast<ShuffleVectorInst>(V);199// Restrict the following transformation to fixed-length vector.200if (SVI && isa<FixedVectorType>(SVI->getType())) {201unsigned LHSWidth =202cast<FixedVectorType>(SVI->getOperand(0)->getType())->getNumElements();203int InEl = SVI->getMaskValue(EltNo);204if (InEl < 0)205return PoisonValue::get(VTy->getElementType());206if (InEl < (int)LHSWidth)207return findScalarElement(SVI->getOperand(0), InEl);208return findScalarElement(SVI->getOperand(1), InEl - LHSWidth);209}210
211// Extract a value from a vector add operation with a constant zero.212// TODO: Use getBinOpIdentity() to generalize this.213Value *Val; Constant *C;214if (match(V, m_Add(m_Value(Val), m_Constant(C))))215if (Constant *Elt = C->getAggregateElement(EltNo))216if (Elt->isNullValue())217return findScalarElement(Val, EltNo);218
219// If the vector is a splat then we can trivially find the scalar element.220if (isa<ScalableVectorType>(VTy))221if (Value *Splat = getSplatValue(V))222if (EltNo < VTy->getElementCount().getKnownMinValue())223return Splat;224
225// Otherwise, we don't know.226return nullptr;227}
228
229int llvm::getSplatIndex(ArrayRef<int> Mask) {230int SplatIndex = -1;231for (int M : Mask) {232// Ignore invalid (undefined) mask elements.233if (M < 0)234continue;235
236// There can be only 1 non-negative mask element value if this is a splat.237if (SplatIndex != -1 && SplatIndex != M)238return -1;239
240// Initialize the splat index to the 1st non-negative mask element.241SplatIndex = M;242}243assert((SplatIndex == -1 || SplatIndex >= 0) && "Negative index?");244return SplatIndex;245}
246
247/// Get splat value if the input is a splat vector or return nullptr.
248/// This function is not fully general. It checks only 2 cases:
249/// the input value is (1) a splat constant vector or (2) a sequence
250/// of instructions that broadcasts a scalar at element 0.
251Value *llvm::getSplatValue(const Value *V) {252if (isa<VectorType>(V->getType()))253if (auto *C = dyn_cast<Constant>(V))254return C->getSplatValue();255
256// shuf (inselt ?, Splat, 0), ?, <0, undef, 0, ...>257Value *Splat;258if (match(V,259m_Shuffle(m_InsertElt(m_Value(), m_Value(Splat), m_ZeroInt()),260m_Value(), m_ZeroMask())))261return Splat;262
263return nullptr;264}
265
266bool llvm::isSplatValue(const Value *V, int Index, unsigned Depth) {267assert(Depth <= MaxAnalysisRecursionDepth && "Limit Search Depth");268
269if (isa<VectorType>(V->getType())) {270if (isa<UndefValue>(V))271return true;272// FIXME: We can allow undefs, but if Index was specified, we may want to273// check that the constant is defined at that index.274if (auto *C = dyn_cast<Constant>(V))275return C->getSplatValue() != nullptr;276}277
278if (auto *Shuf = dyn_cast<ShuffleVectorInst>(V)) {279// FIXME: We can safely allow undefs here. If Index was specified, we will280// check that the mask elt is defined at the required index.281if (!all_equal(Shuf->getShuffleMask()))282return false;283
284// Match any index.285if (Index == -1)286return true;287
288// Match a specific element. The mask should be defined at and match the289// specified index.290return Shuf->getMaskValue(Index) == Index;291}292
293// The remaining tests are all recursive, so bail out if we hit the limit.294if (Depth++ == MaxAnalysisRecursionDepth)295return false;296
297// If both operands of a binop are splats, the result is a splat.298Value *X, *Y, *Z;299if (match(V, m_BinOp(m_Value(X), m_Value(Y))))300return isSplatValue(X, Index, Depth) && isSplatValue(Y, Index, Depth);301
302// If all operands of a select are splats, the result is a splat.303if (match(V, m_Select(m_Value(X), m_Value(Y), m_Value(Z))))304return isSplatValue(X, Index, Depth) && isSplatValue(Y, Index, Depth) &&305isSplatValue(Z, Index, Depth);306
307// TODO: Add support for unary ops (fneg), casts, intrinsics (overflow ops).308
309return false;310}
311
312bool llvm::getShuffleDemandedElts(int SrcWidth, ArrayRef<int> Mask,313const APInt &DemandedElts, APInt &DemandedLHS,314APInt &DemandedRHS, bool AllowUndefElts) {315DemandedLHS = DemandedRHS = APInt::getZero(SrcWidth);316
317// Early out if we don't demand any elements.318if (DemandedElts.isZero())319return true;320
321// Simple case of a shuffle with zeroinitializer.322if (all_of(Mask, [](int Elt) { return Elt == 0; })) {323DemandedLHS.setBit(0);324return true;325}326
327for (unsigned I = 0, E = Mask.size(); I != E; ++I) {328int M = Mask[I];329assert((-1 <= M) && (M < (SrcWidth * 2)) &&330"Invalid shuffle mask constant");331
332if (!DemandedElts[I] || (AllowUndefElts && (M < 0)))333continue;334
335// For undef elements, we don't know anything about the common state of336// the shuffle result.337if (M < 0)338return false;339
340if (M < SrcWidth)341DemandedLHS.setBit(M);342else343DemandedRHS.setBit(M - SrcWidth);344}345
346return true;347}
348
349void llvm::narrowShuffleMaskElts(int Scale, ArrayRef<int> Mask,350SmallVectorImpl<int> &ScaledMask) {351assert(Scale > 0 && "Unexpected scaling factor");352
353// Fast-path: if no scaling, then it is just a copy.354if (Scale == 1) {355ScaledMask.assign(Mask.begin(), Mask.end());356return;357}358
359ScaledMask.clear();360for (int MaskElt : Mask) {361if (MaskElt >= 0) {362assert(((uint64_t)Scale * MaskElt + (Scale - 1)) <= INT32_MAX &&363"Overflowed 32-bits");364}365for (int SliceElt = 0; SliceElt != Scale; ++SliceElt)366ScaledMask.push_back(MaskElt < 0 ? MaskElt : Scale * MaskElt + SliceElt);367}368}
369
370bool llvm::widenShuffleMaskElts(int Scale, ArrayRef<int> Mask,371SmallVectorImpl<int> &ScaledMask) {372assert(Scale > 0 && "Unexpected scaling factor");373
374// Fast-path: if no scaling, then it is just a copy.375if (Scale == 1) {376ScaledMask.assign(Mask.begin(), Mask.end());377return true;378}379
380// We must map the original elements down evenly to a type with less elements.381int NumElts = Mask.size();382if (NumElts % Scale != 0)383return false;384
385ScaledMask.clear();386ScaledMask.reserve(NumElts / Scale);387
388// Step through the input mask by splitting into Scale-sized slices.389do {390ArrayRef<int> MaskSlice = Mask.take_front(Scale);391assert((int)MaskSlice.size() == Scale && "Expected Scale-sized slice.");392
393// The first element of the slice determines how we evaluate this slice.394int SliceFront = MaskSlice.front();395if (SliceFront < 0) {396// Negative values (undef or other "sentinel" values) must be equal across397// the entire slice.398if (!all_equal(MaskSlice))399return false;400ScaledMask.push_back(SliceFront);401} else {402// A positive mask element must be cleanly divisible.403if (SliceFront % Scale != 0)404return false;405// Elements of the slice must be consecutive.406for (int i = 1; i < Scale; ++i)407if (MaskSlice[i] != SliceFront + i)408return false;409ScaledMask.push_back(SliceFront / Scale);410}411Mask = Mask.drop_front(Scale);412} while (!Mask.empty());413
414assert((int)ScaledMask.size() * Scale == NumElts && "Unexpected scaled mask");415
416// All elements of the original mask can be scaled down to map to the elements417// of a mask with wider elements.418return true;419}
420
421bool llvm::scaleShuffleMaskElts(unsigned NumDstElts, ArrayRef<int> Mask,422SmallVectorImpl<int> &ScaledMask) {423unsigned NumSrcElts = Mask.size();424assert(NumSrcElts > 0 && NumDstElts > 0 && "Unexpected scaling factor");425
426// Fast-path: if no scaling, then it is just a copy.427if (NumSrcElts == NumDstElts) {428ScaledMask.assign(Mask.begin(), Mask.end());429return true;430}431
432// Ensure we can find a whole scale factor.433assert(((NumSrcElts % NumDstElts) == 0 || (NumDstElts % NumSrcElts) == 0) &&434"Unexpected scaling factor");435
436if (NumSrcElts > NumDstElts) {437int Scale = NumSrcElts / NumDstElts;438return widenShuffleMaskElts(Scale, Mask, ScaledMask);439}440
441int Scale = NumDstElts / NumSrcElts;442narrowShuffleMaskElts(Scale, Mask, ScaledMask);443return true;444}
445
446void llvm::getShuffleMaskWithWidestElts(ArrayRef<int> Mask,447SmallVectorImpl<int> &ScaledMask) {448std::array<SmallVector<int, 16>, 2> TmpMasks;449SmallVectorImpl<int> *Output = &TmpMasks[0], *Tmp = &TmpMasks[1];450ArrayRef<int> InputMask = Mask;451for (unsigned Scale = 2; Scale <= InputMask.size(); ++Scale) {452while (widenShuffleMaskElts(Scale, InputMask, *Output)) {453InputMask = *Output;454std::swap(Output, Tmp);455}456}457ScaledMask.assign(InputMask.begin(), InputMask.end());458}
459
460void llvm::processShuffleMasks(461ArrayRef<int> Mask, unsigned NumOfSrcRegs, unsigned NumOfDestRegs,462unsigned NumOfUsedRegs, function_ref<void()> NoInputAction,463function_ref<void(ArrayRef<int>, unsigned, unsigned)> SingleInputAction,464function_ref<void(ArrayRef<int>, unsigned, unsigned)> ManyInputsAction) {465SmallVector<SmallVector<SmallVector<int>>> Res(NumOfDestRegs);466// Try to perform better estimation of the permutation.467// 1. Split the source/destination vectors into real registers.468// 2. Do the mask analysis to identify which real registers are469// permuted.470int Sz = Mask.size();471unsigned SzDest = Sz / NumOfDestRegs;472unsigned SzSrc = Sz / NumOfSrcRegs;473for (unsigned I = 0; I < NumOfDestRegs; ++I) {474auto &RegMasks = Res[I];475RegMasks.assign(NumOfSrcRegs, {});476// Check that the values in dest registers are in the one src477// register.478for (unsigned K = 0; K < SzDest; ++K) {479int Idx = I * SzDest + K;480if (Idx == Sz)481break;482if (Mask[Idx] >= Sz || Mask[Idx] == PoisonMaskElem)483continue;484int SrcRegIdx = Mask[Idx] / SzSrc;485// Add a cost of PermuteTwoSrc for each new source register permute,486// if we have more than one source registers.487if (RegMasks[SrcRegIdx].empty())488RegMasks[SrcRegIdx].assign(SzDest, PoisonMaskElem);489RegMasks[SrcRegIdx][K] = Mask[Idx] % SzSrc;490}491}492// Process split mask.493for (unsigned I = 0; I < NumOfUsedRegs; ++I) {494auto &Dest = Res[I];495int NumSrcRegs =496count_if(Dest, [](ArrayRef<int> Mask) { return !Mask.empty(); });497switch (NumSrcRegs) {498case 0:499// No input vectors were used!500NoInputAction();501break;502case 1: {503// Find the only mask with at least single undef mask elem.504auto *It =505find_if(Dest, [](ArrayRef<int> Mask) { return !Mask.empty(); });506unsigned SrcReg = std::distance(Dest.begin(), It);507SingleInputAction(*It, SrcReg, I);508break;509}510default: {511// The first mask is a permutation of a single register. Since we have >2512// input registers to shuffle, we merge the masks for 2 first registers513// and generate a shuffle of 2 registers rather than the reordering of the514// first register and then shuffle with the second register. Next,515// generate the shuffles of the resulting register + the remaining516// registers from the list.517auto &&CombineMasks = [](MutableArrayRef<int> FirstMask,518ArrayRef<int> SecondMask) {519for (int Idx = 0, VF = FirstMask.size(); Idx < VF; ++Idx) {520if (SecondMask[Idx] != PoisonMaskElem) {521assert(FirstMask[Idx] == PoisonMaskElem &&522"Expected undefined mask element.");523FirstMask[Idx] = SecondMask[Idx] + VF;524}525}526};527auto &&NormalizeMask = [](MutableArrayRef<int> Mask) {528for (int Idx = 0, VF = Mask.size(); Idx < VF; ++Idx) {529if (Mask[Idx] != PoisonMaskElem)530Mask[Idx] = Idx;531}532};533int SecondIdx;534do {535int FirstIdx = -1;536SecondIdx = -1;537MutableArrayRef<int> FirstMask, SecondMask;538for (unsigned I = 0; I < NumOfDestRegs; ++I) {539SmallVectorImpl<int> &RegMask = Dest[I];540if (RegMask.empty())541continue;542
543if (FirstIdx == SecondIdx) {544FirstIdx = I;545FirstMask = RegMask;546continue;547}548SecondIdx = I;549SecondMask = RegMask;550CombineMasks(FirstMask, SecondMask);551ManyInputsAction(FirstMask, FirstIdx, SecondIdx);552NormalizeMask(FirstMask);553RegMask.clear();554SecondMask = FirstMask;555SecondIdx = FirstIdx;556}557if (FirstIdx != SecondIdx && SecondIdx >= 0) {558CombineMasks(SecondMask, FirstMask);559ManyInputsAction(SecondMask, SecondIdx, FirstIdx);560Dest[FirstIdx].clear();561NormalizeMask(SecondMask);562}563} while (SecondIdx >= 0);564break;565}566}567}568}
569
570MapVector<Instruction *, uint64_t>571llvm::computeMinimumValueSizes(ArrayRef<BasicBlock *> Blocks, DemandedBits &DB,572const TargetTransformInfo *TTI) {573
574// DemandedBits will give us every value's live-out bits. But we want575// to ensure no extra casts would need to be inserted, so every DAG576// of connected values must have the same minimum bitwidth.577EquivalenceClasses<Value *> ECs;578SmallVector<Value *, 16> Worklist;579SmallPtrSet<Value *, 4> Roots;580SmallPtrSet<Value *, 16> Visited;581DenseMap<Value *, uint64_t> DBits;582SmallPtrSet<Instruction *, 4> InstructionSet;583MapVector<Instruction *, uint64_t> MinBWs;584
585// Determine the roots. We work bottom-up, from truncs or icmps.586bool SeenExtFromIllegalType = false;587for (auto *BB : Blocks)588for (auto &I : *BB) {589InstructionSet.insert(&I);590
591if (TTI && (isa<ZExtInst>(&I) || isa<SExtInst>(&I)) &&592!TTI->isTypeLegal(I.getOperand(0)->getType()))593SeenExtFromIllegalType = true;594
595// Only deal with non-vector integers up to 64-bits wide.596if ((isa<TruncInst>(&I) || isa<ICmpInst>(&I)) &&597!I.getType()->isVectorTy() &&598I.getOperand(0)->getType()->getScalarSizeInBits() <= 64) {599// Don't make work for ourselves. If we know the loaded type is legal,600// don't add it to the worklist.601if (TTI && isa<TruncInst>(&I) && TTI->isTypeLegal(I.getType()))602continue;603
604Worklist.push_back(&I);605Roots.insert(&I);606}607}608// Early exit.609if (Worklist.empty() || (TTI && !SeenExtFromIllegalType))610return MinBWs;611
612// Now proceed breadth-first, unioning values together.613while (!Worklist.empty()) {614Value *Val = Worklist.pop_back_val();615Value *Leader = ECs.getOrInsertLeaderValue(Val);616
617if (!Visited.insert(Val).second)618continue;619
620// Non-instructions terminate a chain successfully.621if (!isa<Instruction>(Val))622continue;623Instruction *I = cast<Instruction>(Val);624
625// If we encounter a type that is larger than 64 bits, we can't represent626// it so bail out.627if (DB.getDemandedBits(I).getBitWidth() > 64)628return MapVector<Instruction *, uint64_t>();629
630uint64_t V = DB.getDemandedBits(I).getZExtValue();631DBits[Leader] |= V;632DBits[I] = V;633
634// Casts, loads and instructions outside of our range terminate a chain635// successfully.636if (isa<SExtInst>(I) || isa<ZExtInst>(I) || isa<LoadInst>(I) ||637!InstructionSet.count(I))638continue;639
640// Unsafe casts terminate a chain unsuccessfully. We can't do anything641// useful with bitcasts, ptrtoints or inttoptrs and it'd be unsafe to642// transform anything that relies on them.643if (isa<BitCastInst>(I) || isa<PtrToIntInst>(I) || isa<IntToPtrInst>(I) ||644!I->getType()->isIntegerTy()) {645DBits[Leader] |= ~0ULL;646continue;647}648
649// We don't modify the types of PHIs. Reductions will already have been650// truncated if possible, and inductions' sizes will have been chosen by651// indvars.652if (isa<PHINode>(I))653continue;654
655if (DBits[Leader] == ~0ULL)656// All bits demanded, no point continuing.657continue;658
659for (Value *O : cast<User>(I)->operands()) {660ECs.unionSets(Leader, O);661Worklist.push_back(O);662}663}664
665// Now we've discovered all values, walk them to see if there are666// any users we didn't see. If there are, we can't optimize that667// chain.668for (auto &I : DBits)669for (auto *U : I.first->users())670if (U->getType()->isIntegerTy() && DBits.count(U) == 0)671DBits[ECs.getOrInsertLeaderValue(I.first)] |= ~0ULL;672
673for (auto I = ECs.begin(), E = ECs.end(); I != E; ++I) {674uint64_t LeaderDemandedBits = 0;675for (Value *M : llvm::make_range(ECs.member_begin(I), ECs.member_end()))676LeaderDemandedBits |= DBits[M];677
678uint64_t MinBW = llvm::bit_width(LeaderDemandedBits);679// Round up to a power of 2680MinBW = llvm::bit_ceil(MinBW);681
682// We don't modify the types of PHIs. Reductions will already have been683// truncated if possible, and inductions' sizes will have been chosen by684// indvars.685// If we are required to shrink a PHI, abandon this entire equivalence class.686bool Abort = false;687for (Value *M : llvm::make_range(ECs.member_begin(I), ECs.member_end()))688if (isa<PHINode>(M) && MinBW < M->getType()->getScalarSizeInBits()) {689Abort = true;690break;691}692if (Abort)693continue;694
695for (Value *M : llvm::make_range(ECs.member_begin(I), ECs.member_end())) {696auto *MI = dyn_cast<Instruction>(M);697if (!MI)698continue;699Type *Ty = M->getType();700if (Roots.count(M))701Ty = MI->getOperand(0)->getType();702
703if (MinBW >= Ty->getScalarSizeInBits())704continue;705
706// If any of M's operands demand more bits than MinBW then M cannot be707// performed safely in MinBW.708if (any_of(MI->operands(), [&DB, MinBW](Use &U) {709auto *CI = dyn_cast<ConstantInt>(U);710// For constants shift amounts, check if the shift would result in711// poison.712if (CI &&713isa<ShlOperator, LShrOperator, AShrOperator>(U.getUser()) &&714U.getOperandNo() == 1)715return CI->uge(MinBW);716uint64_t BW = bit_width(DB.getDemandedBits(&U).getZExtValue());717return bit_ceil(BW) > MinBW;718}))719continue;720
721MinBWs[MI] = MinBW;722}723}724
725return MinBWs;726}
727
728/// Add all access groups in @p AccGroups to @p List.
729template <typename ListT>730static void addToAccessGroupList(ListT &List, MDNode *AccGroups) {731// Interpret an access group as a list containing itself.732if (AccGroups->getNumOperands() == 0) {733assert(isValidAsAccessGroup(AccGroups) && "Node must be an access group");734List.insert(AccGroups);735return;736}737
738for (const auto &AccGroupListOp : AccGroups->operands()) {739auto *Item = cast<MDNode>(AccGroupListOp.get());740assert(isValidAsAccessGroup(Item) && "List item must be an access group");741List.insert(Item);742}743}
744
745MDNode *llvm::uniteAccessGroups(MDNode *AccGroups1, MDNode *AccGroups2) {746if (!AccGroups1)747return AccGroups2;748if (!AccGroups2)749return AccGroups1;750if (AccGroups1 == AccGroups2)751return AccGroups1;752
753SmallSetVector<Metadata *, 4> Union;754addToAccessGroupList(Union, AccGroups1);755addToAccessGroupList(Union, AccGroups2);756
757if (Union.size() == 0)758return nullptr;759if (Union.size() == 1)760return cast<MDNode>(Union.front());761
762LLVMContext &Ctx = AccGroups1->getContext();763return MDNode::get(Ctx, Union.getArrayRef());764}
765
766MDNode *llvm::intersectAccessGroups(const Instruction *Inst1,767const Instruction *Inst2) {768bool MayAccessMem1 = Inst1->mayReadOrWriteMemory();769bool MayAccessMem2 = Inst2->mayReadOrWriteMemory();770
771if (!MayAccessMem1 && !MayAccessMem2)772return nullptr;773if (!MayAccessMem1)774return Inst2->getMetadata(LLVMContext::MD_access_group);775if (!MayAccessMem2)776return Inst1->getMetadata(LLVMContext::MD_access_group);777
778MDNode *MD1 = Inst1->getMetadata(LLVMContext::MD_access_group);779MDNode *MD2 = Inst2->getMetadata(LLVMContext::MD_access_group);780if (!MD1 || !MD2)781return nullptr;782if (MD1 == MD2)783return MD1;784
785// Use set for scalable 'contains' check.786SmallPtrSet<Metadata *, 4> AccGroupSet2;787addToAccessGroupList(AccGroupSet2, MD2);788
789SmallVector<Metadata *, 4> Intersection;790if (MD1->getNumOperands() == 0) {791assert(isValidAsAccessGroup(MD1) && "Node must be an access group");792if (AccGroupSet2.count(MD1))793Intersection.push_back(MD1);794} else {795for (const MDOperand &Node : MD1->operands()) {796auto *Item = cast<MDNode>(Node.get());797assert(isValidAsAccessGroup(Item) && "List item must be an access group");798if (AccGroupSet2.count(Item))799Intersection.push_back(Item);800}801}802
803if (Intersection.size() == 0)804return nullptr;805if (Intersection.size() == 1)806return cast<MDNode>(Intersection.front());807
808LLVMContext &Ctx = Inst1->getContext();809return MDNode::get(Ctx, Intersection);810}
811
812/// \returns \p I after propagating metadata from \p VL.
813Instruction *llvm::propagateMetadata(Instruction *Inst, ArrayRef<Value *> VL) {814if (VL.empty())815return Inst;816Instruction *I0 = cast<Instruction>(VL[0]);817SmallVector<std::pair<unsigned, MDNode *>, 4> Metadata;818I0->getAllMetadataOtherThanDebugLoc(Metadata);819
820for (auto Kind : {LLVMContext::MD_tbaa, LLVMContext::MD_alias_scope,821LLVMContext::MD_noalias, LLVMContext::MD_fpmath,822LLVMContext::MD_nontemporal, LLVMContext::MD_invariant_load,823LLVMContext::MD_access_group, LLVMContext::MD_mmra}) {824MDNode *MD = I0->getMetadata(Kind);825for (int J = 1, E = VL.size(); MD && J != E; ++J) {826const Instruction *IJ = cast<Instruction>(VL[J]);827MDNode *IMD = IJ->getMetadata(Kind);828
829switch (Kind) {830case LLVMContext::MD_mmra: {831MD = MMRAMetadata::combine(Inst->getContext(), MD, IMD);832break;833}834case LLVMContext::MD_tbaa:835MD = MDNode::getMostGenericTBAA(MD, IMD);836break;837case LLVMContext::MD_alias_scope:838MD = MDNode::getMostGenericAliasScope(MD, IMD);839break;840case LLVMContext::MD_fpmath:841MD = MDNode::getMostGenericFPMath(MD, IMD);842break;843case LLVMContext::MD_noalias:844case LLVMContext::MD_nontemporal:845case LLVMContext::MD_invariant_load:846MD = MDNode::intersect(MD, IMD);847break;848case LLVMContext::MD_access_group:849MD = intersectAccessGroups(Inst, IJ);850break;851default:852llvm_unreachable("unhandled metadata");853}854}855
856Inst->setMetadata(Kind, MD);857}858
859return Inst;860}
861
862Constant *863llvm::createBitMaskForGaps(IRBuilderBase &Builder, unsigned VF,864const InterleaveGroup<Instruction> &Group) {865// All 1's means mask is not needed.866if (Group.getNumMembers() == Group.getFactor())867return nullptr;868
869// TODO: support reversed access.870assert(!Group.isReverse() && "Reversed group not supported.");871
872SmallVector<Constant *, 16> Mask;873for (unsigned i = 0; i < VF; i++)874for (unsigned j = 0; j < Group.getFactor(); ++j) {875unsigned HasMember = Group.getMember(j) ? 1 : 0;876Mask.push_back(Builder.getInt1(HasMember));877}878
879return ConstantVector::get(Mask);880}
881
882llvm::SmallVector<int, 16>883llvm::createReplicatedMask(unsigned ReplicationFactor, unsigned VF) {884SmallVector<int, 16> MaskVec;885for (unsigned i = 0; i < VF; i++)886for (unsigned j = 0; j < ReplicationFactor; j++)887MaskVec.push_back(i);888
889return MaskVec;890}
891
892llvm::SmallVector<int, 16> llvm::createInterleaveMask(unsigned VF,893unsigned NumVecs) {894SmallVector<int, 16> Mask;895for (unsigned i = 0; i < VF; i++)896for (unsigned j = 0; j < NumVecs; j++)897Mask.push_back(j * VF + i);898
899return Mask;900}
901
902llvm::SmallVector<int, 16>903llvm::createStrideMask(unsigned Start, unsigned Stride, unsigned VF) {904SmallVector<int, 16> Mask;905for (unsigned i = 0; i < VF; i++)906Mask.push_back(Start + i * Stride);907
908return Mask;909}
910
911llvm::SmallVector<int, 16> llvm::createSequentialMask(unsigned Start,912unsigned NumInts,913unsigned NumUndefs) {914SmallVector<int, 16> Mask;915for (unsigned i = 0; i < NumInts; i++)916Mask.push_back(Start + i);917
918for (unsigned i = 0; i < NumUndefs; i++)919Mask.push_back(-1);920
921return Mask;922}
923
924llvm::SmallVector<int, 16> llvm::createUnaryMask(ArrayRef<int> Mask,925unsigned NumElts) {926// Avoid casts in the loop and make sure we have a reasonable number.927int NumEltsSigned = NumElts;928assert(NumEltsSigned > 0 && "Expected smaller or non-zero element count");929
930// If the mask chooses an element from operand 1, reduce it to choose from the931// corresponding element of operand 0. Undef mask elements are unchanged.932SmallVector<int, 16> UnaryMask;933for (int MaskElt : Mask) {934assert((MaskElt < NumEltsSigned * 2) && "Expected valid shuffle mask");935int UnaryElt = MaskElt >= NumEltsSigned ? MaskElt - NumEltsSigned : MaskElt;936UnaryMask.push_back(UnaryElt);937}938return UnaryMask;939}
940
941/// A helper function for concatenating vectors. This function concatenates two
942/// vectors having the same element type. If the second vector has fewer
943/// elements than the first, it is padded with undefs.
944static Value *concatenateTwoVectors(IRBuilderBase &Builder, Value *V1,945Value *V2) {946VectorType *VecTy1 = dyn_cast<VectorType>(V1->getType());947VectorType *VecTy2 = dyn_cast<VectorType>(V2->getType());948assert(VecTy1 && VecTy2 &&949VecTy1->getScalarType() == VecTy2->getScalarType() &&950"Expect two vectors with the same element type");951
952unsigned NumElts1 = cast<FixedVectorType>(VecTy1)->getNumElements();953unsigned NumElts2 = cast<FixedVectorType>(VecTy2)->getNumElements();954assert(NumElts1 >= NumElts2 && "Unexpect the first vector has less elements");955
956if (NumElts1 > NumElts2) {957// Extend with UNDEFs.958V2 = Builder.CreateShuffleVector(959V2, createSequentialMask(0, NumElts2, NumElts1 - NumElts2));960}961
962return Builder.CreateShuffleVector(963V1, V2, createSequentialMask(0, NumElts1 + NumElts2, 0));964}
965
966Value *llvm::concatenateVectors(IRBuilderBase &Builder,967ArrayRef<Value *> Vecs) {968unsigned NumVecs = Vecs.size();969assert(NumVecs > 1 && "Should be at least two vectors");970
971SmallVector<Value *, 8> ResList;972ResList.append(Vecs.begin(), Vecs.end());973do {974SmallVector<Value *, 8> TmpList;975for (unsigned i = 0; i < NumVecs - 1; i += 2) {976Value *V0 = ResList[i], *V1 = ResList[i + 1];977assert((V0->getType() == V1->getType() || i == NumVecs - 2) &&978"Only the last vector may have a different type");979
980TmpList.push_back(concatenateTwoVectors(Builder, V0, V1));981}982
983// Push the last vector if the total number of vectors is odd.984if (NumVecs % 2 != 0)985TmpList.push_back(ResList[NumVecs - 1]);986
987ResList = TmpList;988NumVecs = ResList.size();989} while (NumVecs > 1);990
991return ResList[0];992}
993
994bool llvm::maskIsAllZeroOrUndef(Value *Mask) {995assert(isa<VectorType>(Mask->getType()) &&996isa<IntegerType>(Mask->getType()->getScalarType()) &&997cast<IntegerType>(Mask->getType()->getScalarType())->getBitWidth() ==9981 &&999"Mask must be a vector of i1");1000
1001auto *ConstMask = dyn_cast<Constant>(Mask);1002if (!ConstMask)1003return false;1004if (ConstMask->isNullValue() || isa<UndefValue>(ConstMask))1005return true;1006if (isa<ScalableVectorType>(ConstMask->getType()))1007return false;1008for (unsigned1009I = 0,1010E = cast<FixedVectorType>(ConstMask->getType())->getNumElements();1011I != E; ++I) {1012if (auto *MaskElt = ConstMask->getAggregateElement(I))1013if (MaskElt->isNullValue() || isa<UndefValue>(MaskElt))1014continue;1015return false;1016}1017return true;1018}
1019
1020bool llvm::maskIsAllOneOrUndef(Value *Mask) {1021assert(isa<VectorType>(Mask->getType()) &&1022isa<IntegerType>(Mask->getType()->getScalarType()) &&1023cast<IntegerType>(Mask->getType()->getScalarType())->getBitWidth() ==10241 &&1025"Mask must be a vector of i1");1026
1027auto *ConstMask = dyn_cast<Constant>(Mask);1028if (!ConstMask)1029return false;1030if (ConstMask->isAllOnesValue() || isa<UndefValue>(ConstMask))1031return true;1032if (isa<ScalableVectorType>(ConstMask->getType()))1033return false;1034for (unsigned1035I = 0,1036E = cast<FixedVectorType>(ConstMask->getType())->getNumElements();1037I != E; ++I) {1038if (auto *MaskElt = ConstMask->getAggregateElement(I))1039if (MaskElt->isAllOnesValue() || isa<UndefValue>(MaskElt))1040continue;1041return false;1042}1043return true;1044}
1045
1046bool llvm::maskContainsAllOneOrUndef(Value *Mask) {1047assert(isa<VectorType>(Mask->getType()) &&1048isa<IntegerType>(Mask->getType()->getScalarType()) &&1049cast<IntegerType>(Mask->getType()->getScalarType())->getBitWidth() ==10501 &&1051"Mask must be a vector of i1");1052
1053auto *ConstMask = dyn_cast<Constant>(Mask);1054if (!ConstMask)1055return false;1056if (ConstMask->isAllOnesValue() || isa<UndefValue>(ConstMask))1057return true;1058if (isa<ScalableVectorType>(ConstMask->getType()))1059return false;1060for (unsigned1061I = 0,1062E = cast<FixedVectorType>(ConstMask->getType())->getNumElements();1063I != E; ++I) {1064if (auto *MaskElt = ConstMask->getAggregateElement(I))1065if (MaskElt->isAllOnesValue() || isa<UndefValue>(MaskElt))1066return true;1067}1068return false;1069}
1070
1071/// TODO: This is a lot like known bits, but for
1072/// vectors. Is there something we can common this with?
1073APInt llvm::possiblyDemandedEltsInMask(Value *Mask) {1074assert(isa<FixedVectorType>(Mask->getType()) &&1075isa<IntegerType>(Mask->getType()->getScalarType()) &&1076cast<IntegerType>(Mask->getType()->getScalarType())->getBitWidth() ==10771 &&1078"Mask must be a fixed width vector of i1");1079
1080const unsigned VWidth =1081cast<FixedVectorType>(Mask->getType())->getNumElements();1082APInt DemandedElts = APInt::getAllOnes(VWidth);1083if (auto *CV = dyn_cast<ConstantVector>(Mask))1084for (unsigned i = 0; i < VWidth; i++)1085if (CV->getAggregateElement(i)->isNullValue())1086DemandedElts.clearBit(i);1087return DemandedElts;1088}
1089
1090bool InterleavedAccessInfo::isStrided(int Stride) {1091unsigned Factor = std::abs(Stride);1092return Factor >= 2 && Factor <= MaxInterleaveGroupFactor;1093}
1094
1095void InterleavedAccessInfo::collectConstStrideAccesses(1096MapVector<Instruction *, StrideDescriptor> &AccessStrideInfo,1097const DenseMap<Value*, const SCEV*> &Strides) {1098auto &DL = TheLoop->getHeader()->getDataLayout();1099
1100// Since it's desired that the load/store instructions be maintained in1101// "program order" for the interleaved access analysis, we have to visit the1102// blocks in the loop in reverse postorder (i.e., in a topological order).1103// Such an ordering will ensure that any load/store that may be executed1104// before a second load/store will precede the second load/store in1105// AccessStrideInfo.1106LoopBlocksDFS DFS(TheLoop);1107DFS.perform(LI);1108for (BasicBlock *BB : make_range(DFS.beginRPO(), DFS.endRPO()))1109for (auto &I : *BB) {1110Value *Ptr = getLoadStorePointerOperand(&I);1111if (!Ptr)1112continue;1113Type *ElementTy = getLoadStoreType(&I);1114
1115// Currently, codegen doesn't support cases where the type size doesn't1116// match the alloc size. Skip them for now.1117uint64_t Size = DL.getTypeAllocSize(ElementTy);1118if (Size * 8 != DL.getTypeSizeInBits(ElementTy))1119continue;1120
1121// We don't check wrapping here because we don't know yet if Ptr will be1122// part of a full group or a group with gaps. Checking wrapping for all1123// pointers (even those that end up in groups with no gaps) will be overly1124// conservative. For full groups, wrapping should be ok since if we would1125// wrap around the address space we would do a memory access at nullptr1126// even without the transformation. The wrapping checks are therefore1127// deferred until after we've formed the interleaved groups.1128int64_t Stride =1129getPtrStride(PSE, ElementTy, Ptr, TheLoop, Strides,1130/*Assume=*/true, /*ShouldCheckWrap=*/false).value_or(0);1131
1132const SCEV *Scev = replaceSymbolicStrideSCEV(PSE, Strides, Ptr);1133AccessStrideInfo[&I] = StrideDescriptor(Stride, Scev, Size,1134getLoadStoreAlignment(&I));1135}1136}
1137
1138// Analyze interleaved accesses and collect them into interleaved load and
1139// store groups.
1140//
1141// When generating code for an interleaved load group, we effectively hoist all
1142// loads in the group to the location of the first load in program order. When
1143// generating code for an interleaved store group, we sink all stores to the
1144// location of the last store. This code motion can change the order of load
1145// and store instructions and may break dependences.
1146//
1147// The code generation strategy mentioned above ensures that we won't violate
1148// any write-after-read (WAR) dependences.
1149//
1150// E.g., for the WAR dependence: a = A[i]; // (1)
1151// A[i] = b; // (2)
1152//
1153// The store group of (2) is always inserted at or below (2), and the load
1154// group of (1) is always inserted at or above (1). Thus, the instructions will
1155// never be reordered. All other dependences are checked to ensure the
1156// correctness of the instruction reordering.
1157//
1158// The algorithm visits all memory accesses in the loop in bottom-up program
1159// order. Program order is established by traversing the blocks in the loop in
1160// reverse postorder when collecting the accesses.
1161//
1162// We visit the memory accesses in bottom-up order because it can simplify the
1163// construction of store groups in the presence of write-after-write (WAW)
1164// dependences.
1165//
1166// E.g., for the WAW dependence: A[i] = a; // (1)
1167// A[i] = b; // (2)
1168// A[i + 1] = c; // (3)
1169//
1170// We will first create a store group with (3) and (2). (1) can't be added to
1171// this group because it and (2) are dependent. However, (1) can be grouped
1172// with other accesses that may precede it in program order. Note that a
1173// bottom-up order does not imply that WAW dependences should not be checked.
1174void InterleavedAccessInfo::analyzeInterleaving(1175bool EnablePredicatedInterleavedMemAccesses) {1176LLVM_DEBUG(dbgs() << "LV: Analyzing interleaved accesses...\n");1177const auto &Strides = LAI->getSymbolicStrides();1178
1179// Holds all accesses with a constant stride.1180MapVector<Instruction *, StrideDescriptor> AccessStrideInfo;1181collectConstStrideAccesses(AccessStrideInfo, Strides);1182
1183if (AccessStrideInfo.empty())1184return;1185
1186// Collect the dependences in the loop.1187collectDependences();1188
1189// Holds all interleaved store groups temporarily.1190SmallSetVector<InterleaveGroup<Instruction> *, 4> StoreGroups;1191// Holds all interleaved load groups temporarily.1192SmallSetVector<InterleaveGroup<Instruction> *, 4> LoadGroups;1193// Groups added to this set cannot have new members added.1194SmallPtrSet<InterleaveGroup<Instruction> *, 4> CompletedLoadGroups;1195
1196// Search in bottom-up program order for pairs of accesses (A and B) that can1197// form interleaved load or store groups. In the algorithm below, access A1198// precedes access B in program order. We initialize a group for B in the1199// outer loop of the algorithm, and then in the inner loop, we attempt to1200// insert each A into B's group if:1201//1202// 1. A and B have the same stride,1203// 2. A and B have the same memory object size, and1204// 3. A belongs in B's group according to its distance from B.1205//1206// Special care is taken to ensure group formation will not break any1207// dependences.1208for (auto BI = AccessStrideInfo.rbegin(), E = AccessStrideInfo.rend();1209BI != E; ++BI) {1210Instruction *B = BI->first;1211StrideDescriptor DesB = BI->second;1212
1213// Initialize a group for B if it has an allowable stride. Even if we don't1214// create a group for B, we continue with the bottom-up algorithm to ensure1215// we don't break any of B's dependences.1216InterleaveGroup<Instruction> *GroupB = nullptr;1217if (isStrided(DesB.Stride) &&1218(!isPredicated(B->getParent()) || EnablePredicatedInterleavedMemAccesses)) {1219GroupB = getInterleaveGroup(B);1220if (!GroupB) {1221LLVM_DEBUG(dbgs() << "LV: Creating an interleave group with:" << *B1222<< '\n');1223GroupB = createInterleaveGroup(B, DesB.Stride, DesB.Alignment);1224if (B->mayWriteToMemory())1225StoreGroups.insert(GroupB);1226else1227LoadGroups.insert(GroupB);1228}1229}1230
1231for (auto AI = std::next(BI); AI != E; ++AI) {1232Instruction *A = AI->first;1233StrideDescriptor DesA = AI->second;1234
1235// Our code motion strategy implies that we can't have dependences1236// between accesses in an interleaved group and other accesses located1237// between the first and last member of the group. Note that this also1238// means that a group can't have more than one member at a given offset.1239// The accesses in a group can have dependences with other accesses, but1240// we must ensure we don't extend the boundaries of the group such that1241// we encompass those dependent accesses.1242//1243// For example, assume we have the sequence of accesses shown below in a1244// stride-2 loop:1245//1246// (1, 2) is a group | A[i] = a; // (1)1247// | A[i-1] = b; // (2) |1248// A[i-3] = c; // (3)1249// A[i] = d; // (4) | (2, 4) is not a group1250//1251// Because accesses (2) and (3) are dependent, we can group (2) with (1)1252// but not with (4). If we did, the dependent access (3) would be within1253// the boundaries of the (2, 4) group.1254auto DependentMember = [&](InterleaveGroup<Instruction> *Group,1255StrideEntry *A) -> Instruction * {1256for (uint32_t Index = 0; Index < Group->getFactor(); ++Index) {1257Instruction *MemberOfGroupB = Group->getMember(Index);1258if (MemberOfGroupB && !canReorderMemAccessesForInterleavedGroups(1259A, &*AccessStrideInfo.find(MemberOfGroupB)))1260return MemberOfGroupB;1261}1262return nullptr;1263};1264
1265auto GroupA = getInterleaveGroup(A);1266// If A is a load, dependencies are tolerable, there's nothing to do here.1267// If both A and B belong to the same (store) group, they are independent,1268// even if dependencies have not been recorded.1269// If both GroupA and GroupB are null, there's nothing to do here.1270if (A->mayWriteToMemory() && GroupA != GroupB) {1271Instruction *DependentInst = nullptr;1272// If GroupB is a load group, we have to compare AI against all1273// members of GroupB because if any load within GroupB has a dependency1274// on AI, we need to mark GroupB as complete and also release the1275// store GroupA (if A belongs to one). The former prevents incorrect1276// hoisting of load B above store A while the latter prevents incorrect1277// sinking of store A below load B.1278if (GroupB && LoadGroups.contains(GroupB))1279DependentInst = DependentMember(GroupB, &*AI);1280else if (!canReorderMemAccessesForInterleavedGroups(&*AI, &*BI))1281DependentInst = B;1282
1283if (DependentInst) {1284// A has a store dependence on B (or on some load within GroupB) and1285// is part of a store group. Release A's group to prevent illegal1286// sinking of A below B. A will then be free to form another group1287// with instructions that precede it.1288if (GroupA && StoreGroups.contains(GroupA)) {1289LLVM_DEBUG(dbgs() << "LV: Invalidated store group due to "1290"dependence between "1291<< *A << " and " << *DependentInst << '\n');1292StoreGroups.remove(GroupA);1293releaseGroup(GroupA);1294}1295// If B is a load and part of an interleave group, no earlier loads1296// can be added to B's interleave group, because this would mean the1297// DependentInst would move across store A. Mark the interleave group1298// as complete.1299if (GroupB && LoadGroups.contains(GroupB)) {1300LLVM_DEBUG(dbgs() << "LV: Marking interleave group for " << *B1301<< " as complete.\n");1302CompletedLoadGroups.insert(GroupB);1303}1304}1305}1306if (CompletedLoadGroups.contains(GroupB)) {1307// Skip trying to add A to B, continue to look for other conflicting A's1308// in groups to be released.1309continue;1310}1311
1312// At this point, we've checked for illegal code motion. If either A or B1313// isn't strided, there's nothing left to do.1314if (!isStrided(DesA.Stride) || !isStrided(DesB.Stride))1315continue;1316
1317// Ignore A if it's already in a group or isn't the same kind of memory1318// operation as B.1319// Note that mayReadFromMemory() isn't mutually exclusive to1320// mayWriteToMemory in the case of atomic loads. We shouldn't see those1321// here, canVectorizeMemory() should have returned false - except for the1322// case we asked for optimization remarks.1323if (isInterleaved(A) ||1324(A->mayReadFromMemory() != B->mayReadFromMemory()) ||1325(A->mayWriteToMemory() != B->mayWriteToMemory()))1326continue;1327
1328// Check rules 1 and 2. Ignore A if its stride or size is different from1329// that of B.1330if (DesA.Stride != DesB.Stride || DesA.Size != DesB.Size)1331continue;1332
1333// Ignore A if the memory object of A and B don't belong to the same1334// address space1335if (getLoadStoreAddressSpace(A) != getLoadStoreAddressSpace(B))1336continue;1337
1338// Calculate the distance from A to B.1339const SCEVConstant *DistToB = dyn_cast<SCEVConstant>(1340PSE.getSE()->getMinusSCEV(DesA.Scev, DesB.Scev));1341if (!DistToB)1342continue;1343int64_t DistanceToB = DistToB->getAPInt().getSExtValue();1344
1345// Check rule 3. Ignore A if its distance to B is not a multiple of the1346// size.1347if (DistanceToB % static_cast<int64_t>(DesB.Size))1348continue;1349
1350// All members of a predicated interleave-group must have the same predicate,1351// and currently must reside in the same BB.1352BasicBlock *BlockA = A->getParent();1353BasicBlock *BlockB = B->getParent();1354if ((isPredicated(BlockA) || isPredicated(BlockB)) &&1355(!EnablePredicatedInterleavedMemAccesses || BlockA != BlockB))1356continue;1357
1358// The index of A is the index of B plus A's distance to B in multiples1359// of the size.1360int IndexA =1361GroupB->getIndex(B) + DistanceToB / static_cast<int64_t>(DesB.Size);1362
1363// Try to insert A into B's group.1364if (GroupB->insertMember(A, IndexA, DesA.Alignment)) {1365LLVM_DEBUG(dbgs() << "LV: Inserted:" << *A << '\n'1366<< " into the interleave group with" << *B1367<< '\n');1368InterleaveGroupMap[A] = GroupB;1369
1370// Set the first load in program order as the insert position.1371if (A->mayReadFromMemory())1372GroupB->setInsertPos(A);1373}1374} // Iteration over A accesses.1375} // Iteration over B accesses.1376
1377auto InvalidateGroupIfMemberMayWrap = [&](InterleaveGroup<Instruction> *Group,1378int Index,1379std::string FirstOrLast) -> bool {1380Instruction *Member = Group->getMember(Index);1381assert(Member && "Group member does not exist");1382Value *MemberPtr = getLoadStorePointerOperand(Member);1383Type *AccessTy = getLoadStoreType(Member);1384if (getPtrStride(PSE, AccessTy, MemberPtr, TheLoop, Strides,1385/*Assume=*/false, /*ShouldCheckWrap=*/true).value_or(0))1386return false;1387LLVM_DEBUG(dbgs() << "LV: Invalidate candidate interleaved group due to "1388<< FirstOrLast1389<< " group member potentially pointer-wrapping.\n");1390releaseGroup(Group);1391return true;1392};1393
1394// Remove interleaved groups with gaps whose memory1395// accesses may wrap around. We have to revisit the getPtrStride analysis,1396// this time with ShouldCheckWrap=true, since collectConstStrideAccesses does1397// not check wrapping (see documentation there).1398// FORNOW we use Assume=false;1399// TODO: Change to Assume=true but making sure we don't exceed the threshold1400// of runtime SCEV assumptions checks (thereby potentially failing to1401// vectorize altogether).1402// Additional optional optimizations:1403// TODO: If we are peeling the loop and we know that the first pointer doesn't1404// wrap then we can deduce that all pointers in the group don't wrap.1405// This means that we can forcefully peel the loop in order to only have to1406// check the first pointer for no-wrap. When we'll change to use Assume=true1407// we'll only need at most one runtime check per interleaved group.1408for (auto *Group : LoadGroups) {1409// Case 1: A full group. Can Skip the checks; For full groups, if the wide1410// load would wrap around the address space we would do a memory access at1411// nullptr even without the transformation.1412if (Group->getNumMembers() == Group->getFactor())1413continue;1414
1415// Case 2: If first and last members of the group don't wrap this implies1416// that all the pointers in the group don't wrap.1417// So we check only group member 0 (which is always guaranteed to exist),1418// and group member Factor - 1; If the latter doesn't exist we rely on1419// peeling (if it is a non-reversed accsess -- see Case 3).1420if (InvalidateGroupIfMemberMayWrap(Group, 0, std::string("first")))1421continue;1422if (Group->getMember(Group->getFactor() - 1))1423InvalidateGroupIfMemberMayWrap(Group, Group->getFactor() - 1,1424std::string("last"));1425else {1426// Case 3: A non-reversed interleaved load group with gaps: We need1427// to execute at least one scalar epilogue iteration. This will ensure1428// we don't speculatively access memory out-of-bounds. We only need1429// to look for a member at index factor - 1, since every group must have1430// a member at index zero.1431if (Group->isReverse()) {1432LLVM_DEBUG(1433dbgs() << "LV: Invalidate candidate interleaved group due to "1434"a reverse access with gaps.\n");1435releaseGroup(Group);1436continue;1437}1438LLVM_DEBUG(1439dbgs() << "LV: Interleaved group requires epilogue iteration.\n");1440RequiresScalarEpilogue = true;1441}1442}1443
1444for (auto *Group : StoreGroups) {1445// Case 1: A full group. Can Skip the checks; For full groups, if the wide1446// store would wrap around the address space we would do a memory access at1447// nullptr even without the transformation.1448if (Group->getNumMembers() == Group->getFactor())1449continue;1450
1451// Interleave-store-group with gaps is implemented using masked wide store.1452// Remove interleaved store groups with gaps if1453// masked-interleaved-accesses are not enabled by the target.1454if (!EnablePredicatedInterleavedMemAccesses) {1455LLVM_DEBUG(1456dbgs() << "LV: Invalidate candidate interleaved store group due "1457"to gaps.\n");1458releaseGroup(Group);1459continue;1460}1461
1462// Case 2: If first and last members of the group don't wrap this implies1463// that all the pointers in the group don't wrap.1464// So we check only group member 0 (which is always guaranteed to exist),1465// and the last group member. Case 3 (scalar epilog) is not relevant for1466// stores with gaps, which are implemented with masked-store (rather than1467// speculative access, as in loads).1468if (InvalidateGroupIfMemberMayWrap(Group, 0, std::string("first")))1469continue;1470for (int Index = Group->getFactor() - 1; Index > 0; Index--)1471if (Group->getMember(Index)) {1472InvalidateGroupIfMemberMayWrap(Group, Index, std::string("last"));1473break;1474}1475}1476}
1477
1478void InterleavedAccessInfo::invalidateGroupsRequiringScalarEpilogue() {1479// If no group had triggered the requirement to create an epilogue loop,1480// there is nothing to do.1481if (!requiresScalarEpilogue())1482return;1483
1484// Release groups requiring scalar epilogues. Note that this also removes them1485// from InterleaveGroups.1486bool ReleasedGroup = InterleaveGroups.remove_if([&](auto *Group) {1487if (!Group->requiresScalarEpilogue())1488return false;1489LLVM_DEBUG(1490dbgs()1491<< "LV: Invalidate candidate interleaved group due to gaps that "1492"require a scalar epilogue (not allowed under optsize) and cannot "1493"be masked (not enabled). \n");1494releaseGroupWithoutRemovingFromSet(Group);1495return true;1496});1497assert(ReleasedGroup && "At least one group must be invalidated, as a "1498"scalar epilogue was required");1499(void)ReleasedGroup;1500RequiresScalarEpilogue = false;1501}
1502
1503template <typename InstT>1504void InterleaveGroup<InstT>::addMetadata(InstT *NewInst) const {1505llvm_unreachable("addMetadata can only be used for Instruction");1506}
1507
1508namespace llvm {1509template <>1510void InterleaveGroup<Instruction>::addMetadata(Instruction *NewInst) const {1511SmallVector<Value *, 4> VL;1512std::transform(Members.begin(), Members.end(), std::back_inserter(VL),1513[](std::pair<int, Instruction *> p) { return p.second; });1514propagateMetadata(NewInst, VL);1515}
1516} // namespace llvm1517