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* Copyright (c) 2007, 2024, Oracle and/or its affiliates. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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#include "precompiled.hpp"
25
#include "memory/allocation.inline.hpp"
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#include "opto/connode.hpp"
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#include "opto/mulnode.hpp"
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#include "opto/subnode.hpp"
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#include "opto/vectornode.hpp"
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#include "opto/convertnode.hpp"
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#include "utilities/powerOfTwo.hpp"
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#include "utilities/globalDefinitions.hpp"
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//------------------------------VectorNode--------------------------------------
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// Return the vector operator for the specified scalar operation
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int VectorNode::opcode(int sopc, BasicType bt) {
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case T_BYTE: return Op_AddVB;
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case T_SHORT: return Op_AddVS;
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case T_INT: return Op_AddVI;
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case Op_AddL: return (bt == T_LONG ? Op_AddVL : 0);
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case Op_AddF: return (bt == T_FLOAT ? Op_AddVF : 0);
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case Op_AddD: return (bt == T_DOUBLE ? Op_AddVD : 0);
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case T_BYTE: return Op_SubVB;
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case T_SHORT: return Op_SubVS;
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case T_INT: return Op_SubVI;
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case Op_SubL: return (bt == T_LONG ? Op_SubVL : 0);
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case Op_SubF: return (bt == T_FLOAT ? Op_SubVF : 0);
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case Op_SubD: return (bt == T_DOUBLE ? Op_SubVD : 0);
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case T_BOOLEAN:return 0;
69
case T_BYTE: return Op_MulVB;
71
case T_SHORT: return Op_MulVS;
72
case T_INT: return Op_MulVI;
75
case Op_MulL: return (bt == T_LONG ? Op_MulVL : 0);
77
return (bt == T_FLOAT ? Op_MulVF : 0);
79
return (bt == T_DOUBLE ? Op_MulVD : 0);
81
return (bt == T_DOUBLE ? Op_FmaVD : 0);
83
return (bt == T_FLOAT ? Op_FmaVF : 0);
85
return (bt == T_FLOAT ? Op_VectorBlend : 0);
87
return (bt == T_DOUBLE ? Op_VectorBlend : 0);
89
return Op_VectorMaskCmp;
91
return (bt == T_FLOAT ? Op_DivVF : 0);
93
return (bt == T_DOUBLE ? Op_DivVD : 0);
97
case T_CHAR: return 0; // abs does not make sense for unsigned
98
case T_BYTE: return Op_AbsVB;
99
case T_SHORT: return Op_AbsVS;
100
case T_INT: return Op_AbsVI;
104
return (bt == T_LONG ? Op_AbsVL : 0);
108
case T_CHAR: return 0;
111
case T_INT: return Op_MinV;
115
return (bt == T_LONG ? Op_MinV : 0);
117
return (bt == T_FLOAT ? Op_MinV : 0);
119
return (bt == T_DOUBLE ? Op_MinV : 0);
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case T_CHAR: return 0;
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case T_INT: return Op_MaxV;
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return (bt == T_LONG ? Op_MaxV : 0);
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return (bt == T_FLOAT ? Op_MaxV : 0);
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return (bt == T_DOUBLE ? Op_MaxV : 0);
136
return (bt == T_FLOAT ? Op_AbsVF : 0);
138
return (bt == T_DOUBLE ? Op_AbsVD : 0);
143
case T_INT: return Op_NegVI;
147
return (bt == T_LONG ? Op_NegVL : 0);
149
return (bt == T_FLOAT ? Op_NegVF : 0);
151
return (bt == T_DOUBLE ? Op_NegVD : 0);
152
case Op_RoundDoubleMode:
153
return (bt == T_DOUBLE ? Op_RoundDoubleModeV : 0);
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return (is_integral_type(bt) ? Op_RotateLeftV : 0);
157
return (is_integral_type(bt) ? Op_RotateRightV : 0);
159
return (bt == T_FLOAT ? Op_SqrtVF : 0);
161
return (bt == T_DOUBLE ? Op_SqrtVD : 0);
163
return (bt == T_INT ? Op_RoundVF : 0);
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return (bt == T_LONG ? Op_RoundVD : 0);
167
return Op_PopCountVI;
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return Op_PopCountVL;
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return (is_integral_type(bt) ? Op_ReverseV : 0);
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case Op_ReverseBytesS:
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case Op_ReverseBytesUS:
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// Subword operations in auto vectorization usually don't have precise info
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// about signedness. But the behavior of reverseBytes for short and
177
// char are exactly the same.
178
return ((bt == T_SHORT || bt == T_CHAR) ? Op_ReverseBytesV : 0);
179
case Op_ReverseBytesI:
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// There is no reverseBytes() in Byte class but T_BYTE may appear
181
// in VectorAPI calls. We still use ReverseBytesI for T_BYTE to
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// ensure vector intrinsification succeeds.
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return ((bt == T_INT || bt == T_BYTE) ? Op_ReverseBytesV : 0);
184
case Op_ReverseBytesL:
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return (bt == T_LONG ? Op_ReverseBytesV : 0);
186
case Op_CompressBits:
187
return (bt == T_INT || bt == T_LONG ? Op_CompressBitsV : 0);
189
return (bt == T_INT || bt == T_LONG ? Op_ExpandBitsV : 0);
193
case T_BYTE: return Op_LShiftVB;
195
case T_SHORT: return Op_LShiftVS;
196
case T_INT: return Op_LShiftVI;
200
return (bt == T_LONG ? Op_LShiftVL : 0);
203
case T_BOOLEAN:return Op_URShiftVB; // boolean is unsigned value
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case T_CHAR: return Op_URShiftVS; // char is unsigned value
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case T_BYTE: return Op_RShiftVB;
206
case T_SHORT: return Op_RShiftVS;
207
case T_INT: return Op_RShiftVI;
211
return (bt == T_LONG ? Op_RShiftVL : 0);
213
return (bt == T_BYTE ? Op_URShiftVB : 0);
215
return (bt == T_SHORT ? Op_URShiftVS : 0);
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case T_BOOLEAN:return Op_URShiftVB;
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case T_CHAR: return Op_URShiftVS;
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case T_SHORT: return 0; // Vector logical right shift for signed short
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// values produces incorrect Java result for
223
// negative data because java code should convert
224
// a short value into int value with sign
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// extension before a shift.
226
case T_INT: return Op_URShiftVI;
230
return (bt == T_LONG ? Op_URShiftVL : 0);
249
return Op_LoadVector;
257
return Op_StoreVector;
259
return Op_MulAddVS2VI;
260
case Op_CountLeadingZerosI:
261
case Op_CountLeadingZerosL:
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return Op_CountLeadingZerosV;
263
case Op_CountTrailingZerosI:
264
case Op_CountTrailingZerosL:
265
return Op_CountTrailingZerosV;
272
assert(!VectorNode::is_convert_opcode(sopc),
273
"Convert node %s should be processed by VectorCastNode::opcode()",
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NodeClassNames[sopc]);
275
return 0; // Unimplemented
279
// Return the scalar opcode for the specified vector opcode
281
int VectorNode::scalar_opcode(int sopc, BasicType bt) {
283
case Op_AddReductionVI:
286
case Op_AddReductionVL:
289
case Op_MulReductionVI:
292
case Op_MulReductionVL:
295
case Op_AndReductionV:
307
assert(false, "basic type not handled");
310
case Op_OrReductionV:
322
assert(false, "basic type not handled");
325
case Op_XorReductionV:
337
assert(false, "basic type not handled");
340
case Op_MinReductionV:
345
assert(false, "boolean and char are signed, not implemented for Min");
358
assert(false, "basic type not handled");
361
case Op_MaxReductionV:
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assert(false, "boolean and char are signed, not implemented for Max");
379
assert(false, "basic type not handled");
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"Vector node %s is not handled in VectorNode::scalar_opcode",
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NodeClassNames[sopc]);
386
return 0; // Unimplemented
390
// Limits on vector size (number of elements) for auto-vectorization.
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bool VectorNode::vector_size_supported_auto_vectorization(const BasicType bt, int size) {
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return Matcher::max_vector_size_auto_vectorization(bt) >= size &&
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Matcher::min_vector_size(bt) <= size;
396
// Also used to check if the code generator
397
// supports the vector operation.
398
bool VectorNode::implemented(int opc, uint vlen, BasicType bt) {
399
if (is_java_primitive(bt) &&
400
(vlen > 1) && is_power_of_2(vlen) &&
401
vector_size_supported_auto_vectorization(bt, vlen)) {
402
int vopc = VectorNode::opcode(opc, bt);
403
// For rotate operation we will do a lazy de-generation into
404
// OrV/LShiftV/URShiftV pattern if the target does not support
405
// vector rotation instruction.
406
if (VectorNode::is_vector_rotate(vopc)) {
407
return is_vector_rotate_supported(vopc, vlen, bt);
409
if (VectorNode::is_vector_integral_negate(vopc)) {
410
return is_vector_integral_negate_supported(vopc, vlen, bt, false);
412
return vopc > 0 && Matcher::match_rule_supported_auto_vectorization(vopc, vlen, bt);
417
bool VectorNode::is_muladds2i(const Node* n) {
418
return n->Opcode() == Op_MulAddS2I;
421
bool VectorNode::is_roundopD(Node* n) {
422
return n->Opcode() == Op_RoundDoubleMode;
425
bool VectorNode::is_vector_rotate_supported(int vopc, uint vlen, BasicType bt) {
426
assert(VectorNode::is_vector_rotate(vopc), "wrong opcode");
428
// If target defines vector rotation patterns then no
429
// need for degeneration.
430
if (Matcher::match_rule_supported_vector(vopc, vlen, bt)) {
434
// If target does not support variable shift operations then no point
435
// in creating a rotate vector node since it will not be disintegratable.
436
// Adding a pessimistic check to avoid complex pattern matching which
437
// may not be full proof.
438
if (!Matcher::supports_vector_variable_shifts()) {
442
// Validate existence of nodes created in case of rotate degeneration.
445
return Matcher::match_rule_supported_vector(Op_OrV, vlen, bt) &&
446
Matcher::match_rule_supported_vector(Op_LShiftVI, vlen, bt) &&
447
Matcher::match_rule_supported_vector(Op_URShiftVI, vlen, bt);
449
return Matcher::match_rule_supported_vector(Op_OrV, vlen, bt) &&
450
Matcher::match_rule_supported_vector(Op_LShiftVL, vlen, bt) &&
451
Matcher::match_rule_supported_vector(Op_URShiftVL, vlen, bt);
457
// Check whether the architecture supports the vector negate instructions. If not, then check
458
// whether the alternative vector nodes used to implement vector negation are supported.
459
// Return false if neither of them is supported.
460
bool VectorNode::is_vector_integral_negate_supported(int opc, uint vlen, BasicType bt, bool use_predicate) {
461
if (!use_predicate) {
462
// Check whether the NegVI/L is supported by the architecture.
463
if (Matcher::match_rule_supported_vector(opc, vlen, bt)) {
466
// Negate is implemented with "(SubVI/L (ReplicateI/L 0) src)", if NegVI/L is not supported.
467
int sub_opc = (bt == T_LONG) ? Op_SubL : Op_SubI;
468
if (Matcher::match_rule_supported_vector(VectorNode::opcode(sub_opc, bt), vlen, bt) &&
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Matcher::match_rule_supported_vector(Op_Replicate, vlen, bt)) {
473
// Check whether the predicated NegVI/L is supported by the architecture.
474
if (Matcher::match_rule_supported_vector_masked(opc, vlen, bt)) {
477
// Predicated negate is implemented with "(AddVI/L (XorV src (ReplicateI/L -1)) (ReplicateI/L 1))",
478
// if predicated NegVI/L is not supported.
479
int add_opc = (bt == T_LONG) ? Op_AddL : Op_AddI;
480
if (Matcher::match_rule_supported_vector_masked(Op_XorV, vlen, bt) &&
481
Matcher::match_rule_supported_vector_masked(VectorNode::opcode(add_opc, bt), vlen, bt) &&
482
Matcher::match_rule_supported_vector(Op_Replicate, vlen, bt)) {
489
bool VectorNode::is_populate_index_supported(BasicType bt) {
490
int vlen = Matcher::max_vector_size(bt);
491
return Matcher::match_rule_supported_vector(Op_PopulateIndex, vlen, bt);
494
bool VectorNode::is_shift_opcode(int opc) {
510
// Vector unsigned right shift for signed subword types behaves differently
511
// from Java Spec. But when the shift amount is a constant not greater than
512
// the number of sign extended bits, the unsigned right shift can be
513
// vectorized to a signed right shift.
514
bool VectorNode::can_use_RShiftI_instead_of_URShiftI(Node* n, BasicType bt) {
515
if (n->Opcode() != Op_URShiftI) {
518
Node* in2 = n->in(2);
519
if (!in2->is_Con()) {
522
jint cnt = in2->get_int();
523
// Only when shift amount is not greater than number of sign extended
524
// bits (16 for short and 24 for byte), unsigned shift right on signed
525
// subword types can be vectorized as vector signed shift.
526
if ((bt == T_BYTE && cnt <= 24) || (bt == T_SHORT && cnt <= 16)) {
532
bool VectorNode::is_convert_opcode(int opc) {
554
bool VectorNode::is_minmax_opcode(int opc) {
555
return opc == Op_MinI || opc == Op_MaxI;
558
bool VectorNode::is_shift(Node* n) {
559
return is_shift_opcode(n->Opcode());
562
bool VectorNode::is_rotate_opcode(int opc) {
572
bool VectorNode::is_scalar_rotate(Node* n) {
573
return is_rotate_opcode(n->Opcode());
576
bool VectorNode::is_vshift_cnt_opcode(int opc) {
586
bool VectorNode::is_vshift_cnt(Node* n) {
587
return is_vshift_cnt_opcode(n->Opcode());
590
// [Start, end) half-open range defining which operands are vectors
591
void VectorNode::vector_operands(Node* n, uint* start, uint* end) {
592
switch (n->Opcode()) {
593
case Op_LoadB: case Op_LoadUB:
594
case Op_LoadS: case Op_LoadUS:
595
case Op_LoadI: case Op_LoadL:
596
case Op_LoadF: case Op_LoadD:
597
case Op_LoadP: case Op_LoadN:
599
*end = 0; // no vector operands
601
case Op_StoreB: case Op_StoreC:
602
case Op_StoreI: case Op_StoreL:
603
case Op_StoreF: case Op_StoreD:
604
case Op_StoreP: case Op_StoreN:
605
*start = MemNode::ValueIn;
606
*end = MemNode::ValueIn + 1; // 1 vector operand
608
case Op_LShiftI: case Op_LShiftL:
609
case Op_RShiftI: case Op_RShiftL:
610
case Op_URShiftI: case Op_URShiftL:
611
case Op_RoundDoubleMode:
613
*end = 2; // 1 vector operand
617
// Rotate shift could have 1 or 2 vector operand(s), depending on
618
// whether shift distance is a supported constant or not.
620
*end = (n->is_Con() && Matcher::supports_vector_constant_rotates(n->get_int())) ? 2 : 3;
622
case Op_AddI: case Op_AddL: case Op_AddF: case Op_AddD:
623
case Op_SubI: case Op_SubL: case Op_SubF: case Op_SubD:
624
case Op_MulI: case Op_MulL: case Op_MulF: case Op_MulD:
625
case Op_DivF: case Op_DivD:
626
case Op_AndI: case Op_AndL:
627
case Op_OrI: case Op_OrL:
628
case Op_XorI: case Op_XorL:
631
*end = 3; // 2 vector operands
636
*end = 4; // 3 vector operands
640
*end = n->req(); // default is all operands
644
VectorNode* VectorNode::make_mask_node(int vopc, Node* n1, Node* n2, uint vlen, BasicType bt) {
645
guarantee(vopc > 0, "vopc must be > 0");
646
const TypeVect* vmask_type = TypeVect::makemask(bt, vlen);
649
if (Matcher::match_rule_supported_vector_masked(Op_AndVMask, vlen, bt)) {
650
return new AndVMaskNode(n1, n2, vmask_type);
652
return new AndVNode(n1, n2, vmask_type);
654
if (Matcher::match_rule_supported_vector_masked(Op_OrVMask, vlen, bt)) {
655
return new OrVMaskNode(n1, n2, vmask_type);
657
return new OrVNode(n1, n2, vmask_type);
659
if (Matcher::match_rule_supported_vector_masked(Op_XorVMask, vlen, bt)) {
660
return new XorVMaskNode(n1, n2, vmask_type);
662
return new XorVNode(n1, n2, vmask_type);
664
fatal("Unsupported mask vector creation for '%s'", NodeClassNames[vopc]);
669
// Make a vector node for binary operation
670
VectorNode* VectorNode::make(int vopc, Node* n1, Node* n2, const TypeVect* vt, bool is_mask, bool is_var_shift) {
671
// This method should not be called for unimplemented vectors.
672
guarantee(vopc > 0, "vopc must be > 0");
675
return make_mask_node(vopc, n1, n2, vt->length(), vt->element_basic_type());
679
case Op_AddVB: return new AddVBNode(n1, n2, vt);
680
case Op_AddVS: return new AddVSNode(n1, n2, vt);
681
case Op_AddVI: return new AddVINode(n1, n2, vt);
682
case Op_AddVL: return new AddVLNode(n1, n2, vt);
683
case Op_AddVF: return new AddVFNode(n1, n2, vt);
684
case Op_AddVD: return new AddVDNode(n1, n2, vt);
686
case Op_SubVB: return new SubVBNode(n1, n2, vt);
687
case Op_SubVS: return new SubVSNode(n1, n2, vt);
688
case Op_SubVI: return new SubVINode(n1, n2, vt);
689
case Op_SubVL: return new SubVLNode(n1, n2, vt);
690
case Op_SubVF: return new SubVFNode(n1, n2, vt);
691
case Op_SubVD: return new SubVDNode(n1, n2, vt);
693
case Op_MulVB: return new MulVBNode(n1, n2, vt);
694
case Op_MulVS: return new MulVSNode(n1, n2, vt);
695
case Op_MulVI: return new MulVINode(n1, n2, vt);
696
case Op_MulVL: return new MulVLNode(n1, n2, vt);
697
case Op_MulVF: return new MulVFNode(n1, n2, vt);
698
case Op_MulVD: return new MulVDNode(n1, n2, vt);
700
case Op_DivVF: return new DivVFNode(n1, n2, vt);
701
case Op_DivVD: return new DivVDNode(n1, n2, vt);
703
case Op_MinV: return new MinVNode(n1, n2, vt);
704
case Op_MaxV: return new MaxVNode(n1, n2, vt);
706
case Op_AbsVF: return new AbsVFNode(n1, vt);
707
case Op_AbsVD: return new AbsVDNode(n1, vt);
708
case Op_AbsVB: return new AbsVBNode(n1, vt);
709
case Op_AbsVS: return new AbsVSNode(n1, vt);
710
case Op_AbsVI: return new AbsVINode(n1, vt);
711
case Op_AbsVL: return new AbsVLNode(n1, vt);
713
case Op_NegVI: return new NegVINode(n1, vt);
714
case Op_NegVL: return new NegVLNode(n1, vt);
715
case Op_NegVF: return new NegVFNode(n1, vt);
716
case Op_NegVD: return new NegVDNode(n1, vt);
718
case Op_ReverseV: return new ReverseVNode(n1, vt);
719
case Op_ReverseBytesV: return new ReverseBytesVNode(n1, vt);
721
case Op_SqrtVF: return new SqrtVFNode(n1, vt);
722
case Op_SqrtVD: return new SqrtVDNode(n1, vt);
724
case Op_RoundVF: return new RoundVFNode(n1, vt);
725
case Op_RoundVD: return new RoundVDNode(n1, vt);
727
case Op_PopCountVI: return new PopCountVINode(n1, vt);
728
case Op_PopCountVL: return new PopCountVLNode(n1, vt);
729
case Op_RotateLeftV: return new RotateLeftVNode(n1, n2, vt);
730
case Op_RotateRightV: return new RotateRightVNode(n1, n2, vt);
732
case Op_LShiftVB: return new LShiftVBNode(n1, n2, vt, is_var_shift);
733
case Op_LShiftVS: return new LShiftVSNode(n1, n2, vt, is_var_shift);
734
case Op_LShiftVI: return new LShiftVINode(n1, n2, vt, is_var_shift);
735
case Op_LShiftVL: return new LShiftVLNode(n1, n2, vt, is_var_shift);
737
case Op_RShiftVB: return new RShiftVBNode(n1, n2, vt, is_var_shift);
738
case Op_RShiftVS: return new RShiftVSNode(n1, n2, vt, is_var_shift);
739
case Op_RShiftVI: return new RShiftVINode(n1, n2, vt, is_var_shift);
740
case Op_RShiftVL: return new RShiftVLNode(n1, n2, vt, is_var_shift);
742
case Op_URShiftVB: return new URShiftVBNode(n1, n2, vt, is_var_shift);
743
case Op_URShiftVS: return new URShiftVSNode(n1, n2, vt, is_var_shift);
744
case Op_URShiftVI: return new URShiftVINode(n1, n2, vt, is_var_shift);
745
case Op_URShiftVL: return new URShiftVLNode(n1, n2, vt, is_var_shift);
747
case Op_AndV: return new AndVNode(n1, n2, vt);
748
case Op_OrV: return new OrVNode (n1, n2, vt);
749
case Op_XorV: return new XorVNode(n1, n2, vt);
751
case Op_RoundDoubleModeV: return new RoundDoubleModeVNode(n1, n2, vt);
753
case Op_MulAddVS2VI: return new MulAddVS2VINode(n1, n2, vt);
755
case Op_ExpandV: return new ExpandVNode(n1, n2, vt);
756
case Op_CompressV: return new CompressVNode(n1, n2, vt);
757
case Op_CompressM: assert(n1 == nullptr, ""); return new CompressMNode(n2, vt);
758
case Op_CompressBitsV: return new CompressBitsVNode(n1, n2, vt);
759
case Op_ExpandBitsV: return new ExpandBitsVNode(n1, n2, vt);
760
case Op_CountLeadingZerosV: return new CountLeadingZerosVNode(n1, vt);
761
case Op_CountTrailingZerosV: return new CountTrailingZerosVNode(n1, vt);
763
fatal("Missed vector creation for '%s'", NodeClassNames[vopc]);
768
// Return the vector version of a scalar binary operation node.
769
VectorNode* VectorNode::make(int opc, Node* n1, Node* n2, uint vlen, BasicType bt, bool is_var_shift) {
770
const TypeVect* vt = TypeVect::make(bt, vlen);
771
int vopc = VectorNode::opcode(opc, bt);
772
// This method should not be called for unimplemented vectors.
773
guarantee(vopc > 0, "Vector for '%s' is not implemented", NodeClassNames[opc]);
774
return make(vopc, n1, n2, vt, false, is_var_shift);
777
// Make a vector node for ternary operation
778
VectorNode* VectorNode::make(int vopc, Node* n1, Node* n2, Node* n3, const TypeVect* vt) {
779
// This method should not be called for unimplemented vectors.
780
guarantee(vopc > 0, "vopc must be > 0");
782
case Op_FmaVD: return new FmaVDNode(n1, n2, n3, vt);
783
case Op_FmaVF: return new FmaVFNode(n1, n2, n3, vt);
784
case Op_SignumVD: return new SignumVDNode(n1, n2, n3, vt);
785
case Op_SignumVF: return new SignumVFNode(n1, n2, n3, vt);
787
fatal("Missed vector creation for '%s'", NodeClassNames[vopc]);
792
// Return the vector version of a scalar ternary operation node.
793
VectorNode* VectorNode::make(int opc, Node* n1, Node* n2, Node* n3, uint vlen, BasicType bt) {
794
const TypeVect* vt = TypeVect::make(bt, vlen);
795
int vopc = VectorNode::opcode(opc, bt);
796
// This method should not be called for unimplemented vectors.
797
guarantee(vopc > 0, "Vector for '%s' is not implemented", NodeClassNames[opc]);
798
return make(vopc, n1, n2, n3, vt);
802
VectorNode* VectorNode::scalar2vector(Node* s, uint vlen, const Type* opd_t, bool is_mask) {
803
BasicType bt = opd_t->array_element_basic_type();
804
if (is_mask && Matcher::match_rule_supported_vector(Op_MaskAll, vlen, bt)) {
805
const TypeVect* vt = TypeVect::make(opd_t, vlen, true);
806
return new MaskAllNode(s, vt);
809
const TypeVect* vt = opd_t->singleton() ? TypeVect::make(opd_t, vlen)
810
: TypeVect::make(bt, vlen);
811
return new ReplicateNode(s, vt);
814
VectorNode* VectorNode::shift_count(int opc, Node* cnt, uint vlen, BasicType bt) {
815
// Match shift count type with shift vector type.
816
const TypeVect* vt = TypeVect::make(bt, vlen);
820
return new LShiftCntVNode(cnt, vt);
827
return new RShiftCntVNode(cnt, vt);
829
fatal("Missed vector creation for '%s'", NodeClassNames[opc]);
834
bool VectorNode::is_vector_rotate(int opc) {
837
case Op_RotateRightV:
844
bool VectorNode::is_vector_integral_negate(int opc) {
845
return opc == Op_NegVI || opc == Op_NegVL;
848
bool VectorNode::is_vector_shift(int opc) {
849
assert(opc > _last_machine_leaf && opc < _last_opcode, "invalid opcode");
869
bool VectorNode::is_vector_shift_count(int opc) {
870
assert(opc > _last_machine_leaf && opc < _last_opcode, "invalid opcode");
880
static bool is_con(Node* n, long con) {
882
const Type* t = n->bottom_type();
883
if (t->isa_int() && t->is_int()->get_con() == (int)con) {
886
if (t->isa_long() && t->is_long()->get_con() == con) {
893
// Return true if every bit in this vector is 1.
894
bool VectorNode::is_all_ones_vector(Node* n) {
895
switch (n->Opcode()) {
897
return is_integral_type(n->bottom_type()->is_vect()->element_basic_type()) &&
898
is_con(n->in(1), -1);
900
return is_con(n->in(1), -1);
906
// Return true if every bit in this vector is 0.
907
bool VectorNode::is_all_zeros_vector(Node* n) {
908
switch (n->Opcode()) {
910
return is_integral_type(n->bottom_type()->is_vect()->element_basic_type()) &&
913
return is_con(n->in(1), 0);
919
bool VectorNode::is_vector_bitwise_not_pattern(Node* n) {
920
if (n->Opcode() == Op_XorV) {
921
return is_all_ones_vector(n->in(1)) ||
922
is_all_ones_vector(n->in(2));
927
bool VectorNode::is_scalar_unary_op_with_equal_input_and_output_types(int opc) {
939
case Op_ReverseBytesI:
940
case Op_ReverseBytesL:
941
case Op_ReverseBytesUS:
942
case Op_ReverseBytesS:
946
case Op_CountLeadingZerosI:
947
case Op_CountTrailingZerosI:
954
// Java API for Long.bitCount/numberOfLeadingZeros/numberOfTrailingZeros
955
// returns int type, but Vector API for them returns long type. To unify
956
// the implementation in backend, AutoVectorization splits the vector
957
// implementation for Java API into an execution node with long type plus
958
// another node converting long to int.
959
bool VectorNode::is_scalar_op_that_returns_int_but_vector_op_returns_long(int opc) {
962
case Op_CountLeadingZerosL:
963
case Op_CountTrailingZerosL:
971
Node* VectorNode::try_to_gen_masked_vector(PhaseGVN* gvn, Node* node, const TypeVect* vt) {
972
int vopc = node->Opcode();
973
uint vlen = vt->length();
974
BasicType bt = vt->element_basic_type();
976
// Predicated vectors do not need to add another mask input
977
if (node->is_predicated_vector() || !Matcher::has_predicated_vectors() ||
978
!Matcher::match_rule_supported_vector_masked(vopc, vlen, bt) ||
979
!Matcher::match_rule_supported_vector(Op_VectorMaskGen, vlen, bt)) {
983
Node* mask = nullptr;
984
// Generate a vector mask for vector operation whose vector length is lower than the
985
// hardware supported max vector length.
986
if (vt->length_in_bytes() < (uint)MaxVectorSize) {
987
Node* length = gvn->transform(new ConvI2LNode(gvn->makecon(TypeInt::make(vlen))));
988
mask = gvn->transform(VectorMaskGenNode::make(length, bt, vlen));
993
// Generate the related masked op for vector load/store/load_gather/store_scatter.
994
// Or append the mask to the vector op's input list by default.
997
return new LoadVectorMaskedNode(node->in(0), node->in(1), node->in(2),
998
node->as_LoadVector()->adr_type(), vt, mask,
999
node->as_LoadVector()->control_dependency());
1000
case Op_LoadVectorGather:
1001
return new LoadVectorGatherMaskedNode(node->in(0), node->in(1), node->in(2),
1002
node->as_LoadVector()->adr_type(), vt,
1004
case Op_StoreVector:
1005
return new StoreVectorMaskedNode(node->in(0), node->in(1), node->in(2), node->in(3),
1006
node->as_StoreVector()->adr_type(), mask);
1007
case Op_StoreVectorScatter:
1008
return new StoreVectorScatterMaskedNode(node->in(0), node->in(1), node->in(2),
1009
node->as_StoreVector()->adr_type(),
1010
node->in(3), node->in(4), mask);
1012
// Add the mask as an additional input to the original vector node by default.
1013
// This is used for almost all the vector nodes.
1014
node->add_req(mask);
1015
node->add_flag(Node::Flag_is_predicated_vector);
1020
Node* VectorNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1021
if (Matcher::vector_needs_partial_operations(this, vect_type())) {
1022
return try_to_gen_masked_vector(phase, this, vect_type());
1027
// Return initial Pack node. Additional operands added with add_opd() calls.
1028
PackNode* PackNode::make(Node* s, uint vlen, BasicType bt) {
1029
const TypeVect* vt = TypeVect::make(bt, vlen);
1033
return new PackBNode(s, vt);
1036
return new PackSNode(s, vt);
1038
return new PackINode(s, vt);
1040
return new PackLNode(s, vt);
1042
return new PackFNode(s, vt);
1044
return new PackDNode(s, vt);
1046
fatal("Type '%s' is not supported for vectors", type2name(bt));
1051
// Create a binary tree form for Packs. [lo, hi) (half-open) range
1052
PackNode* PackNode::binary_tree_pack(int lo, int hi) {
1054
assert(is_power_of_2(ct), "power of 2");
1056
PackNode* pk = PackNode::make(in(lo), 2, vect_type()->element_basic_type());
1057
pk->add_opd(in(lo+1));
1060
int mid = lo + ct/2;
1061
PackNode* n1 = binary_tree_pack(lo, mid);
1062
PackNode* n2 = binary_tree_pack(mid, hi );
1064
BasicType bt = n1->vect_type()->element_basic_type();
1065
assert(bt == n2->vect_type()->element_basic_type(), "should be the same");
1069
return new PackSNode(n1, n2, TypeVect::make(T_SHORT, 2));
1072
return new PackINode(n1, n2, TypeVect::make(T_INT, 2));
1074
return new PackLNode(n1, n2, TypeVect::make(T_LONG, 2));
1076
return new Pack2LNode(n1, n2, TypeVect::make(T_LONG, 2));
1078
return new PackDNode(n1, n2, TypeVect::make(T_DOUBLE, 2));
1080
return new Pack2DNode(n1, n2, TypeVect::make(T_DOUBLE, 2));
1082
fatal("Type '%s' is not supported for vectors", type2name(bt));
1088
// Return the vector version of a scalar load node.
1089
LoadVectorNode* LoadVectorNode::make(int opc, Node* ctl, Node* mem,
1090
Node* adr, const TypePtr* atyp,
1091
uint vlen, BasicType bt,
1092
ControlDependency control_dependency) {
1093
const TypeVect* vt = TypeVect::make(bt, vlen);
1094
return new LoadVectorNode(ctl, mem, adr, atyp, vt, control_dependency);
1097
Node* LoadVectorNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1098
const TypeVect* vt = vect_type();
1099
if (Matcher::vector_needs_partial_operations(this, vt)) {
1100
return VectorNode::try_to_gen_masked_vector(phase, this, vt);
1102
return LoadNode::Ideal(phase, can_reshape);
1105
// Return the vector version of a scalar store node.
1106
StoreVectorNode* StoreVectorNode::make(int opc, Node* ctl, Node* mem, Node* adr,
1107
const TypePtr* atyp, Node* val, uint vlen) {
1108
return new StoreVectorNode(ctl, mem, adr, atyp, val);
1111
Node* StoreVectorNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1112
const TypeVect* vt = vect_type();
1113
if (Matcher::vector_needs_partial_operations(this, vt)) {
1114
return VectorNode::try_to_gen_masked_vector(phase, this, vt);
1116
return StoreNode::Ideal(phase, can_reshape);
1119
Node* LoadVectorMaskedNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1120
if (!in(3)->is_top() && in(3)->Opcode() == Op_VectorMaskGen) {
1121
Node* mask_len = in(3)->in(1);
1122
const TypeLong* ty = phase->type(mask_len)->isa_long();
1123
if (ty && ty->is_con()) {
1124
BasicType mask_bt = Matcher::vector_element_basic_type(in(3));
1125
int load_sz = type2aelembytes(mask_bt) * ty->get_con();
1126
assert(load_sz <= MaxVectorSize, "Unexpected load size");
1127
if (load_sz == MaxVectorSize) {
1128
Node* ctr = in(MemNode::Control);
1129
Node* mem = in(MemNode::Memory);
1130
Node* adr = in(MemNode::Address);
1131
return phase->transform(new LoadVectorNode(ctr, mem, adr, adr_type(), vect_type()));
1135
return LoadVectorNode::Ideal(phase, can_reshape);
1138
Node* StoreVectorMaskedNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1139
if (!in(4)->is_top() && in(4)->Opcode() == Op_VectorMaskGen) {
1140
Node* mask_len = in(4)->in(1);
1141
const TypeLong* ty = phase->type(mask_len)->isa_long();
1142
if (ty && ty->is_con()) {
1143
BasicType mask_bt = Matcher::vector_element_basic_type(in(4));
1144
int load_sz = type2aelembytes(mask_bt) * ty->get_con();
1145
assert(load_sz <= MaxVectorSize, "Unexpected store size");
1146
if (load_sz == MaxVectorSize) {
1147
Node* ctr = in(MemNode::Control);
1148
Node* mem = in(MemNode::Memory);
1149
Node* adr = in(MemNode::Address);
1150
Node* val = in(MemNode::ValueIn);
1151
return phase->transform(new StoreVectorNode(ctr, mem, adr, adr_type(), val));
1155
return StoreVectorNode::Ideal(phase, can_reshape);
1158
int ExtractNode::opcode(BasicType bt) {
1160
case T_BOOLEAN: return Op_ExtractUB;
1161
case T_BYTE: return Op_ExtractB;
1162
case T_CHAR: return Op_ExtractC;
1163
case T_SHORT: return Op_ExtractS;
1164
case T_INT: return Op_ExtractI;
1165
case T_LONG: return Op_ExtractL;
1166
case T_FLOAT: return Op_ExtractF;
1167
case T_DOUBLE: return Op_ExtractD;
1169
assert(false, "wrong type: %s", type2name(bt));
1174
// Extract a scalar element of vector by constant position.
1175
Node* ExtractNode::make(Node* v, ConINode* pos, BasicType bt) {
1176
assert(pos->get_int() >= 0 &&
1177
pos->get_int() < Matcher::max_vector_size(bt), "pos in range");
1179
case T_BOOLEAN: return new ExtractUBNode(v, pos);
1180
case T_BYTE: return new ExtractBNode(v, pos);
1181
case T_CHAR: return new ExtractCNode(v, pos);
1182
case T_SHORT: return new ExtractSNode(v, pos);
1183
case T_INT: return new ExtractINode(v, pos);
1184
case T_LONG: return new ExtractLNode(v, pos);
1185
case T_FLOAT: return new ExtractFNode(v, pos);
1186
case T_DOUBLE: return new ExtractDNode(v, pos);
1188
assert(false, "wrong type: %s", type2name(bt));
1193
int ReductionNode::opcode(int opc, BasicType bt) {
1199
case T_CHAR: return 0;
1203
vopc = Op_AddReductionVI;
1205
default: ShouldNotReachHere(); return 0;
1209
assert(bt == T_LONG, "must be");
1210
vopc = Op_AddReductionVL;
1213
assert(bt == T_FLOAT, "must be");
1214
vopc = Op_AddReductionVF;
1217
assert(bt == T_DOUBLE, "must be");
1218
vopc = Op_AddReductionVD;
1223
case T_CHAR: return 0;
1227
vopc = Op_MulReductionVI;
1229
default: ShouldNotReachHere(); return 0;
1233
assert(bt == T_LONG, "must be");
1234
vopc = Op_MulReductionVL;
1237
assert(bt == T_FLOAT, "must be");
1238
vopc = Op_MulReductionVF;
1241
assert(bt == T_DOUBLE, "must be");
1242
vopc = Op_MulReductionVD;
1247
case T_CHAR: return 0;
1251
vopc = Op_MinReductionV;
1253
default: ShouldNotReachHere(); return 0;
1257
assert(bt == T_LONG, "must be");
1258
vopc = Op_MinReductionV;
1261
assert(bt == T_FLOAT, "must be");
1262
vopc = Op_MinReductionV;
1265
assert(bt == T_DOUBLE, "must be");
1266
vopc = Op_MinReductionV;
1271
case T_CHAR: return 0;
1275
vopc = Op_MaxReductionV;
1277
default: ShouldNotReachHere(); return 0;
1281
assert(bt == T_LONG, "must be");
1282
vopc = Op_MaxReductionV;
1285
assert(bt == T_FLOAT, "must be");
1286
vopc = Op_MaxReductionV;
1289
assert(bt == T_DOUBLE, "must be");
1290
vopc = Op_MaxReductionV;
1295
case T_CHAR: return 0;
1299
vopc = Op_AndReductionV;
1301
default: ShouldNotReachHere(); return 0;
1305
assert(bt == T_LONG, "must be");
1306
vopc = Op_AndReductionV;
1311
case T_CHAR: return 0;
1315
vopc = Op_OrReductionV;
1317
default: ShouldNotReachHere(); return 0;
1321
assert(bt == T_LONG, "must be");
1322
vopc = Op_OrReductionV;
1327
case T_CHAR: return 0;
1331
vopc = Op_XorReductionV;
1333
default: ShouldNotReachHere(); return 0;
1337
assert(bt == T_LONG, "must be");
1338
vopc = Op_XorReductionV;
1346
// Return the appropriate reduction node.
1347
ReductionNode* ReductionNode::make(int opc, Node* ctrl, Node* n1, Node* n2, BasicType bt,
1348
bool requires_strict_order) {
1350
int vopc = opcode(opc, bt);
1352
// This method should not be called for unimplemented vectors.
1353
guarantee(vopc != opc, "Vector for '%s' is not implemented", NodeClassNames[opc]);
1356
case Op_AddReductionVI: return new AddReductionVINode(ctrl, n1, n2);
1357
case Op_AddReductionVL: return new AddReductionVLNode(ctrl, n1, n2);
1358
case Op_AddReductionVF: return new AddReductionVFNode(ctrl, n1, n2, requires_strict_order);
1359
case Op_AddReductionVD: return new AddReductionVDNode(ctrl, n1, n2, requires_strict_order);
1360
case Op_MulReductionVI: return new MulReductionVINode(ctrl, n1, n2);
1361
case Op_MulReductionVL: return new MulReductionVLNode(ctrl, n1, n2);
1362
case Op_MulReductionVF: return new MulReductionVFNode(ctrl, n1, n2, requires_strict_order);
1363
case Op_MulReductionVD: return new MulReductionVDNode(ctrl, n1, n2, requires_strict_order);
1364
case Op_MinReductionV: return new MinReductionVNode (ctrl, n1, n2);
1365
case Op_MaxReductionV: return new MaxReductionVNode (ctrl, n1, n2);
1366
case Op_AndReductionV: return new AndReductionVNode (ctrl, n1, n2);
1367
case Op_OrReductionV: return new OrReductionVNode (ctrl, n1, n2);
1368
case Op_XorReductionV: return new XorReductionVNode (ctrl, n1, n2);
1370
assert(false, "unknown node: %s", NodeClassNames[vopc]);
1375
Node* ReductionNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1376
const TypeVect* vt = vect_type();
1377
if (Matcher::vector_needs_partial_operations(this, vt)) {
1378
return VectorNode::try_to_gen_masked_vector(phase, this, vt);
1383
Node* VectorLoadMaskNode::Identity(PhaseGVN* phase) {
1384
BasicType out_bt = type()->is_vect()->element_basic_type();
1385
if (!Matcher::has_predicated_vectors() && out_bt == T_BOOLEAN) {
1386
return in(1); // redundant conversion
1392
Node* VectorStoreMaskNode::Identity(PhaseGVN* phase) {
1393
// Identity transformation on boolean vectors.
1394
// VectorStoreMask (VectorLoadMask bv) elem_size ==> bv
1395
// vector[n]{bool} => vector[n]{t} => vector[n]{bool}
1396
if (in(1)->Opcode() == Op_VectorLoadMask) {
1397
return in(1)->in(1);
1402
VectorStoreMaskNode* VectorStoreMaskNode::make(PhaseGVN& gvn, Node* in, BasicType in_type, uint num_elem) {
1403
assert(in->bottom_type()->isa_vect(), "sanity");
1404
const TypeVect* vt = TypeVect::make(T_BOOLEAN, num_elem);
1405
int elem_size = type2aelembytes(in_type);
1406
return new VectorStoreMaskNode(in, gvn.intcon(elem_size), vt);
1409
VectorCastNode* VectorCastNode::make(int vopc, Node* n1, BasicType bt, uint vlen) {
1410
const TypeVect* vt = TypeVect::make(bt, vlen);
1412
case Op_VectorCastB2X: return new VectorCastB2XNode(n1, vt);
1413
case Op_VectorCastS2X: return new VectorCastS2XNode(n1, vt);
1414
case Op_VectorCastI2X: return new VectorCastI2XNode(n1, vt);
1415
case Op_VectorCastL2X: return new VectorCastL2XNode(n1, vt);
1416
case Op_VectorCastF2X: return new VectorCastF2XNode(n1, vt);
1417
case Op_VectorCastD2X: return new VectorCastD2XNode(n1, vt);
1418
case Op_VectorUCastB2X: return new VectorUCastB2XNode(n1, vt);
1419
case Op_VectorUCastS2X: return new VectorUCastS2XNode(n1, vt);
1420
case Op_VectorUCastI2X: return new VectorUCastI2XNode(n1, vt);
1421
case Op_VectorCastHF2F: return new VectorCastHF2FNode(n1, vt);
1422
case Op_VectorCastF2HF: return new VectorCastF2HFNode(n1, vt);
1424
assert(false, "unknown node: %s", NodeClassNames[vopc]);
1429
int VectorCastNode::opcode(int sopc, BasicType bt, bool is_signed) {
1430
assert((is_integral_type(bt) && bt != T_LONG) || is_signed, "");
1432
// Handle special case for to/from Half Float conversions
1435
assert(bt == T_SHORT, "");
1436
return Op_VectorCastHF2F;
1438
assert(bt == T_FLOAT, "");
1439
return Op_VectorCastF2HF;
1441
// Handled normally below
1445
// Handle normal conversions
1447
case T_BYTE: return is_signed ? Op_VectorCastB2X : Op_VectorUCastB2X;
1448
case T_SHORT: return is_signed ? Op_VectorCastS2X : Op_VectorUCastS2X;
1449
case T_INT: return is_signed ? Op_VectorCastI2X : Op_VectorUCastI2X;
1450
case T_LONG: return Op_VectorCastL2X;
1451
case T_FLOAT: return Op_VectorCastF2X;
1452
case T_DOUBLE: return Op_VectorCastD2X;
1454
assert(bt == T_CHAR || bt == T_BOOLEAN, "unknown type: %s", type2name(bt));
1459
bool VectorCastNode::implemented(int opc, uint vlen, BasicType src_type, BasicType dst_type) {
1460
if (is_java_primitive(dst_type) &&
1461
is_java_primitive(src_type) &&
1462
(vlen > 1) && is_power_of_2(vlen) &&
1463
VectorNode::vector_size_supported_auto_vectorization(dst_type, vlen)) {
1464
int vopc = VectorCastNode::opcode(opc, src_type);
1465
return vopc > 0 && Matcher::match_rule_supported_auto_vectorization(vopc, vlen, dst_type);
1470
Node* VectorCastNode::Identity(PhaseGVN* phase) {
1471
if (!in(1)->is_top()) {
1472
BasicType in_bt = in(1)->bottom_type()->is_vect()->element_basic_type();
1473
BasicType out_bt = vect_type()->element_basic_type();
1474
if (in_bt == out_bt) {
1475
return in(1); // redundant cast
1481
Node* ReductionNode::make_identity_con_scalar(PhaseGVN& gvn, int sopc, BasicType bt) {
1482
int vopc = opcode(sopc, bt);
1483
guarantee(vopc != sopc, "Vector reduction for '%s' is not implemented", NodeClassNames[sopc]);
1486
case Op_AndReductionV:
1491
return gvn.makecon(TypeInt::MINUS_1);
1493
return gvn.makecon(TypeLong::MINUS_1);
1495
fatal("Missed vector creation for '%s' as the basic type is not correct.", NodeClassNames[vopc]);
1499
case Op_AddReductionVI: // fallthrough
1500
case Op_AddReductionVL: // fallthrough
1501
case Op_AddReductionVF: // fallthrough
1502
case Op_AddReductionVD:
1503
case Op_OrReductionV:
1504
case Op_XorReductionV:
1505
return gvn.zerocon(bt);
1506
case Op_MulReductionVI:
1507
return gvn.makecon(TypeInt::ONE);
1508
case Op_MulReductionVL:
1509
return gvn.makecon(TypeLong::ONE);
1510
case Op_MulReductionVF:
1511
return gvn.makecon(TypeF::ONE);
1512
case Op_MulReductionVD:
1513
return gvn.makecon(TypeD::ONE);
1514
case Op_MinReductionV:
1517
return gvn.makecon(TypeInt::make(max_jbyte));
1519
return gvn.makecon(TypeInt::make(max_jshort));
1521
return gvn.makecon(TypeInt::MAX);
1523
return gvn.makecon(TypeLong::MAX);
1525
return gvn.makecon(TypeF::POS_INF);
1527
return gvn.makecon(TypeD::POS_INF);
1528
default: Unimplemented(); return nullptr;
1531
case Op_MaxReductionV:
1534
return gvn.makecon(TypeInt::make(min_jbyte));
1536
return gvn.makecon(TypeInt::make(min_jshort));
1538
return gvn.makecon(TypeInt::MIN);
1540
return gvn.makecon(TypeLong::MIN);
1542
return gvn.makecon(TypeF::NEG_INF);
1544
return gvn.makecon(TypeD::NEG_INF);
1545
default: Unimplemented(); return nullptr;
1549
fatal("Missed vector creation for '%s'", NodeClassNames[vopc]);
1554
bool ReductionNode::implemented(int opc, uint vlen, BasicType bt) {
1555
if (is_java_primitive(bt) &&
1556
(vlen > 1) && is_power_of_2(vlen) &&
1557
VectorNode::vector_size_supported_auto_vectorization(bt, vlen)) {
1558
int vopc = ReductionNode::opcode(opc, bt);
1559
return vopc != opc && Matcher::match_rule_supported_auto_vectorization(vopc, vlen, bt);
1564
MacroLogicVNode* MacroLogicVNode::make(PhaseGVN& gvn, Node* in1, Node* in2, Node* in3,
1565
Node* mask, uint truth_table, const TypeVect* vt) {
1566
assert(truth_table <= 0xFF, "invalid");
1567
assert(in1->bottom_type()->is_vect()->length_in_bytes() == vt->length_in_bytes(), "mismatch");
1568
assert(in2->bottom_type()->is_vect()->length_in_bytes() == vt->length_in_bytes(), "mismatch");
1569
assert(in3->bottom_type()->is_vect()->length_in_bytes() == vt->length_in_bytes(), "mismatch");
1570
assert(!mask || mask->bottom_type()->isa_vectmask(), "predicated register type expected");
1571
Node* fn = gvn.intcon(truth_table);
1572
return new MacroLogicVNode(in1, in2, in3, fn, mask, vt);
1575
Node* VectorNode::degenerate_vector_rotate(Node* src, Node* cnt, bool is_rotate_left,
1576
int vlen, BasicType bt, PhaseGVN* phase) {
1577
assert(is_integral_type(bt), "sanity");
1578
const TypeVect* vt = TypeVect::make(bt, vlen);
1580
int shift_mask = (type2aelembytes(bt) * 8) - 1;
1581
int shiftLOpc = (bt == T_LONG) ? Op_LShiftL : Op_LShiftI;
1582
auto urshiftopc = [=]() {
1584
case T_INT: return Op_URShiftI;
1585
case T_LONG: return Op_URShiftL;
1586
case T_BYTE: return Op_URShiftB;
1587
case T_SHORT: return Op_URShiftS;
1588
default: return (Opcodes)0;
1591
int shiftROpc = urshiftopc();
1593
// Compute shift values for right rotation and
1594
// later swap them in case of left rotation.
1595
Node* shiftRCnt = nullptr;
1596
Node* shiftLCnt = nullptr;
1597
const TypeInt* cnt_type = cnt->bottom_type()->isa_int();
1598
bool is_binary_vector_op = false;
1599
if (cnt_type && cnt_type->is_con()) {
1601
int shift = cnt_type->get_con() & shift_mask;
1602
shiftRCnt = phase->intcon(shift);
1603
shiftLCnt = phase->intcon(shift_mask + 1 - shift);
1604
} else if (cnt->Opcode() == Op_Replicate) {
1605
// Scalar variable shift, handle replicates generated by auto vectorizer.
1608
// Shift count vector for Rotate vector has long elements too.
1609
if (cnt->Opcode() == Op_ConvI2L) {
1612
assert(cnt->bottom_type()->isa_long() &&
1613
cnt->bottom_type()->is_long()->is_con(), "Long constant expected");
1614
cnt = phase->transform(new ConvL2INode(cnt));
1617
shiftRCnt = phase->transform(new AndINode(cnt, phase->intcon(shift_mask)));
1618
shiftLCnt = phase->transform(new SubINode(phase->intcon(shift_mask + 1), shiftRCnt));
1620
// Variable vector rotate count.
1621
assert(Matcher::supports_vector_variable_shifts(), "");
1625
Node* shift_mask_node = nullptr;
1626
Node* const_one_node = nullptr;
1628
assert(cnt->bottom_type()->isa_vect(), "Unexpected shift");
1629
const Type* elem_ty = Type::get_const_basic_type(bt);
1632
shift_mask_node = phase->longcon(shift_mask);
1633
const_one_node = phase->longcon(1L);
1634
subVopc = VectorNode::opcode(Op_SubL, bt);
1635
addVopc = VectorNode::opcode(Op_AddL, bt);
1637
shift_mask_node = phase->intcon(shift_mask);
1638
const_one_node = phase->intcon(1);
1639
subVopc = VectorNode::opcode(Op_SubI, bt);
1640
addVopc = VectorNode::opcode(Op_AddI, bt);
1642
Node* vector_mask = phase->transform(VectorNode::scalar2vector(shift_mask_node, vlen, elem_ty));
1643
Node* vector_one = phase->transform(VectorNode::scalar2vector(const_one_node, vlen, elem_ty));
1646
shiftRCnt = phase->transform(VectorNode::make(Op_AndV, shiftRCnt, vector_mask, vt));
1647
vector_mask = phase->transform(VectorNode::make(addVopc, vector_one, vector_mask, vt));
1648
shiftLCnt = phase->transform(VectorNode::make(subVopc, vector_mask, shiftRCnt, vt));
1649
is_binary_vector_op = true;
1652
// Swap the computed left and right shift counts.
1653
if (is_rotate_left) {
1654
swap(shiftRCnt,shiftLCnt);
1657
if (!is_binary_vector_op) {
1658
shiftLCnt = phase->transform(new LShiftCntVNode(shiftLCnt, vt));
1659
shiftRCnt = phase->transform(new RShiftCntVNode(shiftRCnt, vt));
1662
return new OrVNode(phase->transform(VectorNode::make(shiftLOpc, src, shiftLCnt, vlen, bt, is_binary_vector_op)),
1663
phase->transform(VectorNode::make(shiftROpc, src, shiftRCnt, vlen, bt, is_binary_vector_op)),
1667
Node* RotateLeftVNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1668
int vlen = length();
1669
BasicType bt = vect_type()->element_basic_type();
1670
if ((!in(2)->is_Con() && !Matcher::supports_vector_variable_rotates()) ||
1671
!Matcher::match_rule_supported_vector(Op_RotateLeftV, vlen, bt)) {
1672
return VectorNode::degenerate_vector_rotate(in(1), in(2), true, vlen, bt, phase);
1677
Node* RotateRightVNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1678
int vlen = length();
1679
BasicType bt = vect_type()->element_basic_type();
1680
if ((!in(2)->is_Con() && !Matcher::supports_vector_variable_rotates()) ||
1681
!Matcher::match_rule_supported_vector(Op_RotateRightV, vlen, bt)) {
1682
return VectorNode::degenerate_vector_rotate(in(1), in(2), false, vlen, bt, phase);
1688
void VectorMaskCmpNode::dump_spec(outputStream *st) const {
1689
st->print(" %d #", _predicate); _type->dump_on(st);
1693
Node* VectorReinterpretNode::Identity(PhaseGVN *phase) {
1695
if (n->Opcode() == Op_VectorReinterpret) {
1696
// "VectorReinterpret (VectorReinterpret node) ==> node" if:
1697
// 1) Types of 'node' and 'this' are identical
1698
// 2) Truncations are not introduced by the first VectorReinterpret
1699
if (Type::equals(bottom_type(), n->in(1)->bottom_type()) &&
1700
length_in_bytes() <= n->bottom_type()->is_vect()->length_in_bytes()) {
1707
Node* VectorInsertNode::make(Node* vec, Node* new_val, int position, PhaseGVN& gvn) {
1708
assert(position < (int)vec->bottom_type()->is_vect()->length(), "pos in range");
1709
ConINode* pos = gvn.intcon(position);
1710
return new VectorInsertNode(vec, new_val, pos, vec->bottom_type()->is_vect());
1713
Node* VectorUnboxNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1714
Node* n = obj()->uncast();
1715
if (EnableVectorReboxing && n->Opcode() == Op_VectorBox) {
1716
if (Type::equals(bottom_type(), n->in(VectorBoxNode::Value)->bottom_type())) {
1717
// Handled by VectorUnboxNode::Identity()
1719
VectorBoxNode* vbox = static_cast<VectorBoxNode*>(n);
1720
ciKlass* vbox_klass = vbox->box_type()->instance_klass();
1721
const TypeVect* in_vt = vbox->vec_type();
1722
const TypeVect* out_vt = type()->is_vect();
1724
if (in_vt->length() == out_vt->length()) {
1725
Node* value = vbox->in(VectorBoxNode::Value);
1727
bool is_vector_mask = vbox_klass->is_subclass_of(ciEnv::current()->vector_VectorMask_klass());
1728
bool is_vector_shuffle = vbox_klass->is_subclass_of(ciEnv::current()->vector_VectorShuffle_klass());
1729
if (is_vector_mask) {
1730
// VectorUnbox (VectorBox vmask) ==> VectorMaskCast vmask
1731
const TypeVect* vmask_type = TypeVect::makemask(out_vt->element_basic_type(), out_vt->length());
1732
return new VectorMaskCastNode(value, vmask_type);
1733
} else if (is_vector_shuffle) {
1734
if (!is_shuffle_to_vector()) {
1735
// VectorUnbox (VectorBox vshuffle) ==> VectorLoadShuffle vshuffle
1736
return new VectorLoadShuffleNode(value, out_vt);
1739
// Vector type mismatch is only supported for masks and shuffles, but sometimes it happens in pathological cases.
1742
// Vector length mismatch.
1743
// Sometimes happen in pathological cases (e.g., when unboxing happens in effectively dead code).
1750
Node* VectorUnboxNode::Identity(PhaseGVN* phase) {
1751
Node* n = obj()->uncast();
1752
if (EnableVectorReboxing && n->Opcode() == Op_VectorBox) {
1753
if (Type::equals(bottom_type(), n->in(VectorBoxNode::Value)->bottom_type())) {
1754
return n->in(VectorBoxNode::Value); // VectorUnbox (VectorBox v) ==> v
1756
// Handled by VectorUnboxNode::Ideal().
1762
const TypeFunc* VectorBoxNode::vec_box_type(const TypeInstPtr* box_type) {
1763
const Type** fields = TypeTuple::fields(0);
1764
const TypeTuple *domain = TypeTuple::make(TypeFunc::Parms, fields);
1766
fields = TypeTuple::fields(1);
1767
fields[TypeFunc::Parms+0] = box_type;
1768
const TypeTuple *range = TypeTuple::make(TypeFunc::Parms+1, fields);
1770
return TypeFunc::make(domain, range);
1773
Node* ShiftVNode::Identity(PhaseGVN* phase) {
1775
// Shift by ZERO does nothing
1776
if (is_vshift_cnt(in2) && phase->find_int_type(in2->in(1)) == TypeInt::ZERO) {
1782
Node* VectorMaskGenNode::make(Node* length, BasicType mask_bt) {
1783
int max_vector = Matcher::max_vector_size(mask_bt);
1784
return make(length, mask_bt, max_vector);
1787
Node* VectorMaskGenNode::make(Node* length, BasicType mask_bt, int mask_len) {
1788
const TypeVectMask* t_vmask = TypeVectMask::make(mask_bt, mask_len);
1789
return new VectorMaskGenNode(length, t_vmask);
1792
Node* VectorMaskOpNode::make(Node* mask, const Type* ty, int mopc) {
1794
case Op_VectorMaskTrueCount:
1795
return new VectorMaskTrueCountNode(mask, ty);
1796
case Op_VectorMaskLastTrue:
1797
return new VectorMaskLastTrueNode(mask, ty);
1798
case Op_VectorMaskFirstTrue:
1799
return new VectorMaskFirstTrueNode(mask, ty);
1800
case Op_VectorMaskToLong:
1801
return new VectorMaskToLongNode(mask, ty);
1803
assert(false, "Unhandled operation");
1808
Node* VectorMaskOpNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1809
const TypeVect* vt = vect_type();
1810
if (Matcher::vector_needs_partial_operations(this, vt)) {
1811
return VectorNode::try_to_gen_masked_vector(phase, this, vt);
1816
Node* VectorMaskToLongNode::Identity(PhaseGVN* phase) {
1817
if (in(1)->Opcode() == Op_VectorLongToMask) {
1818
return in(1)->in(1);
1823
Node* VectorLongToMaskNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1824
const TypeVect* dst_type = bottom_type()->is_vect();
1825
if (in(1)->Opcode() == Op_AndL &&
1826
in(1)->in(1)->Opcode() == Op_VectorMaskToLong &&
1827
in(1)->in(2)->bottom_type()->isa_long() &&
1828
in(1)->in(2)->bottom_type()->is_long()->is_con() &&
1829
in(1)->in(2)->bottom_type()->is_long()->get_con() == ((1L << dst_type->length()) - 1)) {
1830
// Different src/dst mask length represents a re-interpretation operation,
1831
// we can however generate a mask casting operation if length matches.
1832
Node* src = in(1)->in(1)->in(1);
1833
if (dst_type->isa_vectmask() == nullptr) {
1834
if (src->Opcode() != Op_VectorStoreMask) {
1839
const TypeVect* src_type = src->bottom_type()->is_vect();
1840
if (src_type->length() == dst_type->length() &&
1841
((src_type->isa_vectmask() == nullptr && dst_type->isa_vectmask() == nullptr) ||
1842
(src_type->isa_vectmask() && dst_type->isa_vectmask()))) {
1843
return new VectorMaskCastNode(src, dst_type);
1849
Node* FmaVNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1850
// We canonicalize the node by converting "(-a)*b+c" into "b*(-a)+c"
1851
// This reduces the number of rules in the matcher, as we only need to check
1852
// for negations on the second argument, and not the symmetric case where
1853
// the first argument is negated.
1854
// We cannot do this if the FmaV is masked, since the inactive lanes have to return
1855
// the first input (i.e. "-a"). If we were to swap the inputs, the inactive lanes would
1856
// incorrectly return "b".
1857
if (!is_predicated_vector() && in(1)->is_NegV() && !in(2)->is_NegV()) {
1864
// Generate other vector nodes to implement the masked/non-masked vector negation.
1865
Node* NegVNode::degenerate_integral_negate(PhaseGVN* phase, bool is_predicated) {
1866
const TypeVect* vt = vect_type();
1867
BasicType bt = vt->element_basic_type();
1868
uint vlen = length();
1870
// Transformation for predicated NegVI/L
1871
if (is_predicated) {
1872
// (NegVI/L src m) ==> (AddVI/L (XorV src (ReplicateI/L -1) m) (ReplicateI/L 1) m)
1873
Node* const_minus_one = nullptr;
1874
Node* const_one = nullptr;
1877
const_minus_one = phase->longcon(-1L);
1878
const_one = phase->longcon(1L);
1881
const_minus_one = phase->intcon(-1);
1882
const_one = phase->intcon(1);
1885
const_minus_one = phase->transform(VectorNode::scalar2vector(const_minus_one, vlen, Type::get_const_basic_type(bt)));
1886
Node* xorv = VectorNode::make(Op_XorV, in(1), const_minus_one, vt);
1887
xorv->add_req(in(2));
1888
xorv->add_flag(Node::Flag_is_predicated_vector);
1889
phase->transform(xorv);
1890
const_one = phase->transform(VectorNode::scalar2vector(const_one, vlen, Type::get_const_basic_type(bt)));
1891
Node* addv = VectorNode::make(VectorNode::opcode(add_opc, bt), xorv, const_one, vt);
1892
addv->add_req(in(2));
1893
addv->add_flag(Node::Flag_is_predicated_vector);
1897
// NegVI/L ==> (SubVI/L (ReplicateI/L 0) src)
1898
Node* const_zero = nullptr;
1901
const_zero = phase->longcon(0L);
1904
const_zero = phase->intcon(0);
1907
const_zero = phase->transform(VectorNode::scalar2vector(const_zero, vlen, Type::get_const_basic_type(bt)));
1908
return VectorNode::make(VectorNode::opcode(sub_opc, bt), const_zero, in(1), vt);
1911
Node* NegVNode::Ideal(PhaseGVN* phase, bool can_reshape) {
1912
BasicType bt = vect_type()->element_basic_type();
1913
uint vlen = length();
1915
if (is_vector_integral_negate(opc)) {
1916
if (is_predicated_vector()) {
1917
if (!Matcher::match_rule_supported_vector_masked(opc, vlen, bt)) {
1918
return degenerate_integral_negate(phase, true);
1920
} else if (!Matcher::match_rule_supported_vector(opc, vlen, bt)) {
1921
return degenerate_integral_negate(phase, false);
1927
static Node* reverse_operations_identity(Node* n, Node* in1) {
1928
if (n->is_predicated_using_blend()) {
1931
if (n->Opcode() == in1->Opcode()) {
1932
// OperationV (OperationV X MASK) MASK => X
1933
if (n->is_predicated_vector() && in1->is_predicated_vector() && n->in(2) == in1->in(2)) {
1935
// OperationV (OperationV X) => X
1936
} else if (!n->is_predicated_vector() && !in1->is_predicated_vector()) {
1943
Node* ReverseBytesVNode::Identity(PhaseGVN* phase) {
1944
// "(ReverseBytesV X) => X" if the element type is T_BYTE.
1945
if (vect_type()->element_basic_type() == T_BYTE) {
1948
return reverse_operations_identity(this, in(1));
1951
Node* ReverseVNode::Identity(PhaseGVN* phase) {
1952
return reverse_operations_identity(this, in(1));
1955
// Optimize away redundant AndV/OrV nodes when the operation
1956
// is applied on the same input node multiple times
1957
static Node* redundant_logical_identity(Node* n) {
1958
Node* n1 = n->in(1);
1959
// (OperationV (OperationV src1 src2) src1) => (OperationV src1 src2)
1960
// (OperationV (OperationV src1 src2) src2) => (OperationV src1 src2)
1961
// (OperationV (OperationV src1 src2 m1) src1 m1) => (OperationV src1 src2 m1)
1962
// (OperationV (OperationV src1 src2 m1) src2 m1) => (OperationV src1 src2 m1)
1963
if (n->Opcode() == n1->Opcode()) {
1964
if (((!n->is_predicated_vector() && !n1->is_predicated_vector()) ||
1965
( n->is_predicated_vector() && n1->is_predicated_vector() && n->in(3) == n1->in(3))) &&
1966
( n->in(2) == n1->in(1) || n->in(2) == n1->in(2))) {
1971
Node* n2 = n->in(2);
1972
if (n->Opcode() == n2->Opcode()) {
1973
// (OperationV src1 (OperationV src1 src2)) => OperationV(src1, src2)
1974
// (OperationV src2 (OperationV src1 src2)) => OperationV(src1, src2)
1975
// (OperationV src1 (OperationV src1 src2 m1) m1) => OperationV(src1 src2 m1)
1976
// It is not possible to optimize - (OperationV src2 (OperationV src1 src2 m1) m1) as the
1977
// results of both "OperationV" nodes are different for unmasked lanes
1978
if ((!n->is_predicated_vector() && !n2->is_predicated_vector() &&
1979
(n->in(1) == n2->in(1) || n->in(1) == n2->in(2))) ||
1980
(n->is_predicated_vector() && n2->is_predicated_vector() && n->in(3) == n2->in(3) &&
1981
n->in(1) == n2->in(1))) {
1989
Node* AndVNode::Identity(PhaseGVN* phase) {
1990
// (AndV src (Replicate m1)) => src
1991
// (AndVMask src (MaskAll m1)) => src
1992
if (VectorNode::is_all_ones_vector(in(2))) {
1995
// (AndV (Replicate zero) src) => (Replicate zero)
1996
// (AndVMask (MaskAll zero) src) => (MaskAll zero)
1997
if (VectorNode::is_all_zeros_vector(in(1))) {
2000
// The following transformations are only applied to
2001
// the un-predicated operation, since the VectorAPI
2002
// masked operation requires the unmasked lanes to
2003
// save the same values in the first operand.
2004
if (!is_predicated_vector()) {
2005
// (AndV (Replicate m1) src) => src
2006
// (AndVMask (MaskAll m1) src) => src
2007
if (VectorNode::is_all_ones_vector(in(1))) {
2010
// (AndV src (Replicate zero)) => (Replicate zero)
2011
// (AndVMask src (MaskAll zero)) => (MaskAll zero)
2012
if (VectorNode::is_all_zeros_vector(in(2))) {
2017
// (AndV src src) => src
2018
// (AndVMask src src) => src
2019
if (in(1) == in(2)) {
2022
return redundant_logical_identity(this);
2025
Node* OrVNode::Identity(PhaseGVN* phase) {
2026
// (OrV (Replicate m1) src) => (Replicate m1)
2027
// (OrVMask (MaskAll m1) src) => (MaskAll m1)
2028
if (VectorNode::is_all_ones_vector(in(1))) {
2031
// (OrV src (Replicate zero)) => src
2032
// (OrVMask src (MaskAll zero)) => src
2033
if (VectorNode::is_all_zeros_vector(in(2))) {
2036
// The following transformations are only applied to
2037
// the un-predicated operation, since the VectorAPI
2038
// masked operation requires the unmasked lanes to
2039
// save the same values in the first operand.
2040
if (!is_predicated_vector()) {
2041
// (OrV src (Replicate m1)) => (Replicate m1)
2042
// (OrVMask src (MaskAll m1)) => (MaskAll m1)
2043
if (VectorNode::is_all_ones_vector(in(2))) {
2046
// (OrV (Replicate zero) src) => src
2047
// (OrVMask (MaskAll zero) src) => src
2048
if (VectorNode::is_all_zeros_vector(in(1))) {
2053
// (OrV src src) => src
2054
// (OrVMask src src) => src
2055
if (in(1) == in(2)) {
2058
return redundant_logical_identity(this);
2061
Node* XorVNode::Ideal(PhaseGVN* phase, bool can_reshape) {
2062
// (XorV src src) => (Replicate zero)
2063
// (XorVMask src src) => (MaskAll zero)
2065
// The transformation is only applied to the un-predicated
2066
// operation, since the VectorAPI masked operation requires
2067
// the unmasked lanes to save the same values in the first
2069
if (!is_predicated_vector() && (in(1) == in(2))) {
2070
BasicType bt = vect_type()->element_basic_type();
2071
Node* zero = phase->transform(phase->zerocon(bt));
2072
return VectorNode::scalar2vector(zero, length(), Type::get_const_basic_type(bt),
2073
bottom_type()->isa_vectmask() != nullptr);
2078
Node* VectorBlendNode::Identity(PhaseGVN* phase) {
2079
// (VectorBlend X X MASK) => X
2080
if (in(1) == in(2)) {
2087
void VectorBoxAllocateNode::dump_spec(outputStream *st) const {
2088
CallStaticJavaNode::dump_spec(st);