jdk

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/*
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 * Copyright (c) 1998, 2023, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "memory/allocation.inline.hpp"
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#include "memory/resourceArea.hpp"
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#include "opto/chaitin.hpp"
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#include "opto/machnode.hpp"
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// See if this register (or pairs, or vector) already contains the value.
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static bool register_contains_value(Node* val, OptoReg::Name reg, int n_regs,
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                                    const Node_List &value) {
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  for (int i = 0; i < n_regs; i++) {
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    OptoReg::Name nreg = OptoReg::add(reg,-i);
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    if (value[nreg] != val)
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      return false;
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  }
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  return true;
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}
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//---------------------------may_be_copy_of_callee-----------------------------
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// Check to see if we can possibly be a copy of a callee-save value.
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bool PhaseChaitin::may_be_copy_of_callee( Node *def ) const {
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  // Short circuit if there are no callee save registers
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  if (_matcher.number_of_saved_registers() == 0) return false;
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  // Expect only a spill-down and reload on exit for callee-save spills.
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  // Chains of copies cannot be deep.
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  // 5008997 - This is wishful thinking. Register allocator seems to
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  // be splitting live ranges for callee save registers to such
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  // an extent that in large methods the chains can be very long
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  // (50+). The conservative answer is to return true if we don't
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  // know as this prevents optimizations from occurring.
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  const int limit = 60;
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  int i;
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  for( i=0; i < limit; i++ ) {
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    if( def->is_Proj() && def->in(0)->is_Start() &&
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        _matcher.is_save_on_entry(lrgs(_lrg_map.live_range_id(def)).reg()))
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      return true;              // Direct use of callee-save proj
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    if( def->is_Copy() )        // Copies carry value through
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      def = def->in(def->is_Copy());
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    else if( def->is_Phi() )    // Phis can merge it from any direction
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      def = def->in(1);
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    else
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      break;
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    guarantee(def != nullptr, "must not resurrect dead copy");
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  }
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  // If we reached the end and didn't find a callee save proj
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  // then this may be a callee save proj so we return true
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  // as the conservative answer. If we didn't reach then end
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  // we must have discovered that it was not a callee save
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  // else we would have returned.
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  return i == limit;
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}
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//------------------------------yank-----------------------------------
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// Helper function for yank_if_dead
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int PhaseChaitin::yank(Node *old, Block *current_block, Node_List *value, Node_List *regnd) {
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  int blk_adjust=0;
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  Block *oldb = _cfg.get_block_for_node(old);
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  oldb->find_remove(old);
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  // Count 1 if deleting an instruction from the current block
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  if (oldb == current_block) {
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    blk_adjust++;
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  }
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  _cfg.unmap_node_from_block(old);
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  OptoReg::Name old_reg = lrgs(_lrg_map.live_range_id(old)).reg();
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  assert(value != nullptr || regnd == nullptr, "sanity");
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  if (value != nullptr && regnd != nullptr && regnd->at(old_reg) == old) { // Instruction is currently available?
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    value->map(old_reg, nullptr); // Yank from value/regnd maps
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    regnd->map(old_reg, nullptr); // This register's value is now unknown
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  }
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  return blk_adjust;
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}
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#ifdef ASSERT
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static bool expected_yanked_node(Node *old, Node *orig_old) {
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  // This code is expected only next original nodes:
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  // - load from constant table node which may have next data input nodes:
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  //     MachConstantBase, MachTemp, MachSpillCopy
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  // - Phi nodes that are considered Junk
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  // - load constant node which may have next data input nodes:
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  //     MachTemp, MachSpillCopy
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  // - MachSpillCopy
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  // - MachProj and Copy dead nodes
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  if (old->is_MachSpillCopy()) {
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    return true;
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  } else if (old->is_Con()) {
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    return true;
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  } else if (old->is_MachProj()) { // Dead kills projection of Con node
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    return (old == orig_old);
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  } else if (old->is_Copy()) {     // Dead copy of a callee-save value
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    return (old == orig_old);
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  } else if (old->is_MachTemp()) {
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    return orig_old->is_Con();
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  } else if (old->is_Phi()) { // Junk phi's
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    return true;
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  } else if (old->is_MachConstantBase()) {
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    return (orig_old->is_Con() && orig_old->is_MachConstant());
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  }
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  return false;
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}
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#endif
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//------------------------------yank_if_dead-----------------------------------
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// Removed edges from 'old'.  Yank if dead.  Return adjustment counts to
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// iterators in the current block.
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int PhaseChaitin::yank_if_dead_recurse(Node *old, Node *orig_old, Block *current_block,
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                                       Node_List *value, Node_List *regnd) {
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  int blk_adjust=0;
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  if (old->outcnt() == 0 && old != C->top()) {
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#ifdef ASSERT
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    if (!expected_yanked_node(old, orig_old)) {
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      tty->print_cr("==============================================");
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      tty->print_cr("orig_old:");
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      orig_old->dump();
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      tty->print_cr("old:");
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      old->dump();
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      assert(false, "unexpected yanked node");
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    }
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    if (old->is_Con())
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      orig_old = old; // Reset to satisfy expected nodes checks.
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#endif
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    blk_adjust += yank(old, current_block, value, regnd);
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    for (uint i = 1; i < old->req(); i++) {
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      Node* n = old->in(i);
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      if (n != nullptr) {
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        old->set_req(i, nullptr);
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        blk_adjust += yank_if_dead_recurse(n, orig_old, current_block, value, regnd);
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      }
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    }
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    // Disconnect control and remove precedence edges if any exist
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    old->disconnect_inputs(C);
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  }
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  return blk_adjust;
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}
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//------------------------------use_prior_register-----------------------------
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// Use the prior value instead of the current value, in an effort to make
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// the current value go dead.  Return block iterator adjustment, in case
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// we yank some instructions from this block.
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int PhaseChaitin::use_prior_register( Node *n, uint idx, Node *def, Block *current_block, Node_List *value, Node_List *regnd ) {
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  // No effect?
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  if( def == n->in(idx) ) return 0;
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  // Def is currently dead and can be removed?  Do not resurrect
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  if( def->outcnt() == 0 ) return 0;
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  // Not every pair of physical registers are assignment compatible,
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  // e.g. on sparc floating point registers are not assignable to integer
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  // registers.
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  const LRG &def_lrg = lrgs(_lrg_map.live_range_id(def));
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  OptoReg::Name def_reg = def_lrg.reg();
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  const RegMask &use_mask = n->in_RegMask(idx);
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  bool can_use = ( RegMask::can_represent(def_reg) ? (use_mask.Member(def_reg) != 0)
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                                                   : (use_mask.is_AllStack() != 0));
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  if (!RegMask::is_vector(def->ideal_reg())) {
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    // Check for a copy to or from a misaligned pair.
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    // It is workaround for a sparc with misaligned pairs.
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    can_use = can_use && !use_mask.is_misaligned_pair() && !def_lrg.mask().is_misaligned_pair();
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  }
184
  if (!can_use)
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    return 0;
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  // Capture the old def in case it goes dead...
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  Node *old = n->in(idx);
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  // Save-on-call copies can only be elided if the entire copy chain can go
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  // away, lest we get the same callee-save value alive in 2 locations at
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  // once.  We check for the obvious trivial case here.  Although it can
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  // sometimes be elided with cooperation outside our scope, here we will just
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  // miss the opportunity.  :-(
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  if( may_be_copy_of_callee(def) ) {
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    if( old->outcnt() > 1 ) return 0; // We're the not last user
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    int idx = old->is_Copy();
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    assert( idx, "chain of copies being removed" );
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    Node *old2 = old->in(idx);  // Chain of copies
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    if( old2->outcnt() > 1 ) return 0; // old is not the last user
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    int idx2 = old2->is_Copy();
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    if( !idx2 ) return 0;       // Not a chain of 2 copies
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    if( def != old2->in(idx2) ) return 0; // Chain of exactly 2 copies
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  }
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  // Use the new def
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  n->set_req(idx,def);
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  _post_alloc++;
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  // Is old def now dead?  We successfully yanked a copy?
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  return yank_if_dead(old,current_block,value,regnd);
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}
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//------------------------------skip_copies------------------------------------
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// Skip through any number of copies (that don't mod oop-i-ness)
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Node *PhaseChaitin::skip_copies( Node *c ) {
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  int idx = c->is_Copy();
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  uint is_oop = lrgs(_lrg_map.live_range_id(c))._is_oop;
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  while (idx != 0) {
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    guarantee(c->in(idx) != nullptr, "must not resurrect dead copy");
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    if (lrgs(_lrg_map.live_range_id(c->in(idx)))._is_oop != is_oop) {
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      break;  // casting copy, not the same value
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    }
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    c = c->in(idx);
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    idx = c->is_Copy();
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  }
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  return c;
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}
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//------------------------------elide_copy-------------------------------------
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// Remove (bypass) copies along Node n, edge k.
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int PhaseChaitin::elide_copy( Node *n, int k, Block *current_block, Node_List *value, Node_List *regnd, bool can_change_regs ) {
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  int blk_adjust = 0;
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  uint nk_idx = _lrg_map.live_range_id(n->in(k));
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  OptoReg::Name nk_reg = lrgs(nk_idx).reg();
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  // Remove obvious same-register copies
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  Node *x = n->in(k);
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  int idx;
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  while( (idx=x->is_Copy()) != 0 ) {
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    Node *copy = x->in(idx);
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    guarantee(copy != nullptr, "must not resurrect dead copy");
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    if(lrgs(_lrg_map.live_range_id(copy)).reg() != nk_reg) {
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      break;
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    }
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    blk_adjust += use_prior_register(n,k,copy,current_block,value,regnd);
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    if (n->in(k) != copy) {
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      break; // Failed for some cutout?
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    }
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    x = copy;                   // Progress, try again
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  }
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  // Phis and 2-address instructions cannot change registers so easily - their
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  // outputs must match their input.
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  if (!can_change_regs) {
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    return blk_adjust;          // Only check stupid copies!
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  }
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  // Loop backedges won't have a value-mapping yet
261
  assert(regnd != nullptr || value == nullptr, "sanity");
262
  if (value == nullptr || regnd == nullptr) {
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    return blk_adjust;
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  }
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  // Skip through all copies to the _value_ being used.  Do not change from
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  // int to pointer.  This attempts to jump through a chain of copies, where
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  // intermediate copies might be illegal, i.e., value is stored down to stack
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  // then reloaded BUT survives in a register the whole way.
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  Node *val = skip_copies(n->in(k));
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  if (val == x) return blk_adjust; // No progress?
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  uint val_idx = _lrg_map.live_range_id(val);
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  OptoReg::Name val_reg = lrgs(val_idx).reg();
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  int n_regs = RegMask::num_registers(val->ideal_reg(), lrgs(val_idx));
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  // See if it happens to already be in the correct register!
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  // (either Phi's direct register, or the common case of the name
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  // never-clobbered original-def register)
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  if (register_contains_value(val, val_reg, n_regs, *value)) {
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    blk_adjust += use_prior_register(n,k,regnd->at(val_reg),current_block,value,regnd);
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    if (n->in(k) == regnd->at(val_reg)) {
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      return blk_adjust; // Success!  Quit trying
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    }
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  }
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  // See if we can skip the copy by changing registers.  Don't change from
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  // using a register to using the stack unless we know we can remove a
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  // copy-load.  Otherwise we might end up making a pile of Intel cisc-spill
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  // ops reading from memory instead of just loading once and using the
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  // register.
292

293
  // Also handle duplicate copies here.
294
  const Type *t = val->is_Con() ? val->bottom_type() : nullptr;
295

296
  // Scan all registers to see if this value is around already
297
  for( uint reg = 0; reg < (uint)_max_reg; reg++ ) {
298
    if (reg == (uint)nk_reg) {
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      // Found ourselves so check if there is only one user of this
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      // copy and keep on searching for a better copy if so.
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      bool ignore_self = true;
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      x = n->in(k);
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      DUIterator_Fast imax, i = x->fast_outs(imax);
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      Node* first = x->fast_out(i); i++;
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      while (i < imax && ignore_self) {
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        Node* use = x->fast_out(i); i++;
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        if (use != first) ignore_self = false;
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      }
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      if (ignore_self) continue;
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    }
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    Node *vv = value->at(reg);
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    // For scalable register, number of registers may be inconsistent between
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    // "val_reg" and "reg". For example, when "val" resides in register
315
    // but "reg" is located in stack.
316
    if (lrgs(val_idx).is_scalable()) {
317
      assert(val->ideal_reg() == Op_VecA || val->ideal_reg() == Op_RegVectMask, "scalable register");
318
      if (OptoReg::is_stack(reg)) {
319
        n_regs = lrgs(val_idx).scalable_reg_slots();
320
      } else {
321
        n_regs = lrgs(val_idx)._is_predicate ? RegMask::SlotsPerRegVectMask : RegMask::SlotsPerVecA;
322
      }
323
    }
324
    if (n_regs > 1) { // Doubles and vectors check for aligned-adjacent set
325
      uint last;
326
      if (lrgs(val_idx).is_scalable() && val->ideal_reg() == Op_VecA) {
327
        // For scalable vector register, regmask is always SlotsPerVecA bits aligned
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        last = RegMask::SlotsPerVecA - 1;
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      } else {
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        last = (n_regs-1); // Looking for the last part of a set
331
      }
332
      if ((reg&last) != last) continue; // Wrong part of a set
333
      if (!register_contains_value(vv, reg, n_regs, *value)) continue; // Different value
334
    }
335
    if( vv == val ||            // Got a direct hit?
336
        (t && vv && vv->bottom_type() == t && vv->is_Mach() &&
337
         vv->as_Mach()->rule() == val->as_Mach()->rule()) ) { // Or same constant?
338
      assert( !n->is_Phi(), "cannot change registers at a Phi so easily" );
339
      if( OptoReg::is_stack(nk_reg) || // CISC-loading from stack OR
340
          OptoReg::is_reg(reg) || // turning into a register use OR
341
          regnd->at(reg)->outcnt()==1 ) { // last use of a spill-load turns into a CISC use
342
        blk_adjust += use_prior_register(n,k,regnd->at(reg),current_block,value,regnd);
343
        if( n->in(k) == regnd->at(reg) ) // Success!  Quit trying
344
          return blk_adjust;
345
      } // End of if not degrading to a stack
346
    } // End of if found value in another register
347
  } // End of scan all machine registers
348
  return blk_adjust;
349
}
350

351

352
//
353
// Check if nreg already contains the constant value val.  Normal copy
354
// elimination doesn't doesn't work on constants because multiple
355
// nodes can represent the same constant so the type and rule of the
356
// MachNode must be checked to ensure equivalence.
357
//
358
bool PhaseChaitin::eliminate_copy_of_constant(Node* val, Node* n,
359
                                              Block *current_block,
360
                                              Node_List& value, Node_List& regnd,
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                                              OptoReg::Name nreg, OptoReg::Name nreg2) {
362
  if (value[nreg] != val && val->is_Con() &&
363
      value[nreg] != nullptr && value[nreg]->is_Con() &&
364
      (nreg2 == OptoReg::Bad || value[nreg] == value[nreg2]) &&
365
      value[nreg]->bottom_type() == val->bottom_type() &&
366
      value[nreg]->as_Mach()->rule() == val->as_Mach()->rule()) {
367
    // This code assumes that two MachNodes representing constants
368
    // which have the same rule and the same bottom type will produce
369
    // identical effects into a register.  This seems like it must be
370
    // objectively true unless there are hidden inputs to the nodes
371
    // but if that were to change this code would need to updated.
372
    // Since they are equivalent the second one if redundant and can
373
    // be removed.
374
    //
375
    // n will be replaced with the old value but n might have
376
    // kills projections associated with it so remove them now so that
377
    // yank_if_dead will be able to eliminate the copy once the uses
378
    // have been transferred to the old[value].
379
    for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
380
      Node* use = n->fast_out(i);
381
      if (use->is_Proj() && use->outcnt() == 0) {
382
        // Kill projections have no users and one input
383
        use->set_req(0, C->top());
384
        yank_if_dead(use, current_block, &value, &regnd);
385
        --i; --imax;
386
      }
387
    }
388
    _post_alloc++;
389
    return true;
390
  }
391
  return false;
392
}
393

394
// The algorithms works as follows:
395
// We traverse the block top to bottom. possibly_merge_multidef() is invoked for every input edge k
396
// of the instruction n. We check to see if the input is a multidef lrg. If it is, we record the fact that we've
397
// seen a definition (coming as an input) and add that fact to the reg2defuse array. The array maps registers to their
398
// current reaching definitions (we track only multidefs though). With each definition we also associate the first
399
// instruction we saw use it. If we encounter the situation when we observe an def (an input) that is a part of the
400
// same lrg but is different from the previous seen def we merge the two with a MachMerge node and substitute
401
// all the uses that we've seen so far to use the merge. After that we keep replacing the new defs in the same lrg
402
// as they get encountered with the merge node and keep adding these defs to the merge inputs.
403
void PhaseChaitin::merge_multidefs() {
404
  Compile::TracePhase tp("mergeMultidefs", &timers[_t_mergeMultidefs]);
405
  ResourceMark rm;
406
  // Keep track of the defs seen in registers and collect their uses in the block.
407
  RegToDefUseMap reg2defuse(_max_reg, _max_reg, RegDefUse());
408
  for (uint i = 0; i < _cfg.number_of_blocks(); i++) {
409
    Block* block = _cfg.get_block(i);
410
    for (uint j = 1; j < block->number_of_nodes(); j++) {
411
      Node* n = block->get_node(j);
412
      if (n->is_Phi()) continue;
413
      for (uint k = 1; k < n->req(); k++) {
414
        j += possibly_merge_multidef(n, k, block, reg2defuse);
415
      }
416
      // Null out the value produced by the instruction itself, since we're only interested in defs
417
      // implicitly defined by the uses. We are actually interested in tracking only redefinitions
418
      // of the multidef lrgs in the same register. For that matter it's enough to track changes in
419
      // the base register only and ignore other effects of multi-register lrgs and fat projections.
420
      // It is also ok to ignore defs coming from singledefs. After an implicit overwrite by one of
421
      // those our register is guaranteed to be used by another lrg and we won't attempt to merge it.
422
      uint lrg = _lrg_map.live_range_id(n);
423
      if (lrg > 0 && lrgs(lrg).is_multidef()) {
424
        OptoReg::Name reg = lrgs(lrg).reg();
425
        reg2defuse.at(reg).clear();
426
      }
427
    }
428
    // Clear reg->def->use tracking for the next block
429
    for (int j = 0; j < reg2defuse.length(); j++) {
430
      reg2defuse.at(j).clear();
431
    }
432
  }
433
}
434

435
int PhaseChaitin::possibly_merge_multidef(Node *n, uint k, Block *block, RegToDefUseMap& reg2defuse) {
436
  int blk_adjust = 0;
437

438
  uint lrg = _lrg_map.live_range_id(n->in(k));
439
  if (lrg > 0 && lrgs(lrg).is_multidef()) {
440
    OptoReg::Name reg = lrgs(lrg).reg();
441

442
    Node* def = reg2defuse.at(reg).def();
443
    if (def != nullptr && lrg == _lrg_map.live_range_id(def) && def != n->in(k)) {
444
      // Same lrg but different node, we have to merge.
445
      MachMergeNode* merge;
446
      if (def->is_MachMerge()) { // is it already a merge?
447
        merge = def->as_MachMerge();
448
      } else {
449
        merge = new MachMergeNode(def);
450

451
        // Insert the merge node into the block before the first use.
452
        uint use_index = block->find_node(reg2defuse.at(reg).first_use());
453
        block->insert_node(merge, use_index++);
454
        _cfg.map_node_to_block(merge, block);
455

456
        // Let the allocator know about the new node, use the same lrg
457
        _lrg_map.extend(merge->_idx, lrg);
458
        blk_adjust++;
459

460
        // Fixup all the uses (there is at least one) that happened between the first
461
        // use and before the current one.
462
        for (; use_index < block->number_of_nodes(); use_index++) {
463
          Node* use = block->get_node(use_index);
464
          if (use == n) {
465
            break;
466
          }
467
          use->replace_edge(def, merge, nullptr);
468
        }
469
      }
470
      if (merge->find_edge(n->in(k)) == -1) {
471
        merge->add_req(n->in(k));
472
      }
473
      n->set_req(k, merge);
474
    }
475

476
    // update the uses
477
    reg2defuse.at(reg).update(n->in(k), n);
478
  }
479

480
  return blk_adjust;
481
}
482

483

484
//------------------------------post_allocate_copy_removal---------------------
485
// Post-Allocation peephole copy removal.  We do this in 1 pass over the
486
// basic blocks.  We maintain a mapping of registers to Nodes (an  array of
487
// Nodes indexed by machine register or stack slot number).  null means that a
488
// register is not mapped to any Node.  We can (want to have!) have several
489
// registers map to the same Node.  We walk forward over the instructions
490
// updating the mapping as we go.  At merge points we force a null if we have
491
// to merge 2 different Nodes into the same register.  Phi functions will give
492
// us a new Node if there is a proper value merging.  Since the blocks are
493
// arranged in some RPO, we will visit all parent blocks before visiting any
494
// successor blocks (except at loops).
495
//
496
// If we find a Copy we look to see if the Copy's source register is a stack
497
// slot and that value has already been loaded into some machine register; if
498
// so we use machine register directly.  This turns a Load into a reg-reg
499
// Move.  We also look for reloads of identical constants.
500
//
501
// When we see a use from a reg-reg Copy, we will attempt to use the copy's
502
// source directly and make the copy go dead.
503
void PhaseChaitin::post_allocate_copy_removal() {
504
  Compile::TracePhase tp("postAllocCopyRemoval", &timers[_t_postAllocCopyRemoval]);
505
  ResourceMark rm;
506

507
  // Need a mapping from basic block Node_Lists.  We need a Node_List to
508
  // map from register number to value-producing Node.
509
  Node_List **blk2value = NEW_RESOURCE_ARRAY( Node_List *, _cfg.number_of_blocks() + 1);
510
  memset(blk2value, 0, sizeof(Node_List*) * (_cfg.number_of_blocks() + 1));
511
  // Need a mapping from basic block Node_Lists.  We need a Node_List to
512
  // map from register number to register-defining Node.
513
  Node_List **blk2regnd = NEW_RESOURCE_ARRAY( Node_List *, _cfg.number_of_blocks() + 1);
514
  memset(blk2regnd, 0, sizeof(Node_List*) * (_cfg.number_of_blocks() + 1));
515

516
  // We keep unused Node_Lists on a free_list to avoid wasting
517
  // memory.
518
  GrowableArray<Node_List*> free_list = GrowableArray<Node_List*>(16);
519

520
  // For all blocks
521
  for (uint i = 0; i < _cfg.number_of_blocks(); i++) {
522
    uint j;
523
    Block* block = _cfg.get_block(i);
524

525
    // Count of Phis in block
526
    uint phi_dex;
527
    for (phi_dex = 1; phi_dex < block->number_of_nodes(); phi_dex++) {
528
      Node* phi = block->get_node(phi_dex);
529
      if (!phi->is_Phi()) {
530
        break;
531
      }
532
    }
533

534
    // If any predecessor has not been visited, we do not know the state
535
    // of registers at the start.  Check for this, while updating copies
536
    // along Phi input edges
537
    bool missing_some_inputs = false;
538
    Block *freed = nullptr;
539
    for (j = 1; j < block->num_preds(); j++) {
540
      Block* pb = _cfg.get_block_for_node(block->pred(j));
541
      // Remove copies along phi edges
542
      for (uint k = 1; k < phi_dex; k++) {
543
        elide_copy(block->get_node(k), j, block, blk2value[pb->_pre_order], blk2regnd[pb->_pre_order], false);
544
      }
545
      if (blk2value[pb->_pre_order]) { // Have a mapping on this edge?
546
        // See if this predecessor's mappings have been used by everybody
547
        // who wants them.  If so, free 'em.
548
        uint k;
549
        for (k = 0; k < pb->_num_succs; k++) {
550
          Block* pbsucc = pb->_succs[k];
551
          if (!blk2value[pbsucc->_pre_order] && pbsucc != block) {
552
            break;              // Found a future user
553
          }
554
        }
555
        if (k >= pb->_num_succs) { // No more uses, free!
556
          freed = pb;           // Record last block freed
557
          free_list.push(blk2value[pb->_pre_order]);
558
          free_list.push(blk2regnd[pb->_pre_order]);
559
        }
560
      } else {                  // This block has unvisited (loopback) inputs
561
        missing_some_inputs = true;
562
      }
563
    }
564

565
    // Extract Node_List mappings.  If 'freed' is non-zero, we just popped
566
    // 'freed's blocks off the list
567
    Node_List &regnd = *(free_list.is_empty() ? new Node_List(_max_reg) : free_list.pop());
568
    Node_List &value = *(free_list.is_empty() ? new Node_List(_max_reg) : free_list.pop());
569
    assert( !freed || blk2value[freed->_pre_order] == &value, "" );
570
    // Set mappings as OUR mappings
571
    blk2value[block->_pre_order] = &value;
572
    blk2regnd[block->_pre_order] = &regnd;
573

574
    // Initialize value & regnd for this block
575
    if (missing_some_inputs) {
576
      // Some predecessor has not yet been visited; zap map to empty if necessary
577
      if (freed) {
578
        value.clear();
579
        regnd.clear();
580
      }
581
    } else {
582
      if (!freed) {            // Didn't get a freebie prior block
583
        // Must clone some data
584
        freed = _cfg.get_block_for_node(block->pred(1));
585
        value.copy(*blk2value[freed->_pre_order]);
586
        regnd.copy(*blk2regnd[freed->_pre_order]);
587
      }
588
      // Merge all inputs together, setting to null any conflicts.
589
      for (j = 1; j < block->num_preds(); j++) {
590
        Block* pb = _cfg.get_block_for_node(block->pred(j));
591
        if (pb == freed) {
592
          continue; // Did self already via freelist
593
        }
594
        Node_List &p_regnd = *blk2regnd[pb->_pre_order];
595
        for (uint k = 0; k < (uint)_max_reg; k++) {
596
          if (regnd[k] != p_regnd[k]) { // Conflict on reaching defs?
597
            value.map(k, nullptr); // Then no value handy
598
            regnd.map(k, nullptr);
599
          }
600
        }
601
      }
602
    }
603

604
    // For all Phi's
605
    for (j = 1; j < phi_dex; j++) {
606
      uint k;
607
      Node *phi = block->get_node(j);
608
      uint pidx = _lrg_map.live_range_id(phi);
609
      OptoReg::Name preg = lrgs(pidx).reg();
610

611
      // Remove copies remaining on edges.  Check for junk phi.
612
      Node *u = nullptr;
613
      for (k = 1; k < phi->req(); k++) {
614
        Node *x = phi->in(k);
615
        if( phi != x && u != x ) // Found a different input
616
          u = u ? NodeSentinel : x; // Capture unique input, or NodeSentinel for 2nd input
617
      }
618
      if (u != NodeSentinel || phi->outcnt() == 0) {    // Junk Phi.  Remove
619
        phi->replace_by(u);
620
        j -= yank_if_dead(phi, block, &value, &regnd);
621
        phi_dex--;
622
        continue;
623
      }
624
      // Note that if value[pidx] exists, then we merged no new values here
625
      // and the phi is useless.  This can happen even with the above phi
626
      // removal for complex flows.  I cannot keep the better known value here
627
      // because locally the phi appears to define a new merged value.  If I
628
      // keep the better value then a copy of the phi, being unable to use the
629
      // global flow analysis, can't "peek through" the phi to the original
630
      // reaching value and so will act like it's defining a new value.  This
631
      // can lead to situations where some uses are from the old and some from
632
      // the new values.  Not illegal by itself but throws the over-strong
633
      // assert in scheduling.
634
      if (pidx) {
635
        value.map(preg, phi);
636
        regnd.map(preg, phi);
637
        int n_regs = RegMask::num_registers(phi->ideal_reg(), lrgs(pidx));
638
        for (int l = 1; l < n_regs; l++) {
639
          OptoReg::Name preg_lo = OptoReg::add(preg,-l);
640
          value.map(preg_lo, phi);
641
          regnd.map(preg_lo, phi);
642
        }
643
      }
644
    }
645

646
    // For all remaining instructions
647
    for (j = phi_dex; j < block->number_of_nodes(); j++) {
648
      Node* n = block->get_node(j);
649

650
      if(n->outcnt() == 0 &&   // Dead?
651
         n != C->top() &&      // (ignore TOP, it has no du info)
652
         !n->is_Proj() ) {     // fat-proj kills
653
        j -= yank_if_dead(n, block, &value, &regnd);
654
        continue;
655
      }
656

657
      // Improve reaching-def info.  Occasionally post-alloc's liveness gives
658
      // up (at loop backedges, because we aren't doing a full flow pass).
659
      // The presence of a live use essentially asserts that the use's def is
660
      // alive and well at the use (or else the allocator fubar'd).  Take
661
      // advantage of this info to set a reaching def for the use-reg.
662
      uint k;
663
      for (k = 1; k < n->req(); k++) {
664
        Node *def = n->in(k);   // n->in(k) is a USE; def is the DEF for this USE
665
        guarantee(def != nullptr, "no disconnected nodes at this point");
666
        uint useidx = _lrg_map.live_range_id(def); // useidx is the live range index for this USE
667

668
        if( useidx ) {
669
          OptoReg::Name ureg = lrgs(useidx).reg();
670
          if( !value[ureg] ) {
671
            int idx;            // Skip occasional useless copy
672
            while( (idx=def->is_Copy()) != 0 &&
673
                   def->in(idx) != nullptr &&  // null should not happen
674
                   ureg == lrgs(_lrg_map.live_range_id(def->in(idx))).reg())
675
              def = def->in(idx);
676
            Node *valdef = skip_copies(def); // tighten up val through non-useless copies
677
            value.map(ureg,valdef); // record improved reaching-def info
678
            regnd.map(ureg,   def);
679
            // Record other half of doubles
680
            uint def_ideal_reg = def->ideal_reg();
681
            int n_regs = RegMask::num_registers(def_ideal_reg, lrgs(_lrg_map.live_range_id(def)));
682
            for (int l = 1; l < n_regs; l++) {
683
              OptoReg::Name ureg_lo = OptoReg::add(ureg,-l);
684
              if (!value[ureg_lo] &&
685
                  (!RegMask::can_represent(ureg_lo) ||
686
                   lrgs(useidx).mask().Member(ureg_lo))) { // Nearly always adjacent
687
                value.map(ureg_lo,valdef); // record improved reaching-def info
688
                regnd.map(ureg_lo,   def);
689
              }
690
            }
691
          }
692
        }
693
      }
694

695
      const uint two_adr = n->is_Mach() ? n->as_Mach()->two_adr() : 0;
696

697
      // Remove copies along input edges
698
      for (k = 1; k < n->req(); k++) {
699
        j -= elide_copy(n, k, block, &value, &regnd, two_adr != k);
700
      }
701

702
      // Unallocated Nodes define no registers
703
      uint lidx = _lrg_map.live_range_id(n);
704
      if (!lidx) {
705
        continue;
706
      }
707

708
      // Update the register defined by this instruction
709
      OptoReg::Name nreg = lrgs(lidx).reg();
710
      // Skip through all copies to the _value_ being defined.
711
      // Do not change from int to pointer
712
      Node *val = skip_copies(n);
713

714
      // Clear out a dead definition before starting so that the
715
      // elimination code doesn't have to guard against it.  The
716
      // definition could in fact be a kill projection with a count of
717
      // 0 which is safe but since those are uninteresting for copy
718
      // elimination just delete them as well.
719
      if (regnd[nreg] != nullptr && regnd[nreg]->outcnt() == 0) {
720
        regnd.map(nreg, nullptr);
721
        value.map(nreg, nullptr);
722
      }
723

724
      uint n_ideal_reg = n->ideal_reg();
725
      int n_regs = RegMask::num_registers(n_ideal_reg, lrgs(lidx));
726
      if (n_regs == 1) {
727
        // If Node 'n' does not change the value mapped by the register,
728
        // then 'n' is a useless copy.  Do not update the register->node
729
        // mapping so 'n' will go dead.
730
        if( value[nreg] != val ) {
731
          if (eliminate_copy_of_constant(val, n, block, value, regnd, nreg, OptoReg::Bad)) {
732
            j -= replace_and_yank_if_dead(n, nreg, block, value, regnd);
733
          } else {
734
            // Update the mapping: record new Node defined by the register
735
            regnd.map(nreg,n);
736
            // Update mapping for defined *value*, which is the defined
737
            // Node after skipping all copies.
738
            value.map(nreg,val);
739
          }
740
        } else if( !may_be_copy_of_callee(n) ) {
741
          assert(n->is_Copy(), "");
742
          j -= replace_and_yank_if_dead(n, nreg, block, value, regnd);
743
        }
744
      } else if (RegMask::is_vector(n_ideal_reg)) {
745
        // If Node 'n' does not change the value mapped by the register,
746
        // then 'n' is a useless copy.  Do not update the register->node
747
        // mapping so 'n' will go dead.
748
        if (!register_contains_value(val, nreg, n_regs, value)) {
749
          // Update the mapping: record new Node defined by the register
750
          regnd.map(nreg,n);
751
          // Update mapping for defined *value*, which is the defined
752
          // Node after skipping all copies.
753
          value.map(nreg,val);
754
          for (int l = 1; l < n_regs; l++) {
755
            OptoReg::Name nreg_lo = OptoReg::add(nreg,-l);
756
            regnd.map(nreg_lo, n );
757
            value.map(nreg_lo,val);
758
          }
759
        } else if (n->is_Copy()) {
760
          // Note: vector can't be constant and can't be copy of calee.
761
          j -= replace_and_yank_if_dead(n, nreg, block, value, regnd);
762
        }
763
      } else {
764
        // If the value occupies a register pair, record same info
765
        // in both registers.
766
        OptoReg::Name nreg_lo = OptoReg::add(nreg,-1);
767
        if( RegMask::can_represent(nreg_lo) &&     // Either a spill slot, or
768
            !lrgs(lidx).mask().Member(nreg_lo) ) { // Nearly always adjacent
769
          // Sparc occasionally has non-adjacent pairs.
770
          // Find the actual other value
771
          RegMask tmp = lrgs(lidx).mask();
772
          tmp.Remove(nreg);
773
          nreg_lo = tmp.find_first_elem();
774
        }
775
        if (value[nreg] != val || value[nreg_lo] != val) {
776
          if (eliminate_copy_of_constant(val, n, block, value, regnd, nreg, nreg_lo)) {
777
            j -= replace_and_yank_if_dead(n, nreg, block, value, regnd);
778
          } else {
779
            regnd.map(nreg   , n );
780
            regnd.map(nreg_lo, n );
781
            value.map(nreg   ,val);
782
            value.map(nreg_lo,val);
783
          }
784
        } else if (!may_be_copy_of_callee(n)) {
785
          assert(n->is_Copy(), "");
786
          j -= replace_and_yank_if_dead(n, nreg, block, value, regnd);
787
        }
788
      }
789

790
      // Fat projections kill many registers
791
      if (n_ideal_reg == MachProjNode::fat_proj) {
792
        RegMaskIterator rmi(n->out_RegMask());
793
        while (rmi.has_next()) {
794
          nreg = rmi.next();
795
          value.map(nreg, n);
796
          regnd.map(nreg, n);
797
        }
798
      }
799

800
    } // End of for all instructions in the block
801

802
  } // End for all blocks
803
}
804