jdk

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/*
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 * Copyright (c) 1998, 2024, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "asm/macroAssembler.inline.hpp"
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#include "gc/shared/gc_globals.hpp"
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#include "memory/allocation.inline.hpp"
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#include "oops/compressedOops.hpp"
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#include "opto/ad.hpp"
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#include "opto/block.hpp"
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#include "opto/c2compiler.hpp"
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#include "opto/callnode.hpp"
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#include "opto/cfgnode.hpp"
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#include "opto/machnode.hpp"
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#include "opto/runtime.hpp"
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#include "opto/chaitin.hpp"
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#include "runtime/os.inline.hpp"
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#include "runtime/sharedRuntime.hpp"
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// Optimization - Graph Style
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// Check whether val is not-null-decoded compressed oop,
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// i.e. will grab into the base of the heap if it represents null.
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static bool accesses_heap_base_zone(Node *val) {
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  if (CompressedOops::base() != nullptr) { // Implies UseCompressedOops.
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    if (val && val->is_Mach()) {
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      if (val->as_Mach()->ideal_Opcode() == Op_DecodeN) {
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        // This assumes all Decodes with TypePtr::NotNull are matched to nodes that
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        // decode null to point to the heap base (Decode_NN).
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        if (val->bottom_type()->is_oopptr()->ptr() == TypePtr::NotNull) {
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          return true;
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        }
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      }
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      // Must recognize load operation with Decode matched in memory operand.
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      // We should not reach here except for PPC/AIX, as os::zero_page_read_protected()
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      // returns true everywhere else. On PPC, no such memory operands
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      // exist, therefore we did not yet implement a check for such operands.
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      NOT_AIX(Unimplemented());
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    }
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  }
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  return false;
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}
64

65
static bool needs_explicit_null_check_for_read(Node *val) {
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  // On some OSes (AIX) the page at address 0 is only write protected.
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  // If so, only Store operations will trap.
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  if (os::zero_page_read_protected()) {
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    return false;  // Implicit null check will work.
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  }
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  // Also a read accessing the base of a heap-based compressed heap will trap.
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  if (accesses_heap_base_zone(val) &&         // Hits the base zone page.
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      CompressedOops::use_implicit_null_checks()) { // Base zone page is protected.
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    return false;
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  }
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77
  return true;
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}
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//------------------------------implicit_null_check----------------------------
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// Detect implicit-null-check opportunities.  Basically, find null checks
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// with suitable memory ops nearby.  Use the memory op to do the null check.
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// I can generate a memory op if there is not one nearby.
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// The proj is the control projection for the not-null case.
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// The val is the pointer being checked for nullness or
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// decodeHeapOop_not_null node if it did not fold into address.
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void PhaseCFG::implicit_null_check(Block* block, Node *proj, Node *val, int allowed_reasons) {
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  // Assume if null check need for 0 offset then always needed
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  // Intel solaris doesn't support any null checks yet and no
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  // mechanism exists (yet) to set the switches at an os_cpu level
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  if( !ImplicitNullChecks || MacroAssembler::needs_explicit_null_check(0)) return;
92

93
  // Make sure the ptr-is-null path appears to be uncommon!
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  float f = block->end()->as_MachIf()->_prob;
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  if( proj->Opcode() == Op_IfTrue ) f = 1.0f - f;
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  if( f > PROB_UNLIKELY_MAG(4) ) return;
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  uint bidx = 0;                // Capture index of value into memop
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  bool was_store;               // Memory op is a store op
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  // Get the successor block for if the test ptr is non-null
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  Block* not_null_block;  // this one goes with the proj
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  Block* null_block;
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  if (block->get_node(block->number_of_nodes()-1) == proj) {
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    null_block     = block->_succs[0];
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    not_null_block = block->_succs[1];
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  } else {
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    assert(block->get_node(block->number_of_nodes()-2) == proj, "proj is one or the other");
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    not_null_block = block->_succs[0];
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    null_block     = block->_succs[1];
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  }
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  while (null_block->is_Empty() == Block::empty_with_goto) {
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    null_block     = null_block->_succs[0];
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  }
115

116
  // Search the exception block for an uncommon trap.
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  // (See Parse::do_if and Parse::do_ifnull for the reason
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  // we need an uncommon trap.  Briefly, we need a way to
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  // detect failure of this optimization, as in 6366351.)
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  {
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    bool found_trap = false;
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    for (uint i1 = 0; i1 < null_block->number_of_nodes(); i1++) {
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      Node* nn = null_block->get_node(i1);
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      if (nn->is_MachCall() &&
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          nn->as_MachCall()->entry_point() == SharedRuntime::uncommon_trap_blob()->entry_point()) {
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        const Type* trtype = nn->in(TypeFunc::Parms)->bottom_type();
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        if (trtype->isa_int() && trtype->is_int()->is_con()) {
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          jint tr_con = trtype->is_int()->get_con();
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          Deoptimization::DeoptReason reason = Deoptimization::trap_request_reason(tr_con);
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          Deoptimization::DeoptAction action = Deoptimization::trap_request_action(tr_con);
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          assert((int)reason < (int)BitsPerInt, "recode bit map");
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          if (is_set_nth_bit(allowed_reasons, (int) reason)
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              && action != Deoptimization::Action_none) {
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            // This uncommon trap is sure to recompile, eventually.
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            // When that happens, C->too_many_traps will prevent
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            // this transformation from happening again.
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            found_trap = true;
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          }
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        }
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        break;
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      }
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    }
143
    if (!found_trap) {
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      // We did not find an uncommon trap.
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      return;
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    }
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  }
148

149
  // Check for decodeHeapOop_not_null node which did not fold into address
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  bool is_decoden = ((intptr_t)val) & 1;
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  val = (Node*)(((intptr_t)val) & ~1);
152

153
  assert(!is_decoden ||
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         ((val->in(0) == nullptr) && val->is_Mach() &&
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          (val->as_Mach()->ideal_Opcode() == Op_DecodeN)), "sanity");
156

157
  // Search the successor block for a load or store who's base value is also
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  // the tested value.  There may be several.
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  MachNode *best = nullptr;        // Best found so far
160
  for (DUIterator i = val->outs(); val->has_out(i); i++) {
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    Node *m = val->out(i);
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    if( !m->is_Mach() ) continue;
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    MachNode *mach = m->as_Mach();
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    was_store = false;
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    int iop = mach->ideal_Opcode();
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    switch( iop ) {
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    case Op_LoadB:
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    case Op_LoadUB:
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    case Op_LoadUS:
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    case Op_LoadD:
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    case Op_LoadF:
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    case Op_LoadI:
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    case Op_LoadL:
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    case Op_LoadP:
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    case Op_LoadN:
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    case Op_LoadS:
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    case Op_LoadKlass:
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    case Op_LoadNKlass:
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    case Op_LoadRange:
180
    case Op_LoadD_unaligned:
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    case Op_LoadL_unaligned:
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      assert(mach->in(2) == val, "should be address");
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      break;
184
    case Op_StoreB:
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    case Op_StoreC:
186
    case Op_StoreCM:
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    case Op_StoreD:
188
    case Op_StoreF:
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    case Op_StoreI:
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    case Op_StoreL:
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    case Op_StoreP:
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    case Op_StoreN:
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    case Op_StoreNKlass:
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      was_store = true;         // Memory op is a store op
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      // Stores will have their address in slot 2 (memory in slot 1).
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      // If the value being nul-checked is in another slot, it means we
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      // are storing the checked value, which does NOT check the value!
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      if( mach->in(2) != val ) continue;
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      break;                    // Found a memory op?
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    case Op_StrComp:
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    case Op_StrEquals:
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    case Op_StrIndexOf:
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    case Op_StrIndexOfChar:
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    case Op_AryEq:
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    case Op_VectorizedHashCode:
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    case Op_StrInflatedCopy:
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    case Op_StrCompressedCopy:
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    case Op_EncodeISOArray:
209
    case Op_CountPositives:
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      // Not a legit memory op for implicit null check regardless of
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      // embedded loads
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      continue;
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    default:                    // Also check for embedded loads
214
      if( !mach->needs_anti_dependence_check() )
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        continue;               // Not an memory op; skip it
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      if( must_clone[iop] ) {
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        // Do not move nodes which produce flags because
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        // RA will try to clone it to place near branch and
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        // it will cause recompilation, see clone_node().
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        continue;
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      }
222
      {
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        // Check that value is used in memory address in
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        // instructions with embedded load (CmpP val1,(val2+off)).
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        Node* base;
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        Node* index;
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        const MachOper* oper = mach->memory_inputs(base, index);
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        if (oper == nullptr || oper == (MachOper*)-1) {
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          continue;             // Not an memory op; skip it
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        }
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        if (val == base ||
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            (val == index && val->bottom_type()->isa_narrowoop())) {
233
          break;                // Found it
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        } else {
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          continue;             // Skip it
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        }
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      }
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      break;
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    }
240

241
    // On some OSes (AIX) the page at address 0 is only write protected.
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    // If so, only Store operations will trap.
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    // But a read accessing the base of a heap-based compressed heap will trap.
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    if (!was_store && needs_explicit_null_check_for_read(val)) {
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      continue;
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    }
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248
    // Check that node's control edge is not-null block's head or dominates it,
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    // otherwise we can't hoist it because there are other control dependencies.
250
    Node* ctrl = mach->in(0);
251
    if (ctrl != nullptr && !(ctrl == not_null_block->head() ||
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        get_block_for_node(ctrl)->dominates(not_null_block))) {
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      continue;
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    }
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    // check if the offset is not too high for implicit exception
257
    {
258
      intptr_t offset = 0;
259
      const TypePtr *adr_type = nullptr;  // Do not need this return value here
260
      const Node* base = mach->get_base_and_disp(offset, adr_type);
261
      if (base == nullptr || base == NodeSentinel) {
262
        // Narrow oop address doesn't have base, only index.
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        // Give up if offset is beyond page size or if heap base is not protected.
264
        if (val->bottom_type()->isa_narrowoop() &&
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            (MacroAssembler::needs_explicit_null_check(offset) ||
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             !CompressedOops::use_implicit_null_checks()))
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          continue;
268
        // cannot reason about it; is probably not implicit null exception
269
      } else {
270
        const TypePtr* tptr;
271
        if ((UseCompressedOops || UseCompressedClassPointers) &&
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            (CompressedOops::shift() == 0 || CompressedKlassPointers::shift() == 0)) {
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          // 32-bits narrow oop can be the base of address expressions
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          tptr = base->get_ptr_type();
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        } else {
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          // only regular oops are expected here
277
          tptr = base->bottom_type()->is_ptr();
278
        }
279
        // Give up if offset is not a compile-time constant.
280
        if (offset == Type::OffsetBot || tptr->_offset == Type::OffsetBot)
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          continue;
282
        offset += tptr->_offset; // correct if base is offsetted
283
        // Give up if reference is beyond page size.
284
        if (MacroAssembler::needs_explicit_null_check(offset))
285
          continue;
286
        // Give up if base is a decode node and the heap base is not protected.
287
        if (base->is_Mach() && base->as_Mach()->ideal_Opcode() == Op_DecodeN &&
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            !CompressedOops::use_implicit_null_checks())
289
          continue;
290
      }
291
    }
292

293
    // Check ctrl input to see if the null-check dominates the memory op
294
    Block *cb = get_block_for_node(mach);
295
    cb = cb->_idom;             // Always hoist at least 1 block
296
    if( !was_store ) {          // Stores can be hoisted only one block
297
      while( cb->_dom_depth > (block->_dom_depth + 1))
298
        cb = cb->_idom;         // Hoist loads as far as we want
299
      // The non-null-block should dominate the memory op, too. Live
300
      // range spilling will insert a spill in the non-null-block if it is
301
      // needs to spill the memory op for an implicit null check.
302
      if (cb->_dom_depth == (block->_dom_depth + 1)) {
303
        if (cb != not_null_block) continue;
304
        cb = cb->_idom;
305
      }
306
    }
307
    if( cb != block ) continue;
308

309
    // Found a memory user; see if it can be hoisted to check-block
310
    uint vidx = 0;              // Capture index of value into memop
311
    uint j;
312
    for( j = mach->req()-1; j > 0; j-- ) {
313
      if( mach->in(j) == val ) {
314
        vidx = j;
315
        // Ignore DecodeN val which could be hoisted to where needed.
316
        if( is_decoden ) continue;
317
      }
318
      // Block of memory-op input
319
      Block *inb = get_block_for_node(mach->in(j));
320
      Block *b = block;          // Start from nul check
321
      while( b != inb && b->_dom_depth > inb->_dom_depth )
322
        b = b->_idom;           // search upwards for input
323
      // See if input dominates null check
324
      if( b != inb )
325
        break;
326
    }
327
    if( j > 0 )
328
      continue;
329
    Block *mb = get_block_for_node(mach);
330
    // Hoisting stores requires more checks for the anti-dependence case.
331
    // Give up hoisting if we have to move the store past any load.
332
    if (was_store) {
333
       // Make sure control does not do a merge (would have to check allpaths)
334
       if (mb->num_preds() != 2) {
335
         continue;
336
       }
337
       // mach is a store, hence block is the immediate dominator of mb.
338
       // Due to the null-check shape of block (where its successors cannot re-join),
339
       // block must be the direct predecessor of mb.
340
       assert(get_block_for_node(mb->pred(1)) == block, "Unexpected predecessor block");
341
       uint k;
342
       uint num_nodes = mb->number_of_nodes();
343
       for (k = 1; k < num_nodes; k++) {
344
         Node *n = mb->get_node(k);
345
         if (n->needs_anti_dependence_check() &&
346
             n->in(LoadNode::Memory) == mach->in(StoreNode::Memory)) {
347
           break;              // Found anti-dependent load
348
         }
349
       }
350
       if (k < num_nodes) {
351
         continue;             // Found anti-dependent load
352
       }
353
    }
354

355
    // Make sure this memory op is not already being used for a NullCheck
356
    Node *e = mb->end();
357
    if( e->is_MachNullCheck() && e->in(1) == mach )
358
      continue;                 // Already being used as a null check
359

360
    // Found a candidate!  Pick one with least dom depth - the highest
361
    // in the dom tree should be closest to the null check.
362
    if (best == nullptr || get_block_for_node(mach)->_dom_depth < get_block_for_node(best)->_dom_depth) {
363
      best = mach;
364
      bidx = vidx;
365
    }
366
  }
367
  // No candidate!
368
  if (best == nullptr) {
369
    return;
370
  }
371

372
  // ---- Found an implicit null check
373
#ifndef PRODUCT
374
  extern uint implicit_null_checks;
375
  implicit_null_checks++;
376
#endif
377

378
  if( is_decoden ) {
379
    // Check if we need to hoist decodeHeapOop_not_null first.
380
    Block *valb = get_block_for_node(val);
381
    if( block != valb && block->_dom_depth < valb->_dom_depth ) {
382
      // Hoist it up to the end of the test block together with its inputs if they exist.
383
      for (uint i = 2; i < val->req(); i++) {
384
        // DecodeN has 2 regular inputs + optional MachTemp or load Base inputs.
385
        Node *temp = val->in(i);
386
        Block *tempb = get_block_for_node(temp);
387
        if (!tempb->dominates(block)) {
388
          assert(block->dominates(tempb), "sanity check: temp node placement");
389
          // We only expect nodes without further inputs, like MachTemp or load Base.
390
          assert(temp->req() == 0 || (temp->req() == 1 && temp->in(0) == (Node*)C->root()),
391
                 "need for recursive hoisting not expected");
392
          tempb->find_remove(temp);
393
          block->add_inst(temp);
394
          map_node_to_block(temp, block);
395
        }
396
      }
397
      valb->find_remove(val);
398
      block->add_inst(val);
399
      map_node_to_block(val, block);
400
      // DecodeN on x86 may kill flags. Check for flag-killing projections
401
      // that also need to be hoisted.
402
      for (DUIterator_Fast jmax, j = val->fast_outs(jmax); j < jmax; j++) {
403
        Node* n = val->fast_out(j);
404
        if( n->is_MachProj() ) {
405
          get_block_for_node(n)->find_remove(n);
406
          block->add_inst(n);
407
          map_node_to_block(n, block);
408
        }
409
      }
410
    }
411
  }
412
  // Hoist the memory candidate up to the end of the test block.
413
  Block *old_block = get_block_for_node(best);
414
  old_block->find_remove(best);
415
  block->add_inst(best);
416
  map_node_to_block(best, block);
417

418
  // Move the control dependence if it is pinned to not-null block.
419
  // Don't change it in other cases: null or dominating control.
420
  Node* ctrl = best->in(0);
421
  if (ctrl != nullptr && get_block_for_node(ctrl) == not_null_block) {
422
    // Set it to control edge of null check.
423
    best->set_req(0, proj->in(0)->in(0));
424
  }
425

426
  // Check for flag-killing projections that also need to be hoisted
427
  // Should be DU safe because no edge updates.
428
  for (DUIterator_Fast jmax, j = best->fast_outs(jmax); j < jmax; j++) {
429
    Node* n = best->fast_out(j);
430
    if( n->is_MachProj() ) {
431
      get_block_for_node(n)->find_remove(n);
432
      block->add_inst(n);
433
      map_node_to_block(n, block);
434
    }
435
  }
436

437
  // proj==Op_True --> ne test; proj==Op_False --> eq test.
438
  // One of two graph shapes got matched:
439
  //   (IfTrue  (If (Bool NE (CmpP ptr null))))
440
  //   (IfFalse (If (Bool EQ (CmpP ptr null))))
441
  // null checks are always branch-if-eq.  If we see a IfTrue projection
442
  // then we are replacing a 'ne' test with a 'eq' null check test.
443
  // We need to flip the projections to keep the same semantics.
444
  if( proj->Opcode() == Op_IfTrue ) {
445
    // Swap order of projections in basic block to swap branch targets
446
    Node *tmp1 = block->get_node(block->end_idx()+1);
447
    Node *tmp2 = block->get_node(block->end_idx()+2);
448
    block->map_node(tmp2, block->end_idx()+1);
449
    block->map_node(tmp1, block->end_idx()+2);
450
    Node *tmp = new Node(C->top()); // Use not null input
451
    tmp1->replace_by(tmp);
452
    tmp2->replace_by(tmp1);
453
    tmp->replace_by(tmp2);
454
    tmp->destruct(nullptr);
455
  }
456

457
  // Remove the existing null check; use a new implicit null check instead.
458
  // Since schedule-local needs precise def-use info, we need to correct
459
  // it as well.
460
  Node *old_tst = proj->in(0);
461
  MachNode *nul_chk = new MachNullCheckNode(old_tst->in(0),best,bidx);
462
  block->map_node(nul_chk, block->end_idx());
463
  map_node_to_block(nul_chk, block);
464
  // Redirect users of old_test to nul_chk
465
  for (DUIterator_Last i2min, i2 = old_tst->last_outs(i2min); i2 >= i2min; --i2)
466
    old_tst->last_out(i2)->set_req(0, nul_chk);
467
  // Clean-up any dead code
468
  for (uint i3 = 0; i3 < old_tst->req(); i3++) {
469
    Node* in = old_tst->in(i3);
470
    old_tst->set_req(i3, nullptr);
471
    if (in->outcnt() == 0) {
472
      // Remove dead input node
473
      in->disconnect_inputs(C);
474
      block->find_remove(in);
475
    }
476
  }
477

478
  latency_from_uses(nul_chk);
479
  latency_from_uses(best);
480

481
  // insert anti-dependences to defs in this block
482
  if (! best->needs_anti_dependence_check()) {
483
    for (uint k = 1; k < block->number_of_nodes(); k++) {
484
      Node *n = block->get_node(k);
485
      if (n->needs_anti_dependence_check() &&
486
          n->in(LoadNode::Memory) == best->in(StoreNode::Memory)) {
487
        // Found anti-dependent load
488
        insert_anti_dependences(block, n);
489
      }
490
    }
491
  }
492
}
493

494

495
//------------------------------select-----------------------------------------
496
// Select a nice fellow from the worklist to schedule next. If there is only one
497
// choice, then use it. CreateEx nodes that are initially ready must start their
498
// blocks and are given the highest priority, by being placed at the beginning
499
// of the worklist. Next after initially-ready CreateEx nodes are projections,
500
// which must follow their parents, and CreateEx nodes with local input
501
// dependencies. Next are constants and CheckCastPP nodes. There are a number of
502
// other special cases, for instructions that consume condition codes, et al.
503
// These are chosen immediately. Some instructions are required to immediately
504
// precede the last instruction in the block, and these are taken last. Of the
505
// remaining cases (most), choose the instruction with the greatest latency
506
// (that is, the most number of pseudo-cycles required to the end of the
507
// routine). If there is a tie, choose the instruction with the most inputs.
508
Node* PhaseCFG::select(
509
  Block* block,
510
  Node_List &worklist,
511
  GrowableArray<int> &ready_cnt,
512
  VectorSet &next_call,
513
  uint sched_slot,
514
  intptr_t* recalc_pressure_nodes) {
515

516
  // If only a single entry on the stack, use it
517
  uint cnt = worklist.size();
518
  if (cnt == 1) {
519
    Node *n = worklist[0];
520
    worklist.map(0,worklist.pop());
521
    return n;
522
  }
523

524
  uint choice  = 0; // Bigger is most important
525
  uint latency = 0; // Bigger is scheduled first
526
  uint score   = 0; // Bigger is better
527
  int idx = -1;     // Index in worklist
528
  int cand_cnt = 0; // Candidate count
529
  bool block_size_threshold_ok = (recalc_pressure_nodes != nullptr) && (block->number_of_nodes() > 10);
530

531
  for( uint i=0; i<cnt; i++ ) { // Inspect entire worklist
532
    // Order in worklist is used to break ties.
533
    // See caller for how this is used to delay scheduling
534
    // of induction variable increments to after the other
535
    // uses of the phi are scheduled.
536
    Node *n = worklist[i];      // Get Node on worklist
537

538
    int iop = n->is_Mach() ? n->as_Mach()->ideal_Opcode() : 0;
539
    if (iop == Op_CreateEx || n->is_Proj()) {
540
      // CreateEx nodes that are initially ready must start the block (after Phi
541
      // and Parm nodes which are pre-scheduled) and get top priority. This is
542
      // currently enforced by placing them at the beginning of the initial
543
      // worklist and selecting them eagerly here. After these, projections and
544
      // other CreateEx nodes are selected with equal priority.
545
      worklist.map(i,worklist.pop());
546
      return n;
547
    }
548

549
    if (n->Opcode() == Op_Con || iop == Op_CheckCastPP) {
550
      // Constants and CheckCastPP nodes have higher priority than the rest of
551
      // the nodes tested below. Record as current winner, but keep looking for
552
      // higher-priority nodes in the worklist.
553
      choice  = 4;
554
      // Latency and score are only used to break ties among low-priority nodes.
555
      latency = 0;
556
      score   = 0;
557
      idx     = i;
558
      continue;
559
    }
560

561
    // Final call in a block must be adjacent to 'catch'
562
    Node *e = block->end();
563
    if( e->is_Catch() && e->in(0)->in(0) == n )
564
      continue;
565

566
    // Memory op for an implicit null check has to be at the end of the block
567
    if( e->is_MachNullCheck() && e->in(1) == n )
568
      continue;
569

570
    // Schedule IV increment last.
571
    if (e->is_Mach() && e->as_Mach()->ideal_Opcode() == Op_CountedLoopEnd) {
572
      // Cmp might be matched into CountedLoopEnd node.
573
      Node *cmp = (e->in(1)->ideal_reg() == Op_RegFlags) ? e->in(1) : e;
574
      if (cmp->req() > 1 && cmp->in(1) == n && n->is_iteratively_computed()) {
575
        continue;
576
      }
577
    }
578

579
    uint n_choice = 2;
580

581
    // See if this instruction is consumed by a branch. If so, then (as the
582
    // branch is the last instruction in the basic block) force it to the
583
    // end of the basic block
584
    if ( must_clone[iop] ) {
585
      // See if any use is a branch
586
      bool found_machif = false;
587

588
      for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
589
        Node* use = n->fast_out(j);
590

591
        // The use is a conditional branch, make them adjacent
592
        if (use->is_MachIf() && get_block_for_node(use) == block) {
593
          found_machif = true;
594
          break;
595
        }
596

597
        // More than this instruction pending for successor to be ready,
598
        // don't choose this if other opportunities are ready
599
        if (ready_cnt.at(use->_idx) > 1)
600
          n_choice = 1;
601
      }
602

603
      // loop terminated, prefer not to use this instruction
604
      if (found_machif)
605
        continue;
606
    }
607

608
    // See if this has a predecessor that is "must_clone", i.e. sets the
609
    // condition code. If so, choose this first
610
    for (uint j = 0; j < n->req() ; j++) {
611
      Node *inn = n->in(j);
612
      if (inn) {
613
        if (inn->is_Mach() && must_clone[inn->as_Mach()->ideal_Opcode()] ) {
614
          n_choice = 3;
615
          break;
616
        }
617
      }
618
    }
619

620
    // MachTemps should be scheduled last so they are near their uses
621
    if (n->is_MachTemp()) {
622
      n_choice = 1;
623
    }
624

625
    uint n_latency = get_latency_for_node(n);
626
    uint n_score = n->req();   // Many inputs get high score to break ties
627

628
    if (OptoRegScheduling && block_size_threshold_ok) {
629
      if (recalc_pressure_nodes[n->_idx] == 0x7fff7fff) {
630
        _regalloc->_scratch_int_pressure.init(_regalloc->_sched_int_pressure.high_pressure_limit());
631
        _regalloc->_scratch_float_pressure.init(_regalloc->_sched_float_pressure.high_pressure_limit());
632
        // simulate the notion that we just picked this node to schedule
633
        n->add_flag(Node::Flag_is_scheduled);
634
        // now calculate its effect upon the graph if we did
635
        adjust_register_pressure(n, block, recalc_pressure_nodes, false);
636
        // return its state for finalize in case somebody else wins
637
        n->remove_flag(Node::Flag_is_scheduled);
638
        // now save the two final pressure components of register pressure, limiting pressure calcs to short size
639
        short int_pressure = (short)_regalloc->_scratch_int_pressure.current_pressure();
640
        short float_pressure = (short)_regalloc->_scratch_float_pressure.current_pressure();
641
        recalc_pressure_nodes[n->_idx] = int_pressure;
642
        recalc_pressure_nodes[n->_idx] |= (float_pressure << 16);
643
      }
644

645
      if (_scheduling_for_pressure) {
646
        latency = n_latency;
647
        if (n_choice != 3) {
648
          // Now evaluate each register pressure component based on threshold in the score.
649
          // In general the defining register type will dominate the score, ergo we will not see register pressure grow on both banks
650
          // on a single instruction, but we might see it shrink on both banks.
651
          // For each use of register that has a register class that is over the high pressure limit, we build n_score up for
652
          // live ranges that terminate on this instruction.
653
          if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
654
            short int_pressure = (short)recalc_pressure_nodes[n->_idx];
655
            n_score = (int_pressure < 0) ? ((score + n_score) - int_pressure) : (int_pressure > 0) ? 1 : n_score;
656
          }
657
          if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
658
            short float_pressure = (short)(recalc_pressure_nodes[n->_idx] >> 16);
659
            n_score = (float_pressure < 0) ? ((score + n_score) - float_pressure) : (float_pressure > 0) ? 1 : n_score;
660
          }
661
        } else {
662
          // make sure we choose these candidates
663
          score = 0;
664
        }
665
      }
666
    }
667

668
    // Keep best latency found
669
    cand_cnt++;
670
    if (choice < n_choice ||
671
        (choice == n_choice &&
672
         ((StressLCM && C->randomized_select(cand_cnt)) ||
673
          (!StressLCM &&
674
           (latency < n_latency ||
675
            (latency == n_latency &&
676
             (score < n_score))))))) {
677
      choice  = n_choice;
678
      latency = n_latency;
679
      score   = n_score;
680
      idx     = i;               // Also keep index in worklist
681
    }
682
  } // End of for all ready nodes in worklist
683

684
  guarantee(idx >= 0, "index should be set");
685
  Node *n = worklist[(uint)idx];      // Get the winner
686

687
  worklist.map((uint)idx, worklist.pop());     // Compress worklist
688
  return n;
689
}
690

691
//-------------------------adjust_register_pressure----------------------------
692
void PhaseCFG::adjust_register_pressure(Node* n, Block* block, intptr_t* recalc_pressure_nodes, bool finalize_mode) {
693
  PhaseLive* liveinfo = _regalloc->get_live();
694
  IndexSet* liveout = liveinfo->live(block);
695
  // first adjust the register pressure for the sources
696
  for (uint i = 1; i < n->req(); i++) {
697
    bool lrg_ends = false;
698
    Node *src_n = n->in(i);
699
    if (src_n == nullptr) continue;
700
    if (!src_n->is_Mach()) continue;
701
    uint src = _regalloc->_lrg_map.find(src_n);
702
    if (src == 0) continue;
703
    LRG& lrg_src = _regalloc->lrgs(src);
704
    // detect if the live range ends or not
705
    if (liveout->member(src) == false) {
706
      lrg_ends = true;
707
      for (DUIterator_Fast jmax, j = src_n->fast_outs(jmax); j < jmax; j++) {
708
        Node* m = src_n->fast_out(j); // Get user
709
        if (m == n) continue;
710
        if (!m->is_Mach()) continue;
711
        MachNode *mach = m->as_Mach();
712
        bool src_matches = false;
713
        int iop = mach->ideal_Opcode();
714

715
        switch (iop) {
716
        case Op_StoreB:
717
        case Op_StoreC:
718
        case Op_StoreCM:
719
        case Op_StoreD:
720
        case Op_StoreF:
721
        case Op_StoreI:
722
        case Op_StoreL:
723
        case Op_StoreP:
724
        case Op_StoreN:
725
        case Op_StoreVector:
726
        case Op_StoreVectorMasked:
727
        case Op_StoreVectorScatter:
728
        case Op_StoreVectorScatterMasked:
729
        case Op_StoreNKlass:
730
          for (uint k = 1; k < m->req(); k++) {
731
            Node *in = m->in(k);
732
            if (in == src_n) {
733
              src_matches = true;
734
              break;
735
            }
736
          }
737
          break;
738

739
        default:
740
          src_matches = true;
741
          break;
742
        }
743

744
        // If we have a store as our use, ignore the non source operands
745
        if (src_matches == false) continue;
746

747
        // Mark every unscheduled use which is not n with a recalculation
748
        if ((get_block_for_node(m) == block) && (!m->is_scheduled())) {
749
          if (finalize_mode && !m->is_Phi()) {
750
            recalc_pressure_nodes[m->_idx] = 0x7fff7fff;
751
          }
752
          lrg_ends = false;
753
        }
754
      }
755
    }
756
    // if none, this live range ends and we can adjust register pressure
757
    if (lrg_ends) {
758
      if (finalize_mode) {
759
        _regalloc->lower_pressure(block, 0, lrg_src, nullptr, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
760
      } else {
761
        _regalloc->lower_pressure(block, 0, lrg_src, nullptr, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
762
      }
763
    }
764
  }
765

766
  // now add the register pressure from the dest and evaluate which heuristic we should use:
767
  // 1.) The default, latency scheduling
768
  // 2.) Register pressure scheduling based on the high pressure limit threshold for int or float register stacks
769
  uint dst = _regalloc->_lrg_map.find(n);
770
  if (dst != 0) {
771
    LRG& lrg_dst = _regalloc->lrgs(dst);
772
    if (finalize_mode) {
773
      _regalloc->raise_pressure(block, lrg_dst, _regalloc->_sched_int_pressure, _regalloc->_sched_float_pressure);
774
      // check to see if we fall over the register pressure cliff here
775
      if (_regalloc->_sched_int_pressure.current_pressure() > _regalloc->_sched_int_pressure.high_pressure_limit()) {
776
        _scheduling_for_pressure = true;
777
      } else if (_regalloc->_sched_float_pressure.current_pressure() > _regalloc->_sched_float_pressure.high_pressure_limit()) {
778
        _scheduling_for_pressure = true;
779
      } else {
780
        // restore latency scheduling mode
781
        _scheduling_for_pressure = false;
782
      }
783
    } else {
784
      _regalloc->raise_pressure(block, lrg_dst, _regalloc->_scratch_int_pressure, _regalloc->_scratch_float_pressure);
785
    }
786
  }
787
}
788

789
//------------------------------set_next_call----------------------------------
790
void PhaseCFG::set_next_call(Block* block, Node* n, VectorSet& next_call) {
791
  if( next_call.test_set(n->_idx) ) return;
792
  for( uint i=0; i<n->len(); i++ ) {
793
    Node *m = n->in(i);
794
    if( !m ) continue;  // must see all nodes in block that precede call
795
    if (get_block_for_node(m) == block) {
796
      set_next_call(block, m, next_call);
797
    }
798
  }
799
}
800

801
//------------------------------needed_for_next_call---------------------------
802
// Set the flag 'next_call' for each Node that is needed for the next call to
803
// be scheduled.  This flag lets me bias scheduling so Nodes needed for the
804
// next subroutine call get priority - basically it moves things NOT needed
805
// for the next call till after the call.  This prevents me from trying to
806
// carry lots of stuff live across a call.
807
void PhaseCFG::needed_for_next_call(Block* block, Node* this_call, VectorSet& next_call) {
808
  // Find the next control-defining Node in this block
809
  Node* call = nullptr;
810
  for (DUIterator_Fast imax, i = this_call->fast_outs(imax); i < imax; i++) {
811
    Node* m = this_call->fast_out(i);
812
    if (get_block_for_node(m) == block && // Local-block user
813
        m != this_call &&       // Not self-start node
814
        m->is_MachCall()) {
815
      call = m;
816
      break;
817
    }
818
  }
819
  if (call == nullptr)  return;    // No next call (e.g., block end is near)
820
  // Set next-call for all inputs to this call
821
  set_next_call(block, call, next_call);
822
}
823

824
//------------------------------add_call_kills-------------------------------------
825
// helper function that adds caller save registers to MachProjNode
826
static void add_call_kills(MachProjNode *proj, RegMask& regs, const char* save_policy, bool exclude_soe) {
827
  // Fill in the kill mask for the call
828
  for( OptoReg::Name r = OptoReg::Name(0); r < _last_Mach_Reg; r=OptoReg::add(r,1) ) {
829
    if( !regs.Member(r) ) {     // Not already defined by the call
830
      // Save-on-call register?
831
      if ((save_policy[r] == 'C') ||
832
          (save_policy[r] == 'A') ||
833
          ((save_policy[r] == 'E') && exclude_soe)) {
834
        proj->_rout.Insert(r);
835
      }
836
    }
837
  }
838
}
839

840

841
//------------------------------sched_call-------------------------------------
842
uint PhaseCFG::sched_call(Block* block, uint node_cnt, Node_List& worklist, GrowableArray<int>& ready_cnt, MachCallNode* mcall, VectorSet& next_call) {
843
  RegMask regs;
844

845
  // Schedule all the users of the call right now.  All the users are
846
  // projection Nodes, so they must be scheduled next to the call.
847
  // Collect all the defined registers.
848
  for (DUIterator_Fast imax, i = mcall->fast_outs(imax); i < imax; i++) {
849
    Node* n = mcall->fast_out(i);
850
    assert( n->is_MachProj(), "" );
851
    int n_cnt = ready_cnt.at(n->_idx)-1;
852
    ready_cnt.at_put(n->_idx, n_cnt);
853
    assert( n_cnt == 0, "" );
854
    // Schedule next to call
855
    block->map_node(n, node_cnt++);
856
    // Collect defined registers
857
    regs.OR(n->out_RegMask());
858
    // Check for scheduling the next control-definer
859
    if( n->bottom_type() == Type::CONTROL )
860
      // Warm up next pile of heuristic bits
861
      needed_for_next_call(block, n, next_call);
862

863
    // Children of projections are now all ready
864
    for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
865
      Node* m = n->fast_out(j); // Get user
866
      if(get_block_for_node(m) != block) {
867
        continue;
868
      }
869
      if( m->is_Phi() ) continue;
870
      int m_cnt = ready_cnt.at(m->_idx) - 1;
871
      ready_cnt.at_put(m->_idx, m_cnt);
872
      if( m_cnt == 0 )
873
        worklist.push(m);
874
    }
875

876
  }
877

878
  // Act as if the call defines the Frame Pointer.
879
  // Certainly the FP is alive and well after the call.
880
  regs.Insert(_matcher.c_frame_pointer());
881

882
  // Set all registers killed and not already defined by the call.
883
  uint r_cnt = mcall->tf()->range()->cnt();
884
  int op = mcall->ideal_Opcode();
885
  MachProjNode *proj = new MachProjNode( mcall, r_cnt+1, RegMask::Empty, MachProjNode::fat_proj );
886
  map_node_to_block(proj, block);
887
  block->insert_node(proj, node_cnt++);
888

889
  // Select the right register save policy.
890
  const char *save_policy = nullptr;
891
  switch (op) {
892
    case Op_CallRuntime:
893
    case Op_CallLeaf:
894
    case Op_CallLeafNoFP:
895
    case Op_CallLeafVector:
896
      // Calling C code so use C calling convention
897
      save_policy = _matcher._c_reg_save_policy;
898
      break;
899

900
    case Op_CallStaticJava:
901
    case Op_CallDynamicJava:
902
      // Calling Java code so use Java calling convention
903
      save_policy = _matcher._register_save_policy;
904
      break;
905

906
    default:
907
      ShouldNotReachHere();
908
  }
909

910
  // When using CallRuntime mark SOE registers as killed by the call
911
  // so values that could show up in the RegisterMap aren't live in a
912
  // callee saved register since the register wouldn't know where to
913
  // find them.  CallLeaf and CallLeafNoFP are ok because they can't
914
  // have debug info on them.  Strictly speaking this only needs to be
915
  // done for oops since idealreg2debugmask takes care of debug info
916
  // references but there no way to handle oops differently than other
917
  // pointers as far as the kill mask goes.
918
  bool exclude_soe = op == Op_CallRuntime;
919

920
  // If the call is a MethodHandle invoke, we need to exclude the
921
  // register which is used to save the SP value over MH invokes from
922
  // the mask.  Otherwise this register could be used for
923
  // deoptimization information.
924
  if (op == Op_CallStaticJava) {
925
    MachCallStaticJavaNode* mcallstaticjava = (MachCallStaticJavaNode*) mcall;
926
    if (mcallstaticjava->_method_handle_invoke)
927
      proj->_rout.OR(Matcher::method_handle_invoke_SP_save_mask());
928
  }
929

930
  add_call_kills(proj, regs, save_policy, exclude_soe);
931

932
  return node_cnt;
933
}
934

935

936
//------------------------------schedule_local---------------------------------
937
// Topological sort within a block.  Someday become a real scheduler.
938
bool PhaseCFG::schedule_local(Block* block, GrowableArray<int>& ready_cnt, VectorSet& next_call, intptr_t *recalc_pressure_nodes) {
939
  // Already "sorted" are the block start Node (as the first entry), and
940
  // the block-ending Node and any trailing control projections.  We leave
941
  // these alone.  PhiNodes and ParmNodes are made to follow the block start
942
  // Node.  Everything else gets topo-sorted.
943

944
#ifndef PRODUCT
945
    if (trace_opto_pipelining()) {
946
      tty->print_cr("# --- schedule_local B%d, before: ---", block->_pre_order);
947
      for (uint i = 0;i < block->number_of_nodes(); i++) {
948
        tty->print("# ");
949
        block->get_node(i)->dump();
950
      }
951
      tty->print_cr("#");
952
    }
953
#endif
954

955
  // RootNode is already sorted
956
  if (block->number_of_nodes() == 1) {
957
    return true;
958
  }
959

960
  bool block_size_threshold_ok = (recalc_pressure_nodes != nullptr) && (block->number_of_nodes() > 10);
961

962
  // We track the uses of local definitions as input dependences so that
963
  // we know when a given instruction is available to be scheduled.
964
  uint i;
965
  if (OptoRegScheduling && block_size_threshold_ok) {
966
    for (i = 1; i < block->number_of_nodes(); i++) { // setup nodes for pressure calc
967
      Node *n = block->get_node(i);
968
      n->remove_flag(Node::Flag_is_scheduled);
969
      if (!n->is_Phi()) {
970
        recalc_pressure_nodes[n->_idx] = 0x7fff7fff;
971
      }
972
    }
973
  }
974

975
  // Move PhiNodes and ParmNodes from 1 to cnt up to the start
976
  uint node_cnt = block->end_idx();
977
  uint phi_cnt = 1;
978
  for( i = 1; i<node_cnt; i++ ) { // Scan for Phi
979
    Node *n = block->get_node(i);
980
    if( n->is_Phi() ||          // Found a PhiNode or ParmNode
981
        (n->is_Proj()  && n->in(0) == block->head()) ) {
982
      // Move guy at 'phi_cnt' to the end; makes a hole at phi_cnt
983
      block->map_node(block->get_node(phi_cnt), i);
984
      block->map_node(n, phi_cnt++);  // swap Phi/Parm up front
985
      if (OptoRegScheduling && block_size_threshold_ok) {
986
        // mark n as scheduled
987
        n->add_flag(Node::Flag_is_scheduled);
988
      }
989
    } else {                    // All others
990
      // Count block-local inputs to 'n'
991
      uint cnt = n->len();      // Input count
992
      uint local = 0;
993
      for( uint j=0; j<cnt; j++ ) {
994
        Node *m = n->in(j);
995
        if( m && get_block_for_node(m) == block && !m->is_top() )
996
          local++;              // One more block-local input
997
      }
998
      ready_cnt.at_put(n->_idx, local); // Count em up
999

1000
#ifdef ASSERT
1001
      if (UseG1GC) {
1002
        if( n->is_Mach() && n->as_Mach()->ideal_Opcode() == Op_StoreCM ) {
1003
          // Check the precedence edges
1004
          for (uint prec = n->req(); prec < n->len(); prec++) {
1005
            Node* oop_store = n->in(prec);
1006
            if (oop_store != nullptr) {
1007
              assert(get_block_for_node(oop_store)->_dom_depth <= block->_dom_depth, "oop_store must dominate card-mark");
1008
            }
1009
          }
1010
        }
1011
      }
1012
#endif
1013

1014
      // A few node types require changing a required edge to a precedence edge
1015
      // before allocation.
1016
      if( n->is_Mach() && n->req() > TypeFunc::Parms &&
1017
          (n->as_Mach()->ideal_Opcode() == Op_MemBarAcquire ||
1018
           n->as_Mach()->ideal_Opcode() == Op_MemBarVolatile) ) {
1019
        // MemBarAcquire could be created without Precedent edge.
1020
        // del_req() replaces the specified edge with the last input edge
1021
        // and then removes the last edge. If the specified edge > number of
1022
        // edges the last edge will be moved outside of the input edges array
1023
        // and the edge will be lost. This is why this code should be
1024
        // executed only when Precedent (== TypeFunc::Parms) edge is present.
1025
        Node *x = n->in(TypeFunc::Parms);
1026
        if (x != nullptr && get_block_for_node(x) == block && n->find_prec_edge(x) != -1) {
1027
          // Old edge to node within same block will get removed, but no precedence
1028
          // edge will get added because it already exists. Update ready count.
1029
          int cnt = ready_cnt.at(n->_idx);
1030
          assert(cnt > 1, "MemBar node %d must not get ready here", n->_idx);
1031
          ready_cnt.at_put(n->_idx, cnt-1);
1032
        }
1033
        n->del_req(TypeFunc::Parms);
1034
        n->add_prec(x);
1035
      }
1036
    }
1037
  }
1038
  for(uint i2=i; i2< block->number_of_nodes(); i2++ ) // Trailing guys get zapped count
1039
    ready_cnt.at_put(block->get_node(i2)->_idx, 0);
1040

1041
  // All the prescheduled guys do not hold back internal nodes
1042
  uint i3;
1043
  for (i3 = 0; i3 < phi_cnt; i3++) {  // For all pre-scheduled
1044
    Node *n = block->get_node(i3);       // Get pre-scheduled
1045
    for (DUIterator_Fast jmax, j = n->fast_outs(jmax); j < jmax; j++) {
1046
      Node* m = n->fast_out(j);
1047
      if (get_block_for_node(m) == block) { // Local-block user
1048
        int m_cnt = ready_cnt.at(m->_idx)-1;
1049
        if (OptoRegScheduling && block_size_threshold_ok) {
1050
          // mark m as scheduled
1051
          if (m_cnt < 0) {
1052
            m->add_flag(Node::Flag_is_scheduled);
1053
          }
1054
        }
1055
        ready_cnt.at_put(m->_idx, m_cnt);   // Fix ready count
1056
      }
1057
    }
1058
  }
1059

1060
  Node_List delay;
1061
  // Make a worklist
1062
  Node_List worklist;
1063
  for(uint i4=i3; i4<node_cnt; i4++ ) {    // Put ready guys on worklist
1064
    Node *m = block->get_node(i4);
1065
    if( !ready_cnt.at(m->_idx) ) {   // Zero ready count?
1066
      if (m->is_iteratively_computed()) {
1067
        // Push induction variable increments last to allow other uses
1068
        // of the phi to be scheduled first. The select() method breaks
1069
        // ties in scheduling by worklist order.
1070
        delay.push(m);
1071
      } else if (m->is_Mach() && m->as_Mach()->ideal_Opcode() == Op_CreateEx) {
1072
        // Place CreateEx nodes that are initially ready at the beginning of the
1073
        // worklist so they are selected first and scheduled at the block start.
1074
        worklist.insert(0, m);
1075
      } else {
1076
        worklist.push(m);         // Then on to worklist!
1077
      }
1078
    }
1079
  }
1080
  while (delay.size()) {
1081
    Node* d = delay.pop();
1082
    worklist.push(d);
1083
  }
1084

1085
  if (OptoRegScheduling && block_size_threshold_ok) {
1086
    // To stage register pressure calculations we need to examine the live set variables
1087
    // breaking them up by register class to compartmentalize the calculations.
1088
    _regalloc->_sched_int_pressure.init(Matcher::int_pressure_limit());
1089
    _regalloc->_sched_float_pressure.init(Matcher::float_pressure_limit());
1090
    _regalloc->_scratch_int_pressure.init(Matcher::int_pressure_limit());
1091
    _regalloc->_scratch_float_pressure.init(Matcher::float_pressure_limit());
1092

1093
    _regalloc->compute_entry_block_pressure(block);
1094
  }
1095

1096
  // Warm up the 'next_call' heuristic bits
1097
  needed_for_next_call(block, block->head(), next_call);
1098

1099
#ifndef PRODUCT
1100
    if (trace_opto_pipelining()) {
1101
      for (uint j=0; j< block->number_of_nodes(); j++) {
1102
        Node     *n = block->get_node(j);
1103
        int     idx = n->_idx;
1104
        tty->print("#   ready cnt:%3d  ", ready_cnt.at(idx));
1105
        tty->print("latency:%3d  ", get_latency_for_node(n));
1106
        tty->print("%4d: %s\n", idx, n->Name());
1107
      }
1108
    }
1109
#endif
1110

1111
  uint max_idx = (uint)ready_cnt.length();
1112
  // Pull from worklist and schedule
1113
  while( worklist.size() ) {    // Worklist is not ready
1114

1115
#ifndef PRODUCT
1116
    if (trace_opto_pipelining()) {
1117
      tty->print("#   ready list:");
1118
      for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1119
        Node *n = worklist[i];      // Get Node on worklist
1120
        tty->print(" %d", n->_idx);
1121
      }
1122
      tty->cr();
1123
    }
1124
#endif
1125

1126
    // Select and pop a ready guy from worklist
1127
    Node* n = select(block, worklist, ready_cnt, next_call, phi_cnt, recalc_pressure_nodes);
1128
    block->map_node(n, phi_cnt++);    // Schedule him next
1129

1130
    if (OptoRegScheduling && block_size_threshold_ok) {
1131
      n->add_flag(Node::Flag_is_scheduled);
1132

1133
      // Now adjust the resister pressure with the node we selected
1134
      if (!n->is_Phi()) {
1135
        adjust_register_pressure(n, block, recalc_pressure_nodes, true);
1136
      }
1137
    }
1138

1139
#ifndef PRODUCT
1140
    if (trace_opto_pipelining()) {
1141
      tty->print("#    select %d: %s", n->_idx, n->Name());
1142
      tty->print(", latency:%d", get_latency_for_node(n));
1143
      n->dump();
1144
      if (Verbose) {
1145
        tty->print("#   ready list:");
1146
        for( uint i=0; i<worklist.size(); i++ ) { // Inspect entire worklist
1147
          Node *n = worklist[i];      // Get Node on worklist
1148
          tty->print(" %d", n->_idx);
1149
        }
1150
        tty->cr();
1151
      }
1152
    }
1153

1154
#endif
1155
    if( n->is_MachCall() ) {
1156
      MachCallNode *mcall = n->as_MachCall();
1157
      phi_cnt = sched_call(block, phi_cnt, worklist, ready_cnt, mcall, next_call);
1158
      continue;
1159
    }
1160

1161
    if (n->is_Mach() && n->as_Mach()->has_call()) {
1162
      RegMask regs;
1163
      regs.Insert(_matcher.c_frame_pointer());
1164
      regs.OR(n->out_RegMask());
1165

1166
      MachProjNode *proj = new MachProjNode( n, 1, RegMask::Empty, MachProjNode::fat_proj );
1167
      map_node_to_block(proj, block);
1168
      block->insert_node(proj, phi_cnt++);
1169

1170
      add_call_kills(proj, regs, _matcher._c_reg_save_policy, false);
1171
    }
1172

1173
    // Children are now all ready
1174
    for (DUIterator_Fast i5max, i5 = n->fast_outs(i5max); i5 < i5max; i5++) {
1175
      Node* m = n->fast_out(i5); // Get user
1176
      if (get_block_for_node(m) != block) {
1177
        continue;
1178
      }
1179
      if( m->is_Phi() ) continue;
1180
      if (m->_idx >= max_idx) { // new node, skip it
1181
        assert(m->is_MachProj() && n->is_Mach() && n->as_Mach()->has_call(), "unexpected node types");
1182
        continue;
1183
      }
1184
      int m_cnt = ready_cnt.at(m->_idx) - 1;
1185
      ready_cnt.at_put(m->_idx, m_cnt);
1186
      if( m_cnt == 0 )
1187
        worklist.push(m);
1188
    }
1189
  }
1190

1191
  if( phi_cnt != block->end_idx() ) {
1192
    // did not schedule all.  Retry, Bailout, or Die
1193
    if (C->subsume_loads() == true && !C->failing()) {
1194
      // Retry with subsume_loads == false
1195
      // If this is the first failure, the sentinel string will "stick"
1196
      // to the Compile object, and the C2Compiler will see it and retry.
1197
      C->record_failure(C2Compiler::retry_no_subsuming_loads());
1198
    } else {
1199
      assert(false, "graph should be schedulable");
1200
    }
1201
    // assert( phi_cnt == end_idx(), "did not schedule all" );
1202
    return false;
1203
  }
1204

1205
  if (OptoRegScheduling && block_size_threshold_ok) {
1206
    _regalloc->compute_exit_block_pressure(block);
1207
    block->_reg_pressure = _regalloc->_sched_int_pressure.final_pressure();
1208
    block->_freg_pressure = _regalloc->_sched_float_pressure.final_pressure();
1209
  }
1210

1211
#ifndef PRODUCT
1212
  if (trace_opto_pipelining()) {
1213
    tty->print_cr("#");
1214
    tty->print_cr("# after schedule_local");
1215
    for (uint i = 0;i < block->number_of_nodes();i++) {
1216
      tty->print("# ");
1217
      block->get_node(i)->dump();
1218
    }
1219
    tty->print_cr("# ");
1220

1221
    if (OptoRegScheduling && block_size_threshold_ok) {
1222
      tty->print_cr("# pressure info : %d", block->_pre_order);
1223
      _regalloc->print_pressure_info(_regalloc->_sched_int_pressure, "int register info");
1224
      _regalloc->print_pressure_info(_regalloc->_sched_float_pressure, "float register info");
1225
    }
1226
    tty->cr();
1227
  }
1228
#endif
1229

1230
  return true;
1231
}
1232

1233
//--------------------------catch_cleanup_fix_all_inputs-----------------------
1234
static void catch_cleanup_fix_all_inputs(Node *use, Node *old_def, Node *new_def) {
1235
  for (uint l = 0; l < use->len(); l++) {
1236
    if (use->in(l) == old_def) {
1237
      if (l < use->req()) {
1238
        use->set_req(l, new_def);
1239
      } else {
1240
        use->rm_prec(l);
1241
        use->add_prec(new_def);
1242
        l--;
1243
      }
1244
    }
1245
  }
1246
}
1247

1248
//------------------------------catch_cleanup_find_cloned_def------------------
1249
Node* PhaseCFG::catch_cleanup_find_cloned_def(Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1250
  assert( use_blk != def_blk, "Inter-block cleanup only");
1251

1252
  // The use is some block below the Catch.  Find and return the clone of the def
1253
  // that dominates the use. If there is no clone in a dominating block, then
1254
  // create a phi for the def in a dominating block.
1255

1256
  // Find which successor block dominates this use.  The successor
1257
  // blocks must all be single-entry (from the Catch only; I will have
1258
  // split blocks to make this so), hence they all dominate.
1259
  while( use_blk->_dom_depth > def_blk->_dom_depth+1 )
1260
    use_blk = use_blk->_idom;
1261

1262
  // Find the successor
1263
  Node *fixup = nullptr;
1264

1265
  uint j;
1266
  for( j = 0; j < def_blk->_num_succs; j++ )
1267
    if( use_blk == def_blk->_succs[j] )
1268
      break;
1269

1270
  if( j == def_blk->_num_succs ) {
1271
    // Block at same level in dom-tree is not a successor.  It needs a
1272
    // PhiNode, the PhiNode uses from the def and IT's uses need fixup.
1273
    Node_Array inputs;
1274
    for(uint k = 1; k < use_blk->num_preds(); k++) {
1275
      Block* block = get_block_for_node(use_blk->pred(k));
1276
      inputs.map(k, catch_cleanup_find_cloned_def(block, def, def_blk, n_clone_idx));
1277
    }
1278

1279
    // Check to see if the use_blk already has an identical phi inserted.
1280
    // If it exists, it will be at the first position since all uses of a
1281
    // def are processed together.
1282
    Node *phi = use_blk->get_node(1);
1283
    if( phi->is_Phi() ) {
1284
      fixup = phi;
1285
      for (uint k = 1; k < use_blk->num_preds(); k++) {
1286
        if (phi->in(k) != inputs[k]) {
1287
          // Not a match
1288
          fixup = nullptr;
1289
          break;
1290
        }
1291
      }
1292
    }
1293

1294
    // If an existing PhiNode was not found, make a new one.
1295
    if (fixup == nullptr) {
1296
      Node *new_phi = PhiNode::make(use_blk->head(), def);
1297
      use_blk->insert_node(new_phi, 1);
1298
      map_node_to_block(new_phi, use_blk);
1299
      for (uint k = 1; k < use_blk->num_preds(); k++) {
1300
        new_phi->set_req(k, inputs[k]);
1301
      }
1302
      fixup = new_phi;
1303
    }
1304

1305
  } else {
1306
    // Found the use just below the Catch.  Make it use the clone.
1307
    fixup = use_blk->get_node(n_clone_idx);
1308
  }
1309

1310
  return fixup;
1311
}
1312

1313
//--------------------------catch_cleanup_intra_block--------------------------
1314
// Fix all input edges in use that reference "def".  The use is in the same
1315
// block as the def and both have been cloned in each successor block.
1316
static void catch_cleanup_intra_block(Node *use, Node *def, Block *blk, int beg, int n_clone_idx) {
1317

1318
  // Both the use and def have been cloned. For each successor block,
1319
  // get the clone of the use, and make its input the clone of the def
1320
  // found in that block.
1321

1322
  uint use_idx = blk->find_node(use);
1323
  uint offset_idx = use_idx - beg;
1324
  for( uint k = 0; k < blk->_num_succs; k++ ) {
1325
    // Get clone in each successor block
1326
    Block *sb = blk->_succs[k];
1327
    Node *clone = sb->get_node(offset_idx+1);
1328
    assert( clone->Opcode() == use->Opcode(), "" );
1329

1330
    // Make use-clone reference the def-clone
1331
    catch_cleanup_fix_all_inputs(clone, def, sb->get_node(n_clone_idx));
1332
  }
1333
}
1334

1335
//------------------------------catch_cleanup_inter_block---------------------
1336
// Fix all input edges in use that reference "def".  The use is in a different
1337
// block than the def.
1338
void PhaseCFG::catch_cleanup_inter_block(Node *use, Block *use_blk, Node *def, Block *def_blk, int n_clone_idx) {
1339
  if( !use_blk ) return;        // Can happen if the use is a precedence edge
1340

1341
  Node *new_def = catch_cleanup_find_cloned_def(use_blk, def, def_blk, n_clone_idx);
1342
  catch_cleanup_fix_all_inputs(use, def, new_def);
1343
}
1344

1345
//------------------------------call_catch_cleanup-----------------------------
1346
// If we inserted any instructions between a Call and his CatchNode,
1347
// clone the instructions on all paths below the Catch.
1348
void PhaseCFG::call_catch_cleanup(Block* block) {
1349

1350
  // End of region to clone
1351
  uint end = block->end_idx();
1352
  if( !block->get_node(end)->is_Catch() ) return;
1353
  // Start of region to clone
1354
  uint beg = end;
1355
  while(!block->get_node(beg-1)->is_MachProj() ||
1356
        !block->get_node(beg-1)->in(0)->is_MachCall() ) {
1357
    beg--;
1358
    assert(beg > 0,"Catch cleanup walking beyond block boundary");
1359
  }
1360
  // Range of inserted instructions is [beg, end)
1361
  if( beg == end ) return;
1362

1363
  // Clone along all Catch output paths.  Clone area between the 'beg' and
1364
  // 'end' indices.
1365
  for( uint i = 0; i < block->_num_succs; i++ ) {
1366
    Block *sb = block->_succs[i];
1367
    // Clone the entire area; ignoring the edge fixup for now.
1368
    for( uint j = end; j > beg; j-- ) {
1369
      Node *clone = block->get_node(j-1)->clone();
1370
      sb->insert_node(clone, 1);
1371
      map_node_to_block(clone, sb);
1372
      if (clone->needs_anti_dependence_check()) {
1373
        insert_anti_dependences(sb, clone);
1374
      }
1375
    }
1376
  }
1377

1378

1379
  // Fixup edges.  Check the def-use info per cloned Node
1380
  for(uint i2 = beg; i2 < end; i2++ ) {
1381
    uint n_clone_idx = i2-beg+1; // Index of clone of n in each successor block
1382
    Node *n = block->get_node(i2);        // Node that got cloned
1383
    // Need DU safe iterator because of edge manipulation in calls.
1384
    Unique_Node_List* out = new Unique_Node_List();
1385
    for (DUIterator_Fast j1max, j1 = n->fast_outs(j1max); j1 < j1max; j1++) {
1386
      out->push(n->fast_out(j1));
1387
    }
1388
    uint max = out->size();
1389
    for (uint j = 0; j < max; j++) {// For all users
1390
      Node *use = out->pop();
1391
      Block *buse = get_block_for_node(use);
1392
      if( use->is_Phi() ) {
1393
        for( uint k = 1; k < use->req(); k++ )
1394
          if( use->in(k) == n ) {
1395
            Block* b = get_block_for_node(buse->pred(k));
1396
            Node *fixup = catch_cleanup_find_cloned_def(b, n, block, n_clone_idx);
1397
            use->set_req(k, fixup);
1398
          }
1399
      } else {
1400
        if (block == buse) {
1401
          catch_cleanup_intra_block(use, n, block, beg, n_clone_idx);
1402
        } else {
1403
          catch_cleanup_inter_block(use, buse, n, block, n_clone_idx);
1404
        }
1405
      }
1406
    } // End for all users
1407

1408
  } // End of for all Nodes in cloned area
1409

1410
  // Remove the now-dead cloned ops
1411
  for(uint i3 = beg; i3 < end; i3++ ) {
1412
    block->get_node(beg)->disconnect_inputs(C);
1413
    block->remove_node(beg);
1414
  }
1415

1416
  // If the successor blocks have a CreateEx node, move it back to the top
1417
  for (uint i4 = 0; i4 < block->_num_succs; i4++) {
1418
    Block *sb = block->_succs[i4];
1419
    uint new_cnt = end - beg;
1420
    // Remove any newly created, but dead, nodes by traversing their schedule
1421
    // backwards. Here, a dead node is a node whose only outputs (if any) are
1422
    // unused projections.
1423
    for (uint j = new_cnt; j > 0; j--) {
1424
      Node *n = sb->get_node(j);
1425
      // Individual projections are examined together with all siblings when
1426
      // their parent is visited.
1427
      if (n->is_Proj()) {
1428
        continue;
1429
      }
1430
      bool dead = true;
1431
      for (DUIterator_Fast imax, i = n->fast_outs(imax); i < imax; i++) {
1432
        Node* out = n->fast_out(i);
1433
        // n is live if it has a non-projection output or a used projection.
1434
        if (!out->is_Proj() || out->outcnt() > 0) {
1435
          dead = false;
1436
          break;
1437
        }
1438
      }
1439
      if (dead) {
1440
        // n's only outputs (if any) are unused projections scheduled next to n
1441
        // (see PhaseCFG::select()). Remove these projections backwards.
1442
        for (uint k = j + n->outcnt(); k > j; k--) {
1443
          Node* proj = sb->get_node(k);
1444
          assert(proj->is_Proj() && proj->in(0) == n,
1445
                 "projection should correspond to dead node");
1446
          proj->disconnect_inputs(C);
1447
          sb->remove_node(k);
1448
          new_cnt--;
1449
        }
1450
        // Now remove the node itself.
1451
        n->disconnect_inputs(C);
1452
        sb->remove_node(j);
1453
        new_cnt--;
1454
      }
1455
    }
1456
    // If any newly created nodes remain, move the CreateEx node to the top
1457
    if (new_cnt > 0) {
1458
      Node *cex = sb->get_node(1+new_cnt);
1459
      if( cex->is_Mach() && cex->as_Mach()->ideal_Opcode() == Op_CreateEx ) {
1460
        sb->remove_node(1+new_cnt);
1461
        sb->insert_node(cex, 1);
1462
      }
1463
    }
1464
  }
1465
}
1466