jdk

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/*
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 * Copyright (c) 1998, 2024, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#include "asm/macroAssembler.hpp"
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#include "code/relocInfo.hpp"
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#include "memory/universe.hpp"
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#include "nativeInst_x86.hpp"
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#include "oops/compressedKlass.inline.hpp"
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#include "oops/compressedOops.inline.hpp"
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#include "oops/klass.inline.hpp"
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#include "oops/oop.inline.hpp"
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#include "runtime/safepoint.hpp"
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#include "runtime/safepointMechanism.hpp"
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#include "utilities/checkedCast.hpp"
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void Relocation::pd_set_data_value(address x, bool verify_only) {
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#ifdef AMD64
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  typedef Assembler::WhichOperand WhichOperand;
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  WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm, call32, narrow oop
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  assert(which == Assembler::disp32_operand ||
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         which == Assembler::narrow_oop_operand ||
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         which == Assembler::imm_operand, "format unpacks ok");
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  if (which == Assembler::imm_operand) {
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    if (verify_only) {
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      guarantee(*pd_address_in_code() == x, "instructions must match");
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    } else {
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      *pd_address_in_code() = x;
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    }
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  } else if (which == Assembler::narrow_oop_operand) {
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    address disp = Assembler::locate_operand(addr(), which);
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    // both compressed oops and compressed classes look the same
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    if (CompressedOops::is_in((void*)x)) {
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      uint32_t encoded = CompressedOops::narrow_oop_value(cast_to_oop(x));
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      if (verify_only) {
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        guarantee(*(uint32_t*) disp == encoded, "instructions must match");
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      } else {
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        *(int32_t*) disp = encoded;
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      }
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    } else {
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      if (verify_only) {
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        guarantee(*(uint32_t*) disp == CompressedKlassPointers::encode((Klass*)x), "instructions must match");
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      } else {
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        *(int32_t*) disp = CompressedKlassPointers::encode((Klass*)x);
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      }
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    }
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  } else {
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    // Note:  Use runtime_call_type relocations for call32_operand.
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    address ip = addr();
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    address disp = Assembler::locate_operand(ip, which);
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    address next_ip = Assembler::locate_next_instruction(ip);
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    if (verify_only) {
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      guarantee(*(int32_t*) disp == (x - next_ip), "instructions must match");
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    } else {
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      *(int32_t*) disp = checked_cast<int32_t>(x - next_ip);
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    }
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  }
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#else
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  if (verify_only) {
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    guarantee(*pd_address_in_code() == x, "instructions must match");
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  } else {
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    *pd_address_in_code() = x;
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  }
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#endif // AMD64
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}
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address Relocation::pd_call_destination(address orig_addr) {
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  intptr_t adj = 0;
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  if (orig_addr != nullptr) {
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    // We just moved this call instruction from orig_addr to addr().
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    // This means its target will appear to have grown by addr() - orig_addr.
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    adj = -( addr() - orig_addr );
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  }
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  NativeInstruction* ni = nativeInstruction_at(addr());
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  if (ni->is_call()) {
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    return nativeCall_at(addr())->destination() + adj;
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  } else if (ni->is_jump()) {
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    address dest = nativeJump_at(addr())->jump_destination();
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    if (dest == (address) -1) {
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      return addr(); // jump to self
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    }
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    return dest + adj;
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  } else if (ni->is_cond_jump()) {
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    return nativeGeneralJump_at(addr())->jump_destination() + adj;
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  } else if (ni->is_mov_literal64()) {
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    return (address) ((NativeMovConstReg*)ni)->data();
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  } else {
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    ShouldNotReachHere();
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    return nullptr;
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  }
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}
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void Relocation::pd_set_call_destination(address x) {
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  NativeInstruction* ni = nativeInstruction_at(addr());
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  if (ni->is_call()) {
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    nativeCall_at(addr())->set_destination(x);
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  } else if (ni->is_jump()) {
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    NativeJump* nj = nativeJump_at(addr());
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    // Unresolved jumps are recognized by a destination of -1
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    // However 64bit can't actually produce such an address
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    // and encodes a jump to self but jump_destination will
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    // return a -1 as the signal. We must not relocate this
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    // jmp or the ic code will not see it as unresolved.
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    if (nj->jump_destination() == (address) -1) {
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      x = addr(); // jump to self
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    }
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    nj->set_jump_destination(x);
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  } else if (ni->is_cond_jump()) {
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    // %%%% kludge this, for now, until we get a jump_destination method
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    address old_dest = nativeGeneralJump_at(addr())->jump_destination();
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    address disp = Assembler::locate_operand(addr(), Assembler::call32_operand);
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    *(jint*)disp += checked_cast<jint>(x - old_dest);
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  } else if (ni->is_mov_literal64()) {
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    ((NativeMovConstReg*)ni)->set_data((intptr_t)x);
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  } else {
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    ShouldNotReachHere();
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  }
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}
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address* Relocation::pd_address_in_code() {
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  // All embedded Intel addresses are stored in 32-bit words.
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  // Since the addr points at the start of the instruction,
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  // we must parse the instruction a bit to find the embedded word.
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  assert(is_data(), "must be a DataRelocation");
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  typedef Assembler::WhichOperand WhichOperand;
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  WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
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#ifdef AMD64
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  assert(which == Assembler::disp32_operand ||
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         which == Assembler::call32_operand ||
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         which == Assembler::imm_operand, "format unpacks ok");
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  // The "address" in the code is a displacement can't return it as
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  // and address* since it is really a jint*
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  guarantee(which == Assembler::imm_operand, "must be immediate operand");
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#else
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  assert(which == Assembler::disp32_operand || which == Assembler::imm_operand, "format unpacks ok");
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#endif // AMD64
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  return (address*) Assembler::locate_operand(addr(), which);
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}
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address Relocation::pd_get_address_from_code() {
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#ifdef AMD64
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  // All embedded Intel addresses are stored in 32-bit words.
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  // Since the addr points at the start of the instruction,
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  // we must parse the instruction a bit to find the embedded word.
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  assert(is_data(), "must be a DataRelocation");
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  typedef Assembler::WhichOperand WhichOperand;
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  WhichOperand which = (WhichOperand) format(); // that is, disp32 or imm/imm32
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  assert(which == Assembler::disp32_operand ||
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         which == Assembler::call32_operand ||
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         which == Assembler::imm_operand, "format unpacks ok");
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  if (which != Assembler::imm_operand) {
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    address ip = addr();
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    address disp = Assembler::locate_operand(ip, which);
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    address next_ip = Assembler::locate_next_instruction(ip);
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    address a = next_ip + *(int32_t*) disp;
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    return a;
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  }
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#endif // AMD64
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  return *pd_address_in_code();
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}
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void poll_Relocation::fix_relocation_after_move(const CodeBuffer* src, CodeBuffer* dest) {
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}
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void metadata_Relocation::pd_fix_value(address x) {
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}
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