jdk

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/*
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 * Copyright (c) 2022, 2024, Oracle and/or its affiliates. All rights reserved.
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 * DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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 *
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 * This code is free software; you can redistribute it and/or modify it
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 * under the terms of the GNU General Public License version 2 only, as
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 * published by the Free Software Foundation.
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 *
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 * This code is distributed in the hope that it will be useful, but WITHOUT
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 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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 * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
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 * version 2 for more details (a copy is included in the LICENSE file that
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 * accompanied this code).
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 *
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 * You should have received a copy of the GNU General Public License version
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 * 2 along with this work; if not, write to the Free Software Foundation,
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 * Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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 *
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 * Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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 * or visit www.oracle.com if you need additional information or have any
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 * questions.
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 *
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 */
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#include "precompiled.hpp"
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#ifdef COMPILER2
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#include "peephole_x86_64.hpp"
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#include "adfiles/ad_x86.hpp"
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// This function transforms the shapes
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// mov d, s1; add d, s2 into
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// lea d, [s1 + s2]     and
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// mov d, s1; shl d, s2 into
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// lea d, [s1 << s2]    with s2 = 1, 2, 3
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static bool lea_coalesce_helper(Block* block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc* ra_,
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                                MachNode* (*new_root)(), uint inst0_rule, bool imm) {
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  MachNode* inst0 = block->get_node(block_index)->as_Mach();
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  assert(inst0->rule() == inst0_rule, "sanity");
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  OptoReg::Name dst = ra_->get_reg_first(inst0);
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  MachNode* inst1 = nullptr;
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  OptoReg::Name src1 = OptoReg::Bad;
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  if (inst0->in(1)->is_MachSpillCopy()) {
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    OptoReg::Name in = ra_->get_reg_first(inst0->in(1)->in(1));
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    if (OptoReg::is_reg(in) && OptoReg::as_VMReg(in)->is_Register()) {
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      inst1 = inst0->in(1)->as_Mach();
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      src1 = in;
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    }
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  }
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  if (inst1 == nullptr) {
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    return false;
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  }
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  assert(dst != src1, "");
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  // Only coalesce if inst1 is immediately followed by inst0
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  // Can be improved for more general cases
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  if (block_index < 1 || block->get_node(block_index - 1) != inst1) {
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    return false;
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  }
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  int inst1_index = block_index - 1;
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  Node* inst2;
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  if (imm) {
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    inst2 = nullptr;
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  } else {
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    inst2 = inst0->in(2);
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    if (inst2 == inst1) {
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      inst2 = inst2->in(1);
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    }
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  }
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  // See VM_Version::supports_fast_3op_lea()
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  if (!imm) {
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    Register rsrc1 = OptoReg::as_VMReg(src1)->as_Register();
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    Register rsrc2 = OptoReg::as_VMReg(ra_->get_reg_first(inst2))->as_Register();
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    if ((rsrc1 == rbp || rsrc1 == r13) && (rsrc2 == rbp || rsrc2 == r13)) {
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      return false;
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    }
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  }
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  // Go down the block to find the output proj node (the flag output) of inst0
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  int proj_index = -1;
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  Node* proj = nullptr;
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  for (uint pos = block_index + 1; pos < block->number_of_nodes(); pos++) {
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    Node* curr = block->get_node(pos);
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    if (curr->is_MachProj() && curr->in(0) == inst0) {
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      proj_index = pos;
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      proj = curr;
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      break;
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    }
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  }
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  assert(proj != nullptr, "");
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  // If some node uses the flag, cannot remove
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  if (proj->outcnt() > 0) {
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    return false;
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  }
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  MachNode* root = new_root();
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  // Assign register for the newly allocated node
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  ra_->set_oop(root, ra_->is_oop(inst0));
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  ra_->set_pair(root->_idx, ra_->get_reg_second(inst0), ra_->get_reg_first(inst0));
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  // Set input and output for the node
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  root->add_req(inst0->in(0));
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  root->add_req(inst1->in(1));
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  // No input for constant after matching
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  if (!imm) {
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    root->add_req(inst2);
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  }
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  inst0->replace_by(root);
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  proj->set_req(0, inst0);
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  // Initialize the operand array
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  root->_opnds[0] = inst0->_opnds[0]->clone();
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  root->_opnds[1] = inst0->_opnds[1]->clone();
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  root->_opnds[2] = inst0->_opnds[2]->clone();
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  // Modify the block
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  inst0->set_removed();
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  inst1->set_removed();
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  block->remove_node(proj_index);
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  block->remove_node(block_index);
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  block->remove_node(inst1_index);
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  block->insert_node(root, block_index - 1);
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  // Modify the CFG
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  cfg_->map_node_to_block(inst0, nullptr);
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  cfg_->map_node_to_block(inst1, nullptr);
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  cfg_->map_node_to_block(proj, nullptr);
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  cfg_->map_node_to_block(root, block);
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  return true;
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}
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// This helper func takes a condition and returns the flags that need to be set for the condition
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// It uses the same flags as the test instruction, so if the e.g. the overflow bit is required,
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// this func returns clears_overflow, as that is what the test instruction does and what the downstream path expects
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static juint map_condition_to_required_test_flags(Assembler::Condition condition) {
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  switch (condition) {
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    case Assembler::Condition::zero: // Same value as equal
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    case Assembler::Condition::notZero: // Same value as notEqual
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      return Node::PD::Flag_sets_zero_flag;
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    case Assembler::Condition::less:
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    case Assembler::Condition::greaterEqual:
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      return Node::PD::Flag_sets_sign_flag | Node::PD::Flag_clears_overflow_flag;
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    case Assembler::Condition::lessEqual:
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    case Assembler::Condition::greater:
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      return Node::PD::Flag_sets_sign_flag | Node::PD::Flag_clears_overflow_flag | Node::PD::Flag_sets_zero_flag;
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    case Assembler::Condition::below: // Same value as carrySet
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    case Assembler::Condition::aboveEqual: // Same value as carryClear
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      return Node::PD::Flag_clears_carry_flag;
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    case Assembler::Condition::belowEqual:
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    case Assembler::Condition::above:
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      return Node::PD::Flag_clears_carry_flag | Node::PD::Flag_sets_zero_flag;
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    case Assembler::Condition::overflow:
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    case Assembler::Condition::noOverflow:
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      return Node::PD::Flag_clears_overflow_flag;
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    case Assembler::Condition::negative:
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    case Assembler::Condition::positive:
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      return Node::PD::Flag_sets_sign_flag;
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    case Assembler::Condition::parity:
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    case Assembler::Condition::noParity:
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      return Node::PD::Flag_sets_parity_flag;
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    default:
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      ShouldNotReachHere();
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      return 0;
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  }
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}
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// This function removes the TEST instruction when it detected shapes likes AND r1, r2; TEST r1, r1
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// It checks the required EFLAGS for the downstream instructions of the TEST
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// and removes the TEST if the preceding instructions already sets all these flags
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bool Peephole::test_may_remove(Block* block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc* ra_,
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                            MachNode* (*new_root)(), uint inst0_rule) {
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  MachNode* test_to_check = block->get_node(block_index)->as_Mach();
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  assert(test_to_check->rule() == inst0_rule, "sanity");
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  Node* inst1 = test_to_check->in(1);
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  // Only remove test if the block order is inst1 -> MachProjNode (because the node to match must specify KILL cr) -> test_to_check
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  // So inst1 must be at index - 2
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  if (block_index < 2 || block->get_node(block_index - 2) != inst1) {
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    return false;
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  }
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  if (inst1 != nullptr) {
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    MachNode* prevNode = inst1->isa_Mach();
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    if (prevNode != nullptr) {
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      // Includes other flags as well, but that doesn't matter here
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      juint all_node_flags = prevNode->flags();
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      if (all_node_flags == 0) {
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        // We can return early - there is no way the test can be removed, the preceding node does not set any flags
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        return false;
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      }
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      juint required_flags = 0;
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      // Search for the uses of the node and compute which flags are required
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      for (DUIterator_Fast imax, i = test_to_check->fast_outs(imax); i < imax; i++) {
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        MachNode* node_out = test_to_check->fast_out(i)->isa_Mach();
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        bool found_correct_oper = false;
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        for (uint16_t j = 0; j < node_out->_num_opnds; ++j) {
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          MachOper* operand = node_out->_opnds[j];
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          if (operand->opcode() == cmpOp_rule || operand->opcode() == cmpOpU_rule) {
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            auto condition = static_cast<Assembler::Condition>(operand->ccode());
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            juint flags_for_inst = map_condition_to_required_test_flags(condition);
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            required_flags = required_flags | flags_for_inst;
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            found_correct_oper = true;
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            break;
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          }
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        }
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        if (!found_correct_oper) {
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          // We could not find one the required flags for one of the dependencies. Keep the test as it might set flags needed for that node
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          return false;
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        }
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      }
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      assert(required_flags != 0, "No flags required, should be impossible!");
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      bool sets_all_required_flags = (required_flags & ~all_node_flags) == 0;
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      if (sets_all_required_flags) {
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        // All flags are covered are clear to remove this test
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        MachProjNode* machProjNode = block->get_node(block_index - 1)->isa_MachProj();
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        assert(machProjNode != nullptr, "Expected a MachProj node here!");
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        assert(ra_->get_reg_first(machProjNode) == ra_->get_reg_first(test_to_check), "Test must operate on the same register as its replacement");
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        // Remove the original test node and replace it with the pseudo test node. The AND node already sets ZF
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        test_to_check->replace_by(machProjNode);
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        // Modify the block
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        test_to_check->set_removed();
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        block->remove_node(block_index);
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        // Modify the control flow
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        cfg_->map_node_to_block(test_to_check, nullptr);
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        return true;
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      }
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    }
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  }
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  return false;
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}
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bool Peephole::lea_coalesce_reg(Block* block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc* ra_,
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                                MachNode* (*new_root)(), uint inst0_rule) {
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  return lea_coalesce_helper(block, block_index, cfg_, ra_, new_root, inst0_rule, false);
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}
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bool Peephole::lea_coalesce_imm(Block* block, int block_index, PhaseCFG* cfg_, PhaseRegAlloc* ra_,
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                                MachNode* (*new_root)(), uint inst0_rule) {
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  return lea_coalesce_helper(block, block_index, cfg_, ra_, new_root, inst0_rule, true);
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}
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#endif // COMPILER2
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