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* Copyright (c) 2020 Microsoft Corporation. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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* Copyright (c) 2017 Project Nayuki. (MIT License)
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* https://www.nayuki.io/page/fast-md5-hash-implementation-in-x86-assembly
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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* - The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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* - The Software is provided "as is", without warranty of any kind, express or
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* implied, including but not limited to the warranties of merchantability,
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* fitness for a particular purpose and noninfringement. In no event shall the
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* authors or copyright holders be liable for any claim, damages or other
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* liability, whether in an action of contract, tort or otherwise, arising from,
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* out of or in connection with the Software or the use or other dealings in the
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#include "precompiled.hpp"
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#include "asm/assembler.hpp"
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#include "asm/assembler.inline.hpp"
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#include "runtime/stubRoutines.hpp"
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#include "macroAssembler_x86.hpp"
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// int com.sun.security.provider.MD5.implCompress0(byte[] b, int ofs)
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void MacroAssembler::fast_md5(Register buf, Address state, Address ofs, Address limit, bool multi_block) {
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Label done_hash, loop0;
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movl(rax, Address(rdi, 0));
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movl(rbx, Address(rdi, 4));
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movl(rcx, Address(rdi, 8));
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movl(rdx, Address(rdi, 12));
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#define FF(r1, r2, r3, r4, k, s, t) \
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addl(r1, Address(buf, k*4)); \
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#define GG(r1, r2, r3, r4, k, s, t) \
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addl(r1, Address(buf, k*4)); \
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#define HH(r1, r2, r3, r4, k, s, t) \
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addl(r1, Address(buf, k*4)); \
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#define II(r1, r2, r3, r4, k, s, t) \
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addl(r1, Address(buf, k*4)); \
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FF(rax, rbx, rcx, rdx, 0, 7, 0xd76aa478)
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FF(rdx, rax, rbx, rcx, 1, 12, 0xe8c7b756)
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FF(rcx, rdx, rax, rbx, 2, 17, 0x242070db)
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FF(rbx, rcx, rdx, rax, 3, 22, 0xc1bdceee)
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FF(rax, rbx, rcx, rdx, 4, 7, 0xf57c0faf)
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FF(rdx, rax, rbx, rcx, 5, 12, 0x4787c62a)
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FF(rcx, rdx, rax, rbx, 6, 17, 0xa8304613)
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FF(rbx, rcx, rdx, rax, 7, 22, 0xfd469501)
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FF(rax, rbx, rcx, rdx, 8, 7, 0x698098d8)
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FF(rdx, rax, rbx, rcx, 9, 12, 0x8b44f7af)
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FF(rcx, rdx, rax, rbx, 10, 17, 0xffff5bb1)
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FF(rbx, rcx, rdx, rax, 11, 22, 0x895cd7be)
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FF(rax, rbx, rcx, rdx, 12, 7, 0x6b901122)
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FF(rdx, rax, rbx, rcx, 13, 12, 0xfd987193)
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FF(rcx, rdx, rax, rbx, 14, 17, 0xa679438e)
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FF(rbx, rcx, rdx, rax, 15, 22, 0x49b40821)
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GG(rax, rbx, rcx, rdx, 1, 5, 0xf61e2562)
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GG(rdx, rax, rbx, rcx, 6, 9, 0xc040b340)
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GG(rcx, rdx, rax, rbx, 11, 14, 0x265e5a51)
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GG(rbx, rcx, rdx, rax, 0, 20, 0xe9b6c7aa)
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GG(rax, rbx, rcx, rdx, 5, 5, 0xd62f105d)
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GG(rdx, rax, rbx, rcx, 10, 9, 0x02441453)
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GG(rcx, rdx, rax, rbx, 15, 14, 0xd8a1e681)
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GG(rbx, rcx, rdx, rax, 4, 20, 0xe7d3fbc8)
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GG(rax, rbx, rcx, rdx, 9, 5, 0x21e1cde6)
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GG(rdx, rax, rbx, rcx, 14, 9, 0xc33707d6)
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GG(rcx, rdx, rax, rbx, 3, 14, 0xf4d50d87)
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GG(rbx, rcx, rdx, rax, 8, 20, 0x455a14ed)
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GG(rax, rbx, rcx, rdx, 13, 5, 0xa9e3e905)
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GG(rdx, rax, rbx, rcx, 2, 9, 0xfcefa3f8)
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GG(rcx, rdx, rax, rbx, 7, 14, 0x676f02d9)
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GG(rbx, rcx, rdx, rax, 12, 20, 0x8d2a4c8a)
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HH(rax, rbx, rcx, rdx, 5, 4, 0xfffa3942)
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HH(rdx, rax, rbx, rcx, 8, 11, 0x8771f681)
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HH(rcx, rdx, rax, rbx, 11, 16, 0x6d9d6122)
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HH(rbx, rcx, rdx, rax, 14, 23, 0xfde5380c)
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HH(rax, rbx, rcx, rdx, 1, 4, 0xa4beea44)
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HH(rdx, rax, rbx, rcx, 4, 11, 0x4bdecfa9)
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HH(rcx, rdx, rax, rbx, 7, 16, 0xf6bb4b60)
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HH(rbx, rcx, rdx, rax, 10, 23, 0xbebfbc70)
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HH(rax, rbx, rcx, rdx, 13, 4, 0x289b7ec6)
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HH(rdx, rax, rbx, rcx, 0, 11, 0xeaa127fa)
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HH(rcx, rdx, rax, rbx, 3, 16, 0xd4ef3085)
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HH(rbx, rcx, rdx, rax, 6, 23, 0x04881d05)
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HH(rax, rbx, rcx, rdx, 9, 4, 0xd9d4d039)
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HH(rdx, rax, rbx, rcx, 12, 11, 0xe6db99e5)
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HH(rcx, rdx, rax, rbx, 15, 16, 0x1fa27cf8)
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HH(rbx, rcx, rdx, rax, 2, 23, 0xc4ac5665)
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II(rax, rbx, rcx, rdx, 0, 6, 0xf4292244)
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II(rdx, rax, rbx, rcx, 7, 10, 0x432aff97)
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II(rcx, rdx, rax, rbx, 14, 15, 0xab9423a7)
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II(rbx, rcx, rdx, rax, 5, 21, 0xfc93a039)
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II(rax, rbx, rcx, rdx, 12, 6, 0x655b59c3)
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II(rdx, rax, rbx, rcx, 3, 10, 0x8f0ccc92)
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II(rcx, rdx, rax, rbx, 10, 15, 0xffeff47d)
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II(rbx, rcx, rdx, rax, 1, 21, 0x85845dd1)
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II(rax, rbx, rcx, rdx, 8, 6, 0x6fa87e4f)
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II(rdx, rax, rbx, rcx, 15, 10, 0xfe2ce6e0)
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II(rcx, rdx, rax, rbx, 6, 15, 0xa3014314)
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II(rbx, rcx, rdx, rax, 13, 21, 0x4e0811a1)
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II(rax, rbx, rcx, rdx, 4, 6, 0xf7537e82)
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II(rdx, rax, rbx, rcx, 11, 10, 0xbd3af235)
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II(rcx, rdx, rax, rbx, 2, 15, 0x2ad7d2bb)
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II(rbx, rcx, rdx, rax, 9, 21, 0xeb86d391)
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// write hash values back in the correct order
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addl(rax, Address(rdi, 0));
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movl(Address(rdi, 0), rax);
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addl(rbx, Address(rdi, 4));
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movl(Address(rdi, 4), rbx);
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addl(rcx, Address(rdi, 8));
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movl(Address(rdi, 8), rcx);
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addl(rdx, Address(rdi, 12));
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movl(Address(rdi, 12), rdx);
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// increment data pointer and loop if more to process
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jcc(Assembler::belowEqual, loop0);
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movptr(rax, rsi); //return ofs