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* Copyright (c) 2020, 2023, Oracle and/or its affiliates. All rights reserved.
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* Copyright (c) 2019, 2022, Arm Limited. All rights reserved.
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* DO NOT ALTER OR REMOVE COPYRIGHT NOTICES OR THIS FILE HEADER.
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* This code is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License version 2 only, as
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* published by the Free Software Foundation.
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* This code is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
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* version 2 for more details (a copy is included in the LICENSE file that
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* accompanied this code).
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* You should have received a copy of the GNU General Public License version
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* 2 along with this work; if not, write to the Free Software Foundation,
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* Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA.
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* Please contact Oracle, 500 Oracle Parkway, Redwood Shores, CA 94065 USA
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* or visit www.oracle.com if you need additional information or have any
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#include "precompiled.hpp"
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#include "code/vmreg.inline.hpp"
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#include "runtime/jniHandles.hpp"
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#include "runtime/jniHandles.inline.hpp"
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#include "oops/typeArrayOop.inline.hpp"
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#include "oops/oopCast.inline.hpp"
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#include "prims/foreignGlobals.hpp"
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#include "prims/foreignGlobals.inline.hpp"
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#include "prims/vmstorage.hpp"
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#include "utilities/formatBuffer.hpp"
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bool ForeignGlobals::is_foreign_linker_supported() {
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bool ABIDescriptor::is_volatile_reg(Register reg) const {
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return _integer_argument_registers.contains(reg)
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|| _integer_additional_volatile_registers.contains(reg);
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bool ABIDescriptor::is_volatile_reg(FloatRegister reg) const {
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return _vector_argument_registers.contains(reg)
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|| _vector_additional_volatile_registers.contains(reg);
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const ABIDescriptor ForeignGlobals::parse_abi_descriptor(jobject jabi) {
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oop abi_oop = JNIHandles::resolve_non_null(jabi);
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objArrayOop inputStorage = jdk_internal_foreign_abi_ABIDescriptor::inputStorage(abi_oop);
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parse_register_array(inputStorage, StorageType::INTEGER, abi._integer_argument_registers, as_Register);
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parse_register_array(inputStorage, StorageType::VECTOR, abi._vector_argument_registers, as_FloatRegister);
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objArrayOop outputStorage = jdk_internal_foreign_abi_ABIDescriptor::outputStorage(abi_oop);
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parse_register_array(outputStorage, StorageType::INTEGER, abi._integer_return_registers, as_Register);
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parse_register_array(outputStorage, StorageType::VECTOR, abi._vector_return_registers, as_FloatRegister);
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objArrayOop volatileStorage = jdk_internal_foreign_abi_ABIDescriptor::volatileStorage(abi_oop);
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parse_register_array(volatileStorage, StorageType::INTEGER, abi._integer_additional_volatile_registers, as_Register);
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parse_register_array(volatileStorage, StorageType::VECTOR, abi._vector_additional_volatile_registers, as_FloatRegister);
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abi._stack_alignment_bytes = jdk_internal_foreign_abi_ABIDescriptor::stackAlignment(abi_oop);
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abi._shadow_space_bytes = jdk_internal_foreign_abi_ABIDescriptor::shadowSpace(abi_oop);
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abi._scratch1 = parse_vmstorage(jdk_internal_foreign_abi_ABIDescriptor::scratch1(abi_oop));
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abi._scratch2 = parse_vmstorage(jdk_internal_foreign_abi_ABIDescriptor::scratch2(abi_oop));
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int RegSpiller::pd_reg_size(VMStorage reg) {
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if (reg.type() == StorageType::INTEGER) {
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} else if (reg.type() == StorageType::VECTOR) {
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return 16; // Always spill/unspill Q registers
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return 0; // stack and BAD
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void RegSpiller::pd_store_reg(MacroAssembler* masm, int offset, VMStorage reg) {
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if (reg.type() == StorageType::INTEGER) {
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masm->spill(as_Register(reg), true, offset);
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} else if (reg.type() == StorageType::VECTOR) {
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masm->spill(as_FloatRegister(reg), masm->Q, offset);
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void RegSpiller::pd_load_reg(MacroAssembler* masm, int offset, VMStorage reg) {
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if (reg.type() == StorageType::INTEGER) {
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masm->unspill(as_Register(reg), true, offset);
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} else if (reg.type() == StorageType::VECTOR) {
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masm->unspill(as_FloatRegister(reg), masm->Q, offset);
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static constexpr int RFP_BIAS = 16; // skip old rfp and lr
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static void move_reg64(MacroAssembler* masm, int out_stk_bias,
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Register from_reg, VMStorage to_reg) {
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switch (to_reg.type()) {
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case StorageType::INTEGER:
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assert(to_reg.segment_mask() == REG64_MASK, "only moves to 64-bit registers supported");
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masm->mov(as_Register(to_reg), from_reg);
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case StorageType::STACK:
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out_bias = out_stk_bias;
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case StorageType::FRAME_DATA: {
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Address dest(sp, to_reg.offset() + out_bias);
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switch (to_reg.stack_size()) {
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case 8: masm->str (from_reg, dest); break;
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case 4: masm->strw(from_reg, dest); break;
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case 2: masm->strh(from_reg, dest); break;
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case 1: masm->strb(from_reg, dest); break;
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default: ShouldNotReachHere();
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default: ShouldNotReachHere();
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static void move_stack(MacroAssembler* masm, Register tmp_reg, int in_stk_bias, int out_stk_bias,
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VMStorage from_reg, VMStorage to_reg) {
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Address from_addr(rfp, RFP_BIAS + from_reg.offset() + in_stk_bias);
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switch (to_reg.type()) {
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case StorageType::INTEGER:
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assert(to_reg.segment_mask() == REG64_MASK, "only moves to 64-bit registers supported");
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switch (from_reg.stack_size()) {
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case 8: masm->ldr (as_Register(to_reg), from_addr); break;
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case 4: masm->ldrw(as_Register(to_reg), from_addr); break;
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case 2: masm->ldrh(as_Register(to_reg), from_addr); break;
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case 1: masm->ldrb(as_Register(to_reg), from_addr); break;
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default: ShouldNotReachHere();
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case StorageType::VECTOR:
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assert(to_reg.segment_mask() == V128_MASK, "only moves to v128 registers supported");
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switch (from_reg.stack_size()) {
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masm->ldrd(as_FloatRegister(to_reg), from_addr);
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masm->ldrs(as_FloatRegister(to_reg), from_addr);
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default: ShouldNotReachHere();
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case StorageType::STACK:
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out_bias = out_stk_bias;
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case StorageType::FRAME_DATA: {
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switch (from_reg.stack_size()) {
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case 8: masm->ldr (tmp_reg, from_addr); break;
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case 4: masm->ldrw(tmp_reg, from_addr); break;
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case 2: masm->ldrh(tmp_reg, from_addr); break;
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case 1: masm->ldrb(tmp_reg, from_addr); break;
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default: ShouldNotReachHere();
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Address dest(sp, to_reg.offset() + out_bias);
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switch (to_reg.stack_size()) {
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case 8: masm->str (tmp_reg, dest); break;
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case 4: masm->strw(tmp_reg, dest); break;
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case 2: masm->strh(tmp_reg, dest); break;
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case 1: masm->strb(tmp_reg, dest); break;
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default: ShouldNotReachHere();
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default: ShouldNotReachHere();
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static void move_v128(MacroAssembler* masm, int out_stk_bias,
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FloatRegister from_reg, VMStorage to_reg) {
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switch (to_reg.type()) {
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case StorageType::INTEGER:
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assert(to_reg.segment_mask() == REG64_MASK, "only moves to 64-bit registers supported");
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masm->fmovd(as_Register(to_reg), from_reg);
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case StorageType::VECTOR:
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assert(to_reg.segment_mask() == V128_MASK, "only moves to v128 registers supported");
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masm->fmovd(as_FloatRegister(to_reg), from_reg);
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case StorageType::STACK: {
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Address dest(sp, to_reg.offset() + out_stk_bias);
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switch (to_reg.stack_size()) {
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case 8: masm->strd(from_reg, dest); break;
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case 4: masm->strs(from_reg, dest); break;
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default: ShouldNotReachHere();
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default: ShouldNotReachHere();
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void ArgumentShuffle::pd_generate(MacroAssembler* masm, VMStorage tmp, int in_stk_bias, int out_stk_bias) const {
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Register tmp_reg = as_Register(tmp);
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for (int i = 0; i < _moves.length(); i++) {
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Move move = _moves.at(i);
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VMStorage from_reg = move.from;
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VMStorage to_reg = move.to;
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switch (from_reg.type()) {
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case StorageType::INTEGER:
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assert(from_reg.segment_mask() == REG64_MASK, "only 64-bit register supported");
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move_reg64(masm, out_stk_bias, as_Register(from_reg), to_reg);
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case StorageType::VECTOR:
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assert(from_reg.segment_mask() == V128_MASK, "only v128 register supported");
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move_v128(masm, out_stk_bias, as_FloatRegister(from_reg), to_reg);
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case StorageType::STACK:
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move_stack(masm, tmp_reg, in_stk_bias, out_stk_bias, from_reg, to_reg);
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default: ShouldNotReachHere();