SandboXP

1
"use strict";
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3
/** @const */
4
var PIC_LOG_VERBOSE = false;
5

6
/**
7
 * Programmable Interrupt Controller
8
 * http://stanislavs.org/helppc/8259.html
9
 *
10
 * @constructor
11
 * @param {CPU} cpu
12
 * @param {PIC=} master
13
 */
14
function PIC(cpu, master)
15
{
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    /**
17
     * all irqs off
18
     * @type {number}
19
     */
20
    this.irq_mask = 0;
21

22
    /**
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     * @type {number}
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     *
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     * Bogus default value (both master and slave mapped to 0).
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     * Will be initialized by the BIOS
27
     */
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    this.irq_map = 0;
29

30
    /**
31
     * in-service register
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     * Holds interrupts that are currently being serviced
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     * @type {number}
34
     */
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    this.isr = 0;
36

37
    /**
38
     * interrupt request register
39
     * Holds interrupts that have been requested
40
     * @type {number}
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     */
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    this.irr = 0;
43

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    this.irq_value = 0;
45

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    /**
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     * @type {number}
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     */
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    this.requested_irq = -1;
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    this.master = master;
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    this.is_master = this.master === undefined;
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    this.slave = undefined;
54

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    this.name = this.is_master ? "master" : "slave ";
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    this.expect_icw4 = false;
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    this.state = 0;
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    this.read_isr = 0;
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    this.auto_eoi = 1;
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    this.special_mask_mode = 0;
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    this.elcr = 0;
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    this.cpu = cpu;
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    // Checking for callable interrupts:
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    // (cpu changes interrupt flag) -> cpu.handle_irqs -> pic.check_irqs -> cpu.pic_call_irq
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    // (pic changes isr/irr) -> cpu.handle_irqs -> ...
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    // triggering irqs:
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    // (io device has irq) -> cpu.device_raise_irq -> pic.set_irq -> cpu.handle_irqs -> (see above)
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74

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    if(this.is_master)
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    {
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        this.slave = new PIC(this.cpu, this);
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        this.check_irqs = function()
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        {
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            if(this.requested_irq >= 0)
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            {
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                PIC_LOG_VERBOSE && dbg_log("master> Already requested irq: " + this.requested_irq, LOG_PIC);
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                this.cpu.handle_irqs();
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                return;
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            }
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            var enabled_irr = this.irr & this.irq_mask;
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90
            if(!enabled_irr)
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            {
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                if(PIC_LOG_VERBOSE)
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                {
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                    dbg_log("master> no unmasked irrs. irr=" + h(this.irr, 2) +
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                            " mask=" + h(this.irq_mask & 0xff, 2) + " isr=" + h(this.isr, 2), LOG_PIC);
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                }
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                return;
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            }
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            var irq_mask = enabled_irr & -enabled_irr;
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            var special_mask = this.special_mask_mode ? this.irq_mask : -1;
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            if(this.isr && (this.isr & -this.isr & special_mask) <= irq_mask)
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            {
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                // wait for eoi of higher or same priority interrupt
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                dbg_log("master> higher prio: isr=" + h(this.isr, 2) +
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                        " mask=" + h(this.irq_mask & 0xff, 2) + " irq=" + h(irq_mask, 2), LOG_PIC);
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                return;
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            }
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111
            dbg_assert(irq_mask !== 0);
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            var irq_number = v86util.int_log2_byte(irq_mask);
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            dbg_assert(irq_mask === (1 << irq_number));
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            PIC_LOG_VERBOSE && dbg_log("master> request irq " + irq_number, LOG_PIC);
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            this.requested_irq = irq_number;
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            this.cpu.handle_irqs();
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        };
120

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        this.acknowledge_irq = function()
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        {
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            if(this.requested_irq === -1)
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            {
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                return;
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            }
127

128
            if(this.irr === 0)
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            {
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                PIC_LOG_VERBOSE && dbg_log("master> spurious requested=" + this.requested_irq, LOG_PIC);
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                this.requested_irq = -1;
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                //this.cpu.pic_call_irq(this.irq_map | 7);
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                return;
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            }
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            dbg_assert(this.irr); // spurious
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            dbg_assert(this.requested_irq >= 0);
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            var irq_mask = 1 << this.requested_irq;
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140
            if((this.elcr & irq_mask) === 0) // not in level mode
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            {
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                this.irr &= ~irq_mask;
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            }
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            if(!this.auto_eoi)
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            {
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                this.isr |= irq_mask;
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            }
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            PIC_LOG_VERBOSE && dbg_log("master> acknowledge " + this.requested_irq, LOG_PIC);
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            if(this.requested_irq === 2)
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            {
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                this.slave.acknowledge_irq();
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            }
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            else
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            {
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                this.cpu.pic_call_irq(this.irq_map | this.requested_irq);
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            }
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            this.requested_irq = -1;
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            this.check_irqs();
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        };
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    }
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    else
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    {
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        // is slave
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        this.check_irqs = function()
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        {
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            if(this.requested_irq >= 0)
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            {
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                PIC_LOG_VERBOSE && dbg_log("slave > Already requested irq: " + this.requested_irq, LOG_PIC);
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                this.cpu.handle_irqs();
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                return;
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            }
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            var enabled_irr = this.irr & this.irq_mask;
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            if(!enabled_irr)
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            {
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                if(PIC_LOG_VERBOSE)
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                {
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                    dbg_log("slave > no unmasked irrs. irr=" + h(this.irr, 2) +
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                            " mask=" + h(this.irq_mask & 0xff, 2) + " isr=" + h(this.isr, 2), LOG_PIC);
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                }
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                return;
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            }
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            var irq_mask = enabled_irr & -enabled_irr;
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            var special_mask = this.special_mask_mode ? this.irq_mask : -1;
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            if(this.isr && (this.isr & -this.isr & special_mask) <= irq_mask)
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            {
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                // wait for eoi of higher or same priority interrupt
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                PIC_LOG_VERBOSE && dbg_log("slave > higher prio: isr=" + h(this.isr, 2) + " irq=" + h(irq_mask, 2), LOG_PIC);
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                return;
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            }
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            dbg_assert(irq_mask !== 0);
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            var irq_number = v86util.int_log2_byte(irq_mask);
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            dbg_assert(irq_mask === (1 << irq_number));
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            PIC_LOG_VERBOSE && dbg_log("slave > request irq " + irq_number, LOG_PIC);
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            this.requested_irq = irq_number;
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            this.master.set_irq(2);
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        };
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        this.acknowledge_irq = function()
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        {
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            if(this.requested_irq === -1)
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            {
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                return;
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            }
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214
            if(this.irr === 0)
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            {
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                PIC_LOG_VERBOSE && dbg_log("slave > spurious requested=" + this.requested_irq, LOG_PIC);
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                this.requested_irq = -1;
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                this.master.irq_value &= ~(1 << 2);
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                this.cpu.pic_call_irq(this.irq_map | 7);
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                return;
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            }
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            dbg_assert(this.irr); // spurious
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            dbg_assert(this.requested_irq >= 0);
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            var irq_mask = 1 << this.requested_irq;
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            if((this.elcr & irq_mask) === 0) // not in level mode
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            {
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                this.irr &= ~irq_mask;
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            }
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            if(!this.auto_eoi)
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            {
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                this.isr |= irq_mask;
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            }
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            this.master.irq_value &= ~(1 << 2);
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            PIC_LOG_VERBOSE && dbg_log("slave > acknowledge " + this.requested_irq, LOG_PIC);
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            this.cpu.pic_call_irq(this.irq_map | this.requested_irq);
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            this.requested_irq = -1;
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            this.check_irqs();
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        };
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    }
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    this.dump = function()
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    {
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        dbg_log("mask: " + h(this.irq_mask & 0xFF), LOG_PIC);
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        dbg_log("base: " + h(this.irq_map), LOG_PIC);
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        dbg_log("requested: " + h(this.irr), LOG_PIC);
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        dbg_log("serviced: " + h(this.isr), LOG_PIC);
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        if(this.is_master)
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        {
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            this.slave.dump();
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        }
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    };
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    var io_base;
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    var iobase_high;
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    if(this.is_master)
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    {
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        io_base = 0x20;
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        iobase_high = 0x4D0;
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    }
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    else
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    {
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        io_base = 0xA0;
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        iobase_high = 0x4D1;
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    }
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    this.cpu.io.register_write(io_base, this, this.port20_write);
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    this.cpu.io.register_read(io_base, this, this.port20_read);
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    this.cpu.io.register_write(io_base | 1, this, this.port21_write);
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    this.cpu.io.register_read(io_base | 1, this, this.port21_read);
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    this.cpu.io.register_write(iobase_high, this, this.port4D0_write);
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    this.cpu.io.register_read(iobase_high, this, this.port4D0_read);
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282

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    if(this.is_master)
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    {
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        this.set_irq = function(irq_number)
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        {
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            dbg_assert(irq_number >= 0 && irq_number < 16);
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            if(irq_number >= 8)
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            {
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                this.slave.set_irq(irq_number - 8);
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                return;
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            }
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            var irq_mask = 1 << irq_number;
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            if((this.irq_value & irq_mask) === 0)
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            {
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                if(PIC_LOG_VERBOSE)
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                {
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                    dbg_log("master> set irq " + irq_number, LOG_PIC);
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                }
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                this.irr |= irq_mask;
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                this.irq_value |= irq_mask;
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                this.check_irqs();
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            }
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            else
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            {
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                if(PIC_LOG_VERBOSE)
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                {
311
                    dbg_log("master> set irq " + irq_number + ": already set!", LOG_PIC);
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                }
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            }
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        };
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        this.clear_irq = function(irq_number)
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        {
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            dbg_assert(irq_number >= 0 && irq_number < 16);
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            if(PIC_LOG_VERBOSE)
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            {
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                dbg_log("master> clear irq " + irq_number, LOG_PIC);
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            }
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324
            if(irq_number >= 8)
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            {
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                this.slave.clear_irq(irq_number - 8);
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                return;
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            }
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            var irq_mask = 1 << irq_number;
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            if(this.irq_value & irq_mask)
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            {
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                this.irq_value &= ~irq_mask;
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                this.irr &= ~irq_mask;
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                this.check_irqs();
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            }
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        };
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    }
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    else
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    {
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        this.set_irq = function(irq_number)
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        {
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            dbg_assert(irq_number >= 0 && irq_number < 8);
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            var irq_mask = 1 << irq_number;
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            if((this.irq_value & irq_mask) === 0)
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            {
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                if(PIC_LOG_VERBOSE)
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                {
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                    dbg_log("slave > set irq " + irq_number, LOG_PIC);
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                }
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                this.irr |= irq_mask;
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                this.irq_value |= irq_mask;
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                this.check_irqs();
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            }
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            else
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            {
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                if(PIC_LOG_VERBOSE)
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                {
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                    dbg_log("slave > set irq " + irq_number + ": already set!", LOG_PIC);
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                }
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            }
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        };
365

366
        this.clear_irq = function(irq_number)
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        {
368
            dbg_assert(irq_number >= 0 && irq_number < 8);
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            if(PIC_LOG_VERBOSE)
370
            {
371
                dbg_log("slave > clear irq " + irq_number, LOG_PIC);
372
            }
373

374
            var irq_mask = 1 << irq_number;
375
            if(this.irq_value & irq_mask)
376
            {
377
                this.irq_value &= ~irq_mask;
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                this.irr &= ~irq_mask;
379
                this.check_irqs();
380
            }
381
        };
382
    }
383

384
    this.get_isr = function()
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    {
386
        return this.isr;
387
    };
388
}
389

390
PIC.prototype.get_state = function()
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{
392
    var state = [];
393

394
    state[0] = this.irq_mask;
395
    state[1] = this.irq_map;
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    state[2] = this.isr;
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    state[3] = this.irr;
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    state[4] = this.is_master;
399
    state[5] = this.slave;
400
    state[6] = this.expect_icw4;
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    state[7] = this.state;
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    state[8] = this.read_isr;
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    state[9] = this.auto_eoi;
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    state[10] = this.elcr;
405

406
    return state;
407
};
408

409
PIC.prototype.set_state = function(state)
410
{
411
    this.irq_mask = state[0];
412
    this.irq_map = state[1];
413
    this.isr = state[2];
414
    this.irr = state[3];
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    this.is_master = state[4];
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    this.slave && this.slave.set_state(state[5]);
417
    this.expect_icw4 = state[6];
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    this.state = state[7];
419
    this.read_isr = state[8];
420
    this.auto_eoi = state[9];
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    this.elcr = state[10];
422
};
423

424
PIC.prototype.port20_write = function(data_byte)
425
{
426
    //dbg_log("20 write: " + h(data_byte), LOG_PIC);
427
    if(data_byte & 0x10) // xxxx1xxx
428
    {
429
        // icw1
430
        dbg_log("icw1 = " + h(data_byte), LOG_PIC);
431
        this.isr = 0;
432
        this.irr = 0;
433
        this.irq_mask = 0;
434
        this.irq_value = 0;
435
        this.auto_eoi = 1;
436
        this.requested_irq = -1;
437

438
        this.expect_icw4 = data_byte & 1;
439
        this.state = 1;
440
    }
441
    else if(data_byte & 8) // xxx01xxx
442
    {
443
        // ocw3
444
        dbg_log("ocw3: " + h(data_byte), LOG_PIC);
445
        if(data_byte & 2)
446
        {
447
            this.read_isr = data_byte & 1;
448
        }
449
        if(data_byte & 4)
450
        {
451
            dbg_assert(false, "unimplemented: polling", LOG_PIC);
452
        }
453
        if(data_byte & 0x40)
454
        {
455
            this.special_mask_mode = (data_byte & 0x20) === 0x20;
456
            dbg_log("special mask mode: " + this.special_mask_mode, LOG_PIC);
457
        }
458
    }
459
    else // xxx00xxx
460
    {
461
        // ocw2
462
        // end of interrupt
463
        dbg_log("eoi: " + h(data_byte) + " (" + this.name + ")", LOG_PIC);
464

465
        var eoi_type = data_byte >> 5;
466

467
        if(eoi_type === 1)
468
        {
469
            // non-specific eoi
470
            this.isr &= this.isr - 1;
471
            dbg_log("new isr: " + h(this.isr, 2), LOG_PIC);
472
        }
473
        else if(eoi_type === 3)
474
        {
475
            // specific eoi
476
            this.isr &= ~(1 << (data_byte & 7));
477
        }
478
        else if((data_byte & 0xC8) === 0xC0)
479
        {
480
            // os2 v4
481
            let priority = data_byte & 7;
482
            dbg_log("lowest priority: " + h(priority), LOG_PIC);
483
        }
484
        else
485
        {
486
            dbg_log("Unknown eoi: " + h(data_byte), LOG_PIC);
487
            dbg_assert(false);
488
            this.isr &= this.isr - 1;
489
        }
490

491
        this.check_irqs();
492
    }
493
};
494

495
PIC.prototype.port20_read = function()
496
{
497
    if(this.read_isr)
498
    {
499
        dbg_log("read port 20h (isr): " + h(this.isr), LOG_PIC);
500
        return this.isr;
501
    }
502
    else
503
    {
504
        dbg_log("read port 20h (irr): " + h(this.irr), LOG_PIC);
505
        return this.irr;
506
    }
507
};
508

509
PIC.prototype.port21_write = function(data_byte)
510
{
511
    //dbg_log("21 write: " + h(data_byte), LOG_PIC);
512
    if(this.state === 0)
513
    {
514
        if(this.expect_icw4)
515
        {
516
            // icw4
517
            this.expect_icw4 = false;
518
            this.auto_eoi = data_byte & 2;
519
            dbg_log("icw4: " + h(data_byte) + " autoeoi=" + this.auto_eoi, LOG_PIC);
520

521
            if((data_byte & 1) === 0)
522
            {
523
                dbg_assert(false, "unimplemented: not 8086 mode", LOG_PIC);
524
            }
525
        }
526
        else
527
        {
528
            // ocw1
529
            this.irq_mask = ~data_byte;
530

531
            if(PIC_LOG_VERBOSE)
532
            {
533
                dbg_log("interrupt mask: " + (this.irq_mask & 0xFF).toString(2) +
534
                        " (" + this.name + ")", LOG_PIC);
535
            }
536

537
            this.check_irqs();
538
        }
539
    }
540
    else if(this.state === 1)
541
    {
542
        // icw2
543
        this.irq_map = data_byte;
544
        dbg_log("interrupts are mapped to " + h(this.irq_map) +
545
                " (" + this.name + ")", LOG_PIC);
546
        this.state++;
547
    }
548
    else if(this.state === 2)
549
    {
550
        // icw3
551
        this.state = 0;
552
        dbg_log("icw3: " + h(data_byte), LOG_PIC);
553
    }
554
};
555

556
PIC.prototype.port21_read = function()
557
{
558
    dbg_log("21h read " + h(~this.irq_mask & 0xff), LOG_PIC);
559
    return ~this.irq_mask & 0xFF;
560
};
561

562
PIC.prototype.port4D0_read = function()
563
{
564
    dbg_log("elcr read: " + h(this.elcr, 2), LOG_PIC);
565
    return this.elcr;
566
};
567

568
PIC.prototype.port4D0_write = function(value)
569
{
570
    dbg_log("elcr write: " + h(value, 2), LOG_PIC);
571
    // set by seabios to 00 0C (only set for pci interrupts)
572
    this.elcr = value;
573
};
574

575