podman
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1// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.2// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)3// Portions Copyright © 1997-1999 Vita Nuova Limited4// Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com)5// Portions Copyright © 2004,2006 Bruce Ellis6// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)7// Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others8// Portions Copyright © 2009 The Go Authors. All rights reserved.9// Portions Copyright © 2019 The Go Authors. All rights reserved.10//11// Permission is hereby granted, free of charge, to any person obtaining a copy12// of this software and associated documentation files (the "Software"), to deal13// in the Software without restriction, including without limitation the rights14// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell15// copies of the Software, and to permit persons to whom the Software is16// furnished to do so, subject to the following conditions:17//18// The above copyright notice and this permission notice shall be included in19// all copies or substantial portions of the Software.20//21// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR22// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,23// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE24// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER25// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,26// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN27// THE SOFTWARE.28//go:generate go run ../stringer.go -i $GOFILE -o anames.go -p riscv34REG_X139REG_X240REG_X341REG_X442REG_X543REG_X644REG_X745REG_X846REG_X947REG_X1048REG_X1149REG_X1250REG_X1351REG_X1452REG_X1553REG_X1654REG_X1755REG_X1856REG_X1957REG_X2058REG_X2159REG_X2260REG_X2361REG_X2462REG_X2563REG_X2664REG_X2765REG_X2866REG_X2967REG_X3068REG_X3169REG_F072REG_F173REG_F274REG_F375REG_F476REG_F577REG_F678REG_F779REG_F880REG_F981REG_F1082REG_F1183REG_F1284REG_F1385REG_F1486REG_F1587REG_F1688REG_F1789REG_F1890REG_F1991REG_F2092REG_F2193REG_F2294REG_F2395REG_F2496REG_F2597REG_F2698REG_F2799REG_F28100REG_F29101REG_F30102REG_F31103REG_END106)185// https://github.com/riscv/riscv-elf-psabi-doc/blob/master/riscv-elf.md#dwarf-register-numbers187var RISCV64DWARFRegisters = map[int16]int16{188// Integer Registers.189REG_X0: 0,190REG_X1: 1,191REG_X2: 2,192REG_X3: 3,193REG_X4: 4,194REG_X5: 5,195REG_X6: 6,196REG_X7: 7,197REG_X8: 8,198REG_X9: 9,199REG_X10: 10,200REG_X11: 11,201REG_X12: 12,202REG_X13: 13,203REG_X14: 14,204REG_X15: 15,205REG_X16: 16,206REG_X17: 17,207REG_X18: 18,208REG_X19: 19,209REG_X20: 20,210REG_X21: 21,211REG_X22: 22,212REG_X23: 23,213REG_X24: 24,214REG_X25: 25,215REG_X26: 26,216REG_X27: 27,217REG_X28: 28,218REG_X29: 29,219REG_X30: 30,220REG_X31: 31,221}256// Prog.Mark flags.258const (259// NEED_PCREL_ITYPE_RELOC is set on AUIPC instructions to indicate that260// it is the first instruction in an AUIPC + I-type pair that needs a261// R_RISCV_PCREL_ITYPE relocation.262NEED_PCREL_ITYPE_RELOC = 1 << 0263)269// RISC-V mnemonics, as defined in the "opcodes" and "opcodes-pseudo" files271// from:272//273// https://github.com/riscv/riscv-opcodes274//275// As well as some pseudo-mnemonics (e.g. MOV) used only in the assembler.276//277// See also "The RISC-V Instruction Set Manual" at:278//279// https://riscv.org/specifications/280//281// If you modify this table, you MUST run 'go generate' to regenerate anames.go!282const (283// Unprivileged ISA (Document Version 20190608-Base-Ratified)284ASLTI288ASLTIU289AANDI290AORI291AXORI292ASLLI293ASRLI294ASRAI295ALUI296AAUIPC297AADD298ASLT299ASLTU300AAND301AOR302AXOR303ASLL304ASRL305ASUB306ASRA307ASLLIRV32311ASRLIRV32312ASRAIRV32313AJAL316AJALR317ABEQ318ABNE319ABLT320ABLTU321ABGE322ABGEU323ALW326ALWU327ALH328ALHU329ALB330ALBU331ASW332ASH333ASB334AFENCE337AFENCEI338AFENCETSO339AADDIW342ASLLIW343ASRLIW344ASRAIW345AADDW346ASLLW347ASRLW348ASUBW349ASRAW350ALD353ASD354AMUL357AMULH358AMULHU359AMULHSU360AMULW361ADIV362ADIVU363AREM364AREMU365ADIVW366ADIVUW367AREMW368AREMUW369ALRD372ASCD373ALRW374ASCW375AAMOSWAPD378AAMOADDD379AAMOANDD380AAMOORD381AAMOXORD382AAMOMAXD383AAMOMAXUD384AAMOMIND385AAMOMINUD386AAMOSWAPW387AAMOADDW388AAMOANDW389AAMOORW390AAMOXORW391AAMOMAXW392AAMOMAXUW393AAMOMINW394AAMOMINUW395ARDCYCLE398ARDCYCLEH399ARDTIME400ARDTIMEH401ARDINSTRET402ARDINSTRETH403AFRCSR406AFSCSR407AFRRM408AFSRM409AFRFLAGS410AFSFLAGS411AFSRMI412AFSFLAGSI413AFLW416AFSW417AFADDS420AFSUBS421AFMULS422AFDIVS423AFMINS424AFMAXS425AFSQRTS426AFMADDS427AFMSUBS428AFNMADDS429AFNMSUBS430AFCVTWS433AFCVTLS434AFCVTSW435AFCVTSL436AFCVTWUS437AFCVTLUS438AFCVTSWU439AFCVTSLU440AFSGNJS441AFSGNJNS442AFSGNJXS443AFMVXS444AFMVSX445AFMVXW446AFMVWX447AFEQS450AFLTS451AFLES452AFCLASSS455AFLD458AFSD459AFADDD462AFSUBD463AFMULD464AFDIVD465AFMIND466AFMAXD467AFSQRTD468AFMADDD469AFMSUBD470AFNMADDD471AFNMSUBD472AFCVTWD475AFCVTLD476AFCVTDW477AFCVTDL478AFCVTWUD479AFCVTLUD480AFCVTDWU481AFCVTDLU482AFCVTSD483AFCVTDS484AFSGNJD485AFSGNJND486AFSGNJXD487AFMVXD488AFMVDX489AFEQD492AFLTD493AFLED494AFCLASSD497AFLQ500AFSQ501AFADDQ504AFSUBQ505AFMULQ506AFDIVQ507AFMINQ508AFMAXQ509AFSQRTQ510AFMADDQ511AFMSUBQ512AFNMADDQ513AFNMSUBQ514AFCVTWQ517AFCVTLQ518AFCVTSQ519AFCVTDQ520AFCVTQW521AFCVTQL522AFCVTQS523AFCVTQD524AFCVTWUQ525AFCVTLUQ526AFCVTQWU527AFCVTQLU528AFSGNJQ529AFSGNJNQ530AFSGNJXQ531AFMVXQ532AFMVQX533AFEQQ536AFLEQ537AFLTQ538AFCLASSQ541ACSRRW546ACSRRS547ACSRRC548ACSRRWI549ACSRRSI550ACSRRCI551AECALL554ASCALL555AEBREAK556ASBREAK557AMRET560ASRET561AURET562ADRET563AWFI566ASFENCEVMA569AHFENCEGVMA572AHFENCEVVMA573AWORD576ABEQZ580ABGEZ581ABGT582ABGTU583ABGTZ584ABLE585ABLEU586ABLEZ587ABLTZ588ABNEZ589AFNEGD590AFNEGS591AFNED592AFNES593AMOV594AMOVB595AMOVBU596AMOVF597AMOVD598AMOVH599AMOVHU600AMOVW601AMOVWU602ANEG603ANEGW604ANOT605ASEQZ606ASNEZ607ALAST610)611// All unary instructions which write to their arguments (as opposed to reading613// from them) go here. The assembly parser uses this information to populate614// its AST in a semantically reasonable way.615//616// Any instructions not listed here are assumed to either be non-unary or to read617// from its argument.618var unaryDst = map[obj.As]bool{619ARDCYCLE: true,620ARDCYCLEH: true,621ARDTIME: true,622ARDTIMEH: true,623ARDINSTRET: true,624ARDINSTRETH: true,625}626// Instruction encoding masks.628const (629// ITypeImmMask is a mask including only the immediate portion of630// I-type instructions.631ITypeImmMask = 0xfff00000632)645