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1// cmd/9c/9.out.h from Vita Nuova.2//3// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.4// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)5// Portions Copyright © 1997-1999 Vita Nuova Limited6// Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com)7// Portions Copyright © 2004,2006 Bruce Ellis8// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)9// Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others10// Portions Copyright © 2009 The Go Authors. All rights reserved.11//12// Permission is hereby granted, free of charge, to any person obtaining a copy13// of this software and associated documentation files (the "Software"), to deal14// in the Software without restriction, including without limitation the rights15// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell16// copies of the Software, and to permit persons to whom the Software is17// furnished to do so, subject to the following conditions:18//19// The above copyright notice and this permission notice shall be included in20// all copies or substantial portions of the Software.21//22// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR23// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,24// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE25// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER26// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,27// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN28// THE SOFTWARE.29//go:generate go run ../stringer.go -i $GOFILE -o anames.go -p ppc6435/*37* powerpc 6438*/39const (40NSNAME = 841NSYM = 5042NREG = 32 /* number of general registers */43NFREG = 32 /* number of floating point registers */44)45REG_R151REG_R252REG_R353REG_R454REG_R555REG_R656REG_R757REG_R858REG_R959REG_R1060REG_R1161REG_R1262REG_R1363REG_R1464REG_R1565REG_R1666REG_R1767REG_R1868REG_R1969REG_R2070REG_R2171REG_R2272REG_R2373REG_R2474REG_R2575REG_R2676REG_R2777REG_R2878REG_R2979REG_R3080REG_R3181REG_F084REG_F185REG_F286REG_F387REG_F488REG_F589REG_F690REG_F791REG_F892REG_F993REG_F1094REG_F1195REG_F1296REG_F1397REG_F1498REG_F1599REG_F16100REG_F17101REG_F18102REG_F19103REG_F20104REG_F21105REG_F22106REG_F23107REG_F24108REG_F25109REG_F26110REG_F27111REG_F28112REG_F29113REG_F30114REG_F31115REG_V0118REG_V1119REG_V2120REG_V3121REG_V4122REG_V5123REG_V6124REG_V7125REG_V8126REG_V9127REG_V10128REG_V11129REG_V12130REG_V13131REG_V14132REG_V15133REG_V16134REG_V17135REG_V18136REG_V19137REG_V20138REG_V21139REG_V22140REG_V23141REG_V24142REG_V25143REG_V26144REG_V27145REG_V28146REG_V29147REG_V30148REG_V31149REG_VS0152REG_VS1153REG_VS2154REG_VS3155REG_VS4156REG_VS5157REG_VS6158REG_VS7159REG_VS8160REG_VS9161REG_VS10162REG_VS11163REG_VS12164REG_VS13165REG_VS14166REG_VS15167REG_VS16168REG_VS17169REG_VS18170REG_VS19171REG_VS20172REG_VS21173REG_VS22174REG_VS23175REG_VS24176REG_VS25177REG_VS26178REG_VS27179REG_VS28180REG_VS29181REG_VS30182REG_VS31183REG_VS32184REG_VS33185REG_VS34186REG_VS35187REG_VS36188REG_VS37189REG_VS38190REG_VS39191REG_VS40192REG_VS41193REG_VS42194REG_VS43195REG_VS44196REG_VS45197REG_VS46198REG_VS47199REG_VS48200REG_VS49201REG_VS50202REG_VS51203REG_VS52204REG_VS53205REG_VS54206REG_VS55207REG_VS56208REG_VS57209REG_VS58210REG_VS59211REG_VS60212REG_VS61213REG_VS62214REG_VS63215REG_CR0217REG_CR1218REG_CR2219REG_CR3220REG_CR4221REG_CR5222REG_CR6223REG_CR7224REG_MSR226REG_FPSCR227REG_CR228)257// OpenPOWER ABI for Linux Supplement Power Architecture 64-Bit ELF V2 ABI259// https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture260var PPC64DWARFRegisters = map[int16]int16{}261}280/*282* GENERAL:283*284* compiler allocates R3 up as temps285* compiler allocates register variables R7-R27286* compiler allocates external registers R30 down287*288* compiler allocates register variables F17-F26289* compiler allocates external registers F26 down290*/291const (292BIG = 32768 - 8293)294)308// Values for use in branch instruction BC310// BC B0,BI,label311// BO is type of branch + likely bits described below312// BI is CR value + branch type313// ex: BEQ CR2,label is BC 12,10,label314// 12 = BO_BCR315// 10 = BI_CR2 + BI_EQ316)331// Values for the BO field. Add the branch type to333// the likely bits, if a likely setting is known.334// If branch likely or unlikely is not known, don't set it.335// e.g. branch on cr+likely = 15336)345// Bit settings from the CR347)354C_REG358C_FREG359C_VREG360C_VSREG361C_CREG362C_SPR /* special processor register */363C_ZCON364C_SCON /* 16 bit signed */365C_UCON /* 32 bit signed, low 16 bits 0 */366C_ADDCON /* -0x8000 <= v < 0 */367C_ANDCON /* 0 < v <= 0xFFFF */368C_LCON /* other 32 */369C_DCON /* other 64 (could subdivide further) */370C_SACON /* $n(REG) where n <= int16 */371C_SECON372C_LACON /* $n(REG) where int16 < n <= int32 */373C_LECON374C_DACON /* $n(REG) where int32 < n */375C_SBRA376C_LBRA377C_LBRAPIC378C_SAUTO379C_LAUTO380C_SEXT381C_LEXT382C_ZOREG // conjecture: either (1) register + zeroed offset, or (2) "R0" implies zero or C_REG383C_SOREG // register + signed offset384C_LOREG385C_FPSCR386C_MSR387C_XER388C_LR389C_CTR390C_ANY391C_GOK392C_ADDR393C_GOTADDR394C_TOCADDR395C_TLS_LE396C_TLS_IE397C_TEXTSIZE398)401AADDCC405AADDIS406AADDV407AADDVCC408AADDC409AADDCCC410AADDCV411AADDCVCC412AADDME413AADDMECC414AADDMEVCC415AADDMEV416AADDE417AADDECC418AADDEVCC419AADDEV420AADDZE421AADDZECC422AADDZEVCC423AADDZEV424AADDEX425AAND426AANDCC427AANDN428AANDNCC429AANDISCC430ABC431ABCL432ABEQ433ABGE // not LT = G/E/U434ABGT435ABLE // not GT = L/E/U436ABLT437ABNE // not EQ = L/G/U438ABVC // Unordered-clear439ABVS // Unordered-set440ACMP441ACMPU442ACMPEQB443ACNTLZW444ACNTLZWCC445ACRAND446ACRANDN447ACREQV448ACRNAND449ACRNOR450ACROR451ACRORN452ACRXOR453ADIVW454ADIVWCC455ADIVWVCC456ADIVWV457ADIVWU458ADIVWUCC459ADIVWUVCC460ADIVWUV461AMODUD462AMODUW463AMODSD464AMODSW465AEQV466AEQVCC467AEXTSB468AEXTSBCC469AEXTSH470AEXTSHCC471AFABS472AFABSCC473AFADD474AFADDCC475AFADDS476AFADDSCC477AFCMPO478AFCMPU479AFCTIW480AFCTIWCC481AFCTIWZ482AFCTIWZCC483AFDIV484AFDIVCC485AFDIVS486AFDIVSCC487AFMADD488AFMADDCC489AFMADDS490AFMADDSCC491AFMOVD492AFMOVDCC493AFMOVDU494AFMOVS495AFMOVSU496AFMOVSX497AFMOVSZ498AFMSUB499AFMSUBCC500AFMSUBS501AFMSUBSCC502AFMUL503AFMULCC504AFMULS505AFMULSCC506AFNABS507AFNABSCC508AFNEG509AFNEGCC510AFNMADD511AFNMADDCC512AFNMADDS513AFNMADDSCC514AFNMSUB515AFNMSUBCC516AFNMSUBS517AFNMSUBSCC518AFRSP519AFRSPCC520AFSUB521AFSUBCC522AFSUBS523AFSUBSCC524AISEL525AMOVMW526ALBAR527ALHAR528ALSW529ALWAR530ALWSYNC531AMOVDBR532AMOVWBR533AMOVB534AMOVBU535AMOVBZ536AMOVBZU537AMOVH538AMOVHBR539AMOVHU540AMOVHZ541AMOVHZU542AMOVW543AMOVWU544AMOVFL545AMOVCRFS546AMTFSB0547AMTFSB0CC548AMTFSB1549AMTFSB1CC550AMULHW551AMULHWCC552AMULHWU553AMULHWUCC554AMULLW555AMULLWCC556AMULLWVCC557AMULLWV558ANAND559ANANDCC560ANEG561ANEGCC562ANEGVCC563ANEGV564ANOR565ANORCC566AOR567AORCC568AORN569AORNCC570AORIS571AREM572AREMU573ARFI574ARLWMI575ARLWMICC576ARLWNM577ARLWNMCC578ACLRLSLWI579ASLW580ASLWCC581ASRW582ASRAW583ASRAWCC584ASRWCC585ASTBCCC586ASTHCCC587ASTSW588ASTWCCC589ASUB590ASUBCC591ASUBVCC592ASUBC593ASUBCCC594ASUBCV595ASUBCVCC596ASUBME597ASUBMECC598ASUBMEVCC599ASUBMEV600ASUBV601ASUBE602ASUBECC603ASUBEV604ASUBEVCC605ASUBZE606ASUBZECC607ASUBZEVCC608ASUBZEV609ASYNC610AXOR611AXORCC612AXORIS613ADCBF615ADCBI616ADCBST617ADCBT618ADCBTST619ADCBZ620AECIWX621AECOWX622AEIEIO623AICBI624AISYNC625APTESYNC626ATLBIE627ATLBIEL628ATLBSYNC629ATW630ASYSCALL632AWORD633ARFCI635AFCPSGN637AFCPSGNCC638/* optional on 32-bit */639AFRES640AFRESCC641AFRIM642AFRIMCC643AFRIP644AFRIPCC645AFRIZ646AFRIZCC647AFRIN648AFRINCC649AFRSQRTE650AFRSQRTECC651AFSEL652AFSELCC653AFSQRT654AFSQRTCC655AFSQRTS656AFSQRTSCC657ACNTLZD661ACNTLZDCC662ACMPW /* CMP with L=0 */663ACMPWU664ACMPB665AFTDIV666AFTSQRT667ADIVD668ADIVDCC669ADIVDE670ADIVDECC671ADIVDEU672ADIVDEUCC673ADIVDVCC674ADIVDV675ADIVDU676ADIVDUCC677ADIVDUVCC678ADIVDUV679AEXTSW680AEXTSWCC681/* AFCFIW; AFCFIWCC */682AFCFID683AFCFIDCC684AFCFIDU685AFCFIDUCC686AFCFIDS687AFCFIDSCC688AFCTID689AFCTIDCC690AFCTIDZ691AFCTIDZCC692ALDAR693AMOVD694AMOVDU695AMOVWZ696AMOVWZU697AMULHD698AMULHDCC699AMULHDU700AMULHDUCC701AMULLD702AMULLDCC703AMULLDVCC704AMULLDV705ARFID706ARLDMI707ARLDMICC708ARLDIMI709ARLDIMICC710ARLDC711ARLDCCC712ARLDCR713ARLDCRCC714ARLDICR715ARLDICRCC716ARLDCL717ARLDCLCC718ARLDICL719ARLDICLCC720ARLDIC721ARLDICCC722ACLRLSLDI723AROTL724AROTLW725ASLBIA726ASLBIE727ASLBMFEE728ASLBMFEV729ASLBMTE730ASLD731ASLDCC732ASRD733ASRAD734ASRADCC735ASRDCC736ASTDCCC737ATD738ADWORD741AREMD742AREMDU743AHRFID746APOPCNTD747APOPCNTW748APOPCNTB749ACNTTZW750ACNTTZWCC751ACNTTZD752ACNTTZDCC753ACOPY754APASTECC755ADARN756ALDMX757AMADDHD758AMADDHDU759AMADDLD760ALV763ALVEBX764ALVEHX765ALVEWX766ALVX767ALVXL768ALVSL769ALVSR770ASTV771ASTVEBX772ASTVEHX773ASTVEWX774ASTVX775ASTVXL776AVAND777AVANDC778AVNAND779AVOR780AVORC781AVNOR782AVXOR783AVEQV784AVADDUM785AVADDUBM786AVADDUHM787AVADDUWM788AVADDUDM789AVADDUQM790AVADDCU791AVADDCUQ792AVADDCUW793AVADDUS794AVADDUBS795AVADDUHS796AVADDUWS797AVADDSS798AVADDSBS799AVADDSHS800AVADDSWS801AVADDE802AVADDEUQM803AVADDECUQ804AVSUBUM805AVSUBUBM806AVSUBUHM807AVSUBUWM808AVSUBUDM809AVSUBUQM810AVSUBCU811AVSUBCUQ812AVSUBCUW813AVSUBUS814AVSUBUBS815AVSUBUHS816AVSUBUWS817AVSUBSS818AVSUBSBS819AVSUBSHS820AVSUBSWS821AVSUBE822AVSUBEUQM823AVSUBECUQ824AVMULESB825AVMULOSB826AVMULEUB827AVMULOUB828AVMULESH829AVMULOSH830AVMULEUH831AVMULOUH832AVMULESW833AVMULOSW834AVMULEUW835AVMULOUW836AVMULUWM837AVPMSUM838AVPMSUMB839AVPMSUMH840AVPMSUMW841AVPMSUMD842AVMSUMUDM843AVR844AVRLB845AVRLH846AVRLW847AVRLD848AVS849AVSLB850AVSLH851AVSLW852AVSL853AVSLO854AVSRB855AVSRH856AVSRW857AVSR858AVSRO859AVSLD860AVSRD861AVSA862AVSRAB863AVSRAH864AVSRAW865AVSRAD866AVSOI867AVSLDOI868AVCLZ869AVCLZB870AVCLZH871AVCLZW872AVCLZD873AVPOPCNT874AVPOPCNTB875AVPOPCNTH876AVPOPCNTW877AVPOPCNTD878AVCMPEQ879AVCMPEQUB880AVCMPEQUBCC881AVCMPEQUH882AVCMPEQUHCC883AVCMPEQUW884AVCMPEQUWCC885AVCMPEQUD886AVCMPEQUDCC887AVCMPGT888AVCMPGTUB889AVCMPGTUBCC890AVCMPGTUH891AVCMPGTUHCC892AVCMPGTUW893AVCMPGTUWCC894AVCMPGTUD895AVCMPGTUDCC896AVCMPGTSB897AVCMPGTSBCC898AVCMPGTSH899AVCMPGTSHCC900AVCMPGTSW901AVCMPGTSWCC902AVCMPGTSD903AVCMPGTSDCC904AVCMPNEZB905AVCMPNEZBCC906AVCMPNEB907AVCMPNEBCC908AVCMPNEH909AVCMPNEHCC910AVCMPNEW911AVCMPNEWCC912AVPERM913AVPERMXOR914AVPERMR915AVBPERMQ916AVBPERMD917AVSEL918AVSPLT919AVSPLTB920AVSPLTH921AVSPLTW922AVSPLTI923AVSPLTISB924AVSPLTISH925AVSPLTISW926AVCIPH927AVCIPHER928AVCIPHERLAST929AVNCIPH930AVNCIPHER931AVNCIPHERLAST932AVSBOX933AVSHASIGMA934AVSHASIGMAW935AVSHASIGMAD936AVMRGEW937AVMRGOW938ALXV941ALXVL942ALXVLL943ALXVD2X944ALXVW4X945ALXVH8X946ALXVB16X947ALXVX948ALXVDSX949ASTXV950ASTXVL951ASTXVLL952ASTXVD2X953ASTXVW4X954ASTXVH8X955ASTXVB16X956ASTXVX957ALXSDX958ASTXSDX959ALXSIWAX960ALXSIWZX961ASTXSIWX962AMFVSRD963AMFFPRD964AMFVRD965AMFVSRWZ966AMFVSRLD967AMTVSRD968AMTFPRD969AMTVRD970AMTVSRWA971AMTVSRWZ972AMTVSRDD973AMTVSRWS974AXXLAND975AXXLANDC976AXXLEQV977AXXLNAND978AXXLOR979AXXLORC980AXXLNOR981AXXLORQ982AXXLXOR983AXXSEL984AXXMRGHW985AXXMRGLW986AXXSPLT987AXXSPLTW988AXXSPLTIB989AXXPERM990AXXPERMDI991AXXSLDWI992AXXBRQ993AXXBRD994AXXBRW995AXXBRH996AXSCVDPSP997AXSCVSPDP998AXSCVDPSPN999AXSCVSPDPN1000AXVCVDPSP1001AXVCVSPDP1002AXSCVDPSXDS1003AXSCVDPSXWS1004AXSCVDPUXDS1005AXSCVDPUXWS1006AXSCVSXDDP1007AXSCVUXDDP1008AXSCVSXDSP1009AXSCVUXDSP1010AXVCVDPSXDS1011AXVCVDPSXWS1012AXVCVDPUXDS1013AXVCVDPUXWS1014AXVCVSPSXDS1015AXVCVSPSXWS1016AXVCVSPUXDS1017AXVCVSPUXWS1018AXVCVSXDDP1019AXVCVSXWDP1020AXVCVUXDDP1021AXVCVUXWDP1022AXVCVSXDSP1023AXVCVSXWSP1024AXVCVUXDSP1025AXVCVUXWSP1026ALAST1028)1033