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1// cmd/9c/9.out.h from Vita Nuova.2//3// Copyright © 1994-1999 Lucent Technologies Inc. All rights reserved.4// Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)5// Portions Copyright © 1997-1999 Vita Nuova Limited6// Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com)7// Portions Copyright © 2004,2006 Bruce Ellis8// Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)9// Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others10// Portions Copyright © 2009 The Go Authors. All rights reserved.11//12// Permission is hereby granted, free of charge, to any person obtaining a copy13// of this software and associated documentation files (the "Software"), to deal14// in the Software without restriction, including without limitation the rights15// to use, copy, modify, merge, publish, distribute, sublicense, and/or sell16// copies of the Software, and to permit persons to whom the Software is17// furnished to do so, subject to the following conditions:18//19// The above copyright notice and this permission notice shall be included in20// all copies or substantial portions of the Software.21//22// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR23// IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,24// FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE25// AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER26// LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,27// OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN28// THE SOFTWARE.29)35//go:generate go run ../stringer.go -i $GOFILE -o anames.go -p mips37/*39* mips 6440*/41const (42NSNAME = 843NSYM = 5044NREG = 32 /* number of general registers */45NFREG = 32 /* number of floating point registers */46NWREG = 32 /* number of MSA registers */47)48REG_R152REG_R253REG_R354REG_R455REG_R556REG_R657REG_R758REG_R859REG_R960REG_R1061REG_R1162REG_R1263REG_R1364REG_R1465REG_R1566REG_R1667REG_R1768REG_R1869REG_R1970REG_R2071REG_R2172REG_R2273REG_R2374REG_R2475REG_R2576REG_R2677REG_R2778REG_R2879REG_R2980REG_R3081REG_R3182REG_F185REG_F286REG_F387REG_F488REG_F589REG_F690REG_F791REG_F892REG_F993REG_F1094REG_F1195REG_F1296REG_F1397REG_F1498REG_F1599REG_F16100REG_F17101REG_F18102REG_F19103REG_F20104REG_F21105REG_F22106REG_F23107REG_F24108REG_F25109REG_F26110REG_F27111REG_F28112REG_F29113REG_F30114REG_F31115REG_M1119REG_M2120REG_M3121REG_M4122REG_M5123REG_M6124REG_M7125REG_M8126REG_M9127REG_M10128REG_M11129REG_M12130REG_M13131REG_M14132REG_M15133REG_M16134REG_M17135REG_M18136REG_M19137REG_M20138REG_M21139REG_M22140REG_M23141REG_M24142REG_M25143REG_M26144REG_M27145REG_M28146REG_M29147REG_M30148REG_M31149REG_FCR1153REG_FCR2154REG_FCR3155REG_FCR4156REG_FCR5157REG_FCR6158REG_FCR7159REG_FCR8160REG_FCR9161REG_FCR10162REG_FCR11163REG_FCR12164REG_FCR13165REG_FCR14166REG_FCR15167REG_FCR16168REG_FCR17169REG_FCR18170REG_FCR19171REG_FCR20172REG_FCR21173REG_FCR22174REG_FCR23175REG_FCR24176REG_FCR25177REG_FCR26178REG_FCR27179REG_FCR28180REG_FCR29181REG_FCR30182REG_FCR31183REG_W1188REG_W2189REG_W3190REG_W4191REG_W5192REG_W6193REG_W7194REG_W8195REG_W9196REG_W10197REG_W11198REG_W12199REG_W13200REG_W14201REG_W15202REG_W16203REG_W17204REG_W18205REG_W19206REG_W20207REG_W21208REG_W22209REG_W23210REG_W24211REG_W25212REG_W26213REG_W27214REG_W28215REG_W29216REG_W30217REG_W31218REG_HI220REG_LO221)239// https://llvm.org/svn/llvm-project/llvm/trunk/lib/Target/Mips/MipsRegisterInfo.td search for DwarfRegNum241// https://gcc.gnu.org/viewcvs/gcc/trunk/gcc/config/mips/mips.c?view=co&revision=258099&content-type=text%2Fplain search for mips_dwarf_regno242// For now, this is adequate for both 32 and 64 bit.243var MIPSDWARFRegisters = map[int16]int16{}244}259)263)277C_REG281C_FREG282C_FCREG283C_MREG /* special processor register */284C_WREG /* MSA registers */285C_HI286C_LO287C_ZCON288C_SCON /* 16 bit signed */289C_UCON /* 32 bit signed, low 16 bits 0 */290C_ADD0CON291C_AND0CON292C_ADDCON /* -0x8000 <= v < 0 */293C_ANDCON /* 0 < v <= 0xFFFF */294C_LCON /* other 32 */295C_DCON /* other 64 (could subdivide further) */296C_SACON /* $n(REG) where n <= int16 */297C_SECON298C_LACON /* $n(REG) where int16 < n <= int32 */299C_LECON300C_DACON /* $n(REG) where int32 < n */301C_STCON /* $tlsvar */302C_SBRA303C_LBRA304C_SAUTO305C_LAUTO306C_SEXT307C_LEXT308C_ZOREG309C_SOREG310C_LOREG311C_GOK312C_ADDR313C_TLS314C_TEXTSIZE315)318AABSF322AABSW323AADD324AADDD325AADDF326AADDU327AADDW328AAND329ABEQ330ABFPF331ABFPT332ABGEZ333ABGEZAL334ABGTZ335ABLEZ336ABLTZ337ABLTZAL338ABNE339ABREAK340ACLO341ACLZ342ACMOVF343ACMOVN344ACMOVT345ACMOVZ346ACMPEQD347ACMPEQF348ACMPGED349ACMPGEF350ACMPGTD351ACMPGTF352ADIV353ADIVD354ADIVF355ADIVU356ADIVW357AGOK358ALL359ALLV360ALUI361AMADD362AMOVB363AMOVBU364AMOVD365AMOVDF366AMOVDW367AMOVF368AMOVFD369AMOVFW370AMOVH371AMOVHU372AMOVW373AMOVWD374AMOVWF375AMOVWL376AMOVWR377AMSUB378AMUL379AMULD380AMULF381AMULU382AMULW383ANEGD384ANEGF385ANEGW386ANEGV387ANOOP // hardware nop388ANOR389AOR390AREM391AREMU392ARFE393ASC394ASCV395ASGT396ASGTU397ASLL398ASQRTD399ASQRTF400ASRA401ASRL402ASUB403ASUBD404ASUBF405ASUBU406ASUBW407ASYNC408ASYSCALL409ATEQ410ATLBP411ATLBR412ATLBWI413ATLBWR414ATNE415AWORD416AXOR417AMOVV420AMOVVL421AMOVVR422ASLLV423ASRAV424ASRLV425ADIVV426ADIVVU427AREMV428AREMVU429AMULV430AMULVU431AADDV432AADDVU433ASUBV434ASUBVU435ATRUNCFV438ATRUNCDV439ATRUNCFW440ATRUNCDW441AMOVWU442AMOVFV443AMOVDV444AMOVVF445AMOVVD446AVMOVB449AVMOVH450AVMOVW451AVMOVD452ALAST454)460}482