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1// Copyright 2015 The Go Authors. All rights reserved.
2// Use of this source code is governed by a BSD-style
3// license that can be found in the LICENSE file.
4
5// This file encapsulates some of the odd characteristics of the
6// MIPS (MIPS64) instruction set, to minimize its interaction
7// with the core of the assembler.
8
9package arch10
11import (12"github.com/twitchyliquid64/golang-asm/obj"13"github.com/twitchyliquid64/golang-asm/obj/mips"14)
15
16func jumpMIPS(word string) bool {17switch word {18case "BEQ", "BFPF", "BFPT", "BGEZ", "BGEZAL", "BGTZ", "BLEZ", "BLTZ", "BLTZAL", "BNE", "JMP", "JAL", "CALL":19return true20}21return false22}
23
24// IsMIPSCMP reports whether the op (as defined by an mips.A* constant) is
25// one of the CMP instructions that require special handling.
26func IsMIPSCMP(op obj.As) bool {27switch op {28case mips.ACMPEQF, mips.ACMPEQD, mips.ACMPGEF, mips.ACMPGED,29mips.ACMPGTF, mips.ACMPGTD:30return true31}32return false33}
34
35// IsMIPSMUL reports whether the op (as defined by an mips.A* constant) is
36// one of the MUL/DIV/REM/MADD/MSUB instructions that require special handling.
37func IsMIPSMUL(op obj.As) bool {38switch op {39case mips.AMUL, mips.AMULU, mips.AMULV, mips.AMULVU,40mips.ADIV, mips.ADIVU, mips.ADIVV, mips.ADIVVU,41mips.AREM, mips.AREMU, mips.AREMV, mips.AREMVU,42mips.AMADD, mips.AMSUB:43return true44}45return false46}
47
48func mipsRegisterNumber(name string, n int16) (int16, bool) {49switch name {50case "F":51if 0 <= n && n <= 31 {52return mips.REG_F0 + n, true53}54case "FCR":55if 0 <= n && n <= 31 {56return mips.REG_FCR0 + n, true57}58case "M":59if 0 <= n && n <= 31 {60return mips.REG_M0 + n, true61}62case "R":63if 0 <= n && n <= 31 {64return mips.REG_R0 + n, true65}66case "W":67if 0 <= n && n <= 31 {68return mips.REG_W0 + n, true69}70}71return 0, false72}
73